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Milos Prvulovic
Assistant Professor |
M. Garzaran, M. Prvulovic, V. Vinals, J. Llaberia, L. Rauchwerger, J. Torrellas,
Using Software Logging to Support Multi-Version Buffering in Thread-Level
Speculation,
Proceedings of the 2003 International Conference on Parallel Architectures and
Compilation Techniques (PACT), September 2003.
M. Prvulovic, J. Torrellas,
ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data
Races in Multithreaded Codes,
Proceedings of the 30th Annual International
Symposium on Computer Architecture (ISCA), June 2003.
(PDF)
M. Garzaran, M. Prvulovic, J. Llaberia, V. Vinals,
L. Rauchwerger, J. Torrellas,
Tradeoffs in Buffering Multi-Version Memory State for Speculative
Thread-Level Parallelization in Multiprocessors,
Proceedings of the Ninth International Symposium on High
Performance Computer Architecture (HPCA), February 2003.
(PDF)
J. Martínez, J. Renau, M. C. Huang, M. Prvulovic, J. Torrellas,
Cherry: Checkpointed Early Resurce Recycling in Out-of-order
Microprocessors,
Proceedings of the 35th Annual International Symposium on
Microarchitecture (MICRO), November 2002.
(PDF)
M. Prvulovic, Z. Zhang, J. Torrellas,
ReVive: Cost-Effective Architectural Support for Rollback
Recovery in Shared-Memory Multiprocessors,
Proceedings of the 29th Annual International Symposium on
Computer Architecture (ISCA), May 2002.
(PDF)
M. Garzaran, M. Prvulovic, A. Jula, H. Yu,
Y. Zhang, L. Rauchwerger, J. Torrellas,
Architectural Support for Parallel Reductions in
Scalable Shared-Memory Multiprocessors,
Proceedings of the 2001 International Conference on
Parallel Architectures and Compilation Techniques
(PACT), September 2001.
(PDF)
M. Prvulovic, M. Garzaran, , L. Rauchwerger, J. Torrellas,
Removing Architectural Bottlenecks to the Scalability
of Speculative Parallelization,
Proceedings of the 28th Annual International Symposium
on Computer Architecture (ISCA), July 2001.
(PDF)
M. Garzaran, M. Prvulovic, J. Llaberia, V. Vinals,
L. Rauchwerger, J. Torrellas,
Software Logging under Speculative Parallelization,
Second Workshop on Memory Performance Issues in conjunction
with ISCA-29, June 2001.
Extended version appears in
"High Performance Memory Systems",
edited by H. Hadimiouglu, D. Kaeli, J. Kuskin, A. Nanda,
and J. Torrellas, Springer-Verlag, 2003.
F. Dang, M. Garzaran, M. Prvulovic, Y. Zhang,
A. Jula, H. Yu, N. Amato, L. Rauchwerger, J. Torrellas,
Compiler-Assisted Software and Hardware Support
for Reduction Operations,
NSF Workshop on Next Generation Systems, April 2002.
S. Roy, R. Kumar, M. Prvulovic,
Memory System Performance with Compressed Memory,
Proceedings of the International Parallel and Distributed
Processing Symposium (IPDPS), April 2001.
M. Prvulovic, D. Marinov, Z. Dimitrijevic, V. Milutinovic,
Split Temporal/Spatial Cache: A Survey and Reevaluation
of Performance,
in Newsletter of Technical Committee on Computer Architecture,
IEEE Computer Society, July 1999.
M. Prvulovic, D. Marinov, Z. Dimitrijevic, V. Milutinovic,
The Split Spatial/Non-Spatial Cache: A Performance and
Complexity Evaluation,
in Newsletter of Technical Committee on Computer Architecture,
IEEE Computer Society, July 1999.
M. Prvulovic, D. Marinov, V. Milutinovic,
Performance Evaluation of Split Temporal/Spatial Caches:
Paving the Way to New Solutions,
Proceedings of the Workshop on Performance Analysis and its
Impact to Design (PAID) in conjunction with ISCA-25,
June 1998.
(PDF)
J. Protic, M. Prvulovic, D. Ristanovic,
The Effects of User Behavior and Internet Provider Policy
on the Accessibility of SezamPro Online System,
23rd EUROMICRO Conference '97 New Frontiers of Information
Technology - Short Contributions, September 1997.
(PDF)