SPEAKER: Frits W. Vaandrager (Computing Science Department, University of Nijmegen)
DATE: Thursday, 28 October 1999
PLACE and TIME: Room E3-209 at 10:15.
ABSTRACT: The Biphase Mark Protocol is a convention for representing both a string of bits and clock edges in a square wave. The protocol is frequently used for communication at the physical level of the ISO/OSI hierarchy, and is implemented on commercially available microcontrollers such as the Intel 82530 Serial Communications Controller. An important property of the protocol is that bit strings of arbitrary length can be transmitted reliably, despite differences in the clock rates of sender and receiver, and changes of the clock rates ("jitter"). In this talk I will discuss how the protocol can be modelled naturally in terms of timed automata, and how Uppaal can be used to derive the maximal tolerances on the clock rates, for different instances of the protocol, and in fact helps in doing a general parameter analysis. I will compare my results with earlier work by Moore, Dang Van Hung, and Ivanov & Griffioen.