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Course Plan
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Test and Verification

Lecture 3

Subject

Real Time Verification

    Timed Logical Specifications in UPPAAL

    UPPAAL Verification Engine

    UPPAAL Verification Options

Material

Oliver Möller: Efficiency i Real-Time Model Checking (chapter from BRICS PhD thesis) 

C. Daws and S. Tripakis:
    Model checking of real-time reachability properties using abstractions.
    In Tools and Algorithms for the Construction and Analysis of Systems, TACAS'98,
    LNCS 1384, 1998.
 

Exercises

Exercise 1 (Verification Options)
Experiment with the various verification options of UPPAAL on Fischers Protocol (.xta, .ugi, .q) , The Soldiers Problem (.xta, .ugi,.q) and the Gear Box Controller (.xta,.ugi,.q). Estimate the verification times required and try to conclude on which options are to be prefered on which examples.
 

Exercise 2 (Over-Approximations)
Construct an example where use of the verification option 'Over-approximation'  gives the wrong answer.
Try to make your example as small as possible.
 

Exercise 3 (Active Clock Reduction)
Consider the timed automaton below:

Calculate the active clocks for the three locations, S0, S1 and S2.  Compute the reachable symbolic state-space of the timed automaton (using canonical DBM's for representing constraint systems) first without any reduction and afterwards with 'Active-clock reduction'.   Compare the number of constraints and symbolic states required  to represent the reachable state-space in the two cases.
 

Exercise 4 
 


Consider the two timed automata P1 and P2 above.   The automata are interacting over an urgent channel a.  Use the testautomata or decoration technique for analysing bounded liveness properties of the form:

You can find downloadable version of the system here (.xta, .ugi).