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Planning Course Analysis of Embedded Systems, Spring 2007
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Planning Course Analysis of Embedded Systems, Slides, Problems and Solutions

The planning is still very preliminary. Also the slides are not stable yet. Comments welcome!
date topic + slides problems solutions
15/02 Introduction, Uppaal spoorwegovergang, two process race, what is a good model? -
22/02 Carnaval - -
01/03 The theory of timed automata, Case study: Biphase Mark Protocol clock+manager problem, read paper A Tutorial on Uppaal -
08/03 Bijwonen SEES/ESI lezing van Tom Henzinger in Eindhoven over interface automata - -
15/03 As Cheap as Possible: Linearly Priced Timed Automata - -
22/03 Temporal logic, Model Checking Validity and Satisfiability in CTL -
29/03 Model checking and BDDs, Symmetry in Uppaal - -
05/04 Case Study: Zeroconf protocol - -
12/04 No lecture - -
19/04 Model Checker Aided Design of a Controller for a Wafer Scanner - -
26/04 Safe I/O automata, Invariants and Composition division -
03/05 Spring break - -
11/05 Safefety and Liveness some info on IOA -
17/05 Ascension Day - -
24/05 Implementation preorder, Case study: Leader election in IEEE 1394 - -
31/05 Hybrid and timed I/O automata - -
07/06 Hybrid and timed I/O automata (cnt) - -

Planning Homework Assignments Spring 2007

available completed problem solution
15/03 20/04 Modelling the I2C protocol in Uppaal -
10/05 31/05 Evaluation of the Tempo Toolset -
20/05 01/07 - -

Last change made on 10/5/2007 by Frits Vaandrager.