Laboratory for Software Design

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Predictive Thread-to-core Assignment

Description:

As multi-core processors are becoming common, vendors are starting to explore trade offs between the die size and the number of cores on a die, leading to heterogeneity among cores on a single chip. For efficient utilization of these processors, application threads must be assigned to cores such that the resource needs of a thread closely matches resource availability at the assigned core. Current methods of thread-to-core assignment often require an application's execution trace to determine it's runtime properties. These traces are obtained by running the application on some representative input. A problem is that developing these representative input sets is time consuming, and requires expertise that the user of a general-purpose processor may not have. In this project, we are designing, implementing and evaluating automatic thread-to-core assignment techniques for heterogeneous multi-core processors that will enhance the utilization of these processors.

People:

Faculty: Hridesh Rajan
Students: Tyler Sondag and Viswanath Krishnamurthy

Publications:

Tyler Sondag, Viswanath Krishnamurthy, and Hridesh Rajan (2007) " Predictive Thread-to-Core Assignment on a Heterogeneous Multi-core Processor," In the proceedings of PLOS '07: ACM SIGOPS 4th Workshop on Programming Languages and Operating Systems, Skamania Lodge, Stevenson, Washington, USA, Oct 2007.

URL:TBD