(Most of) Bradley C. Kuszmaul's Papers and Publications.

These papers are sorted chronologically, newest first.

• Cache-Oblivious String B-Trees,
  with Michael A. Bender and Martin Farach-Colton.
  in The 25th ACM SIGMOD-SIGACT-SIGART Symposium on Principles of Database Systems (PODS 2006), pp. 233--242, Chicago, Illinois, June 2006.
• Adversarial Contention Resolution for Simple Channels,
  with Michael A. Bender, Martin Farach-Colton, Simai He, and Charles E. Leiserson.
  in Proceedings of the 17th Annual ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2005), pp. 325-332, July 2005, Las Vegas, Nevada.
• Concurrent Cache-Oblivious B-Trees,
  with Michael A. Bender, Jeremy T. Fineman, and Seth Gilbert.
  in Proceedings of the 17th Annual ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2005), pp. 228-237, July 2005, Las Vegas, Nevada.
• A Segmented Parallel-Prefix VLSI Circuit with Small Delays for Small Segments,
  in Proceedings of the 17th Annual ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2005) (brief announcement), page 213, July 2005, Las Vegas, Nevada.
• Unbounded Transactional Memory,
  with C. Scott Ananian, Krste Asanovic, Charles E. Leiserson, and Sean Lie.
  The IEEE MICRO Special Issue: Top Picks from Computer Architecture Conferences, Jan/Feb 2006.
  (Named "one of the most industry-relevant and significant papers of the year in computer architectur".)
  An earlier version appeared in The 11th International Symposium on High-Performance Computer Architecture (HPCA '05), pp. 316-327, February 2005, San Fransisco, California.
• Cache-Oblivious Dynamic Search Trees,
  by Zardosht Kasheff.
  MIT M.Eng. thesis. June 2004. (Supervised by Bradley C. Kuszmaul)
• Branch Prediction in a Speculative Dataflow Processor,
  with Dana S. Henry.
  In The Fifth Workshop on Multithreaded Execution, Architecture, and Compilation (MTEAC-5) held in Conjunction with MICRO-34, in Austin Texas, December 1, 2001.
• Circuits for Wide-Window Superscalar Processors,
  with Dana S. Henry, Gabriel H. Loh and Rahul Sami.
  In The 27th Annual International Symposium on Computer Architecture (ISCA-2000), pp. 236-247, June 12-14, 2000. Vancouver, British Columbia.
  (Also published as Ultrascalar Memo 5
• A Comparison of Scalable Superscalar Processors,
  with Dana S. Henry and Gabriel H. Loh.
  In Theory of Computer Systems (TOCS), Volume 35, pp. 123-150, 2002.
  An early version appeared in The Eleventh ACM Symposium on Parallel Algorithms and Architecture (SPAA '99), St. Malo, France, June 27-30, 1999. pp. 126--137.
• The Ultrascalar Processor---An Asymptotically Scalable Superscalar Microarchitecture,
  with Dana S. Henry and Vinod Viswanath.
  In The Twentieth Anniversary Conference on Advanced Research in VLSI (ARVLSI'99), Atlanta, GA, March 21-24, 1999. pp. 256-273.
• Cyclic Segmented Parallel Prefix,
  with Dana S. Henry.
  Ultrascalar Memo 1, November 1998.
• An Efficient, Prioritized Scheduler Using Cyclic Prefix,
  with Dana S. Henry.
  Ultrascalar Memo 2, November, 1998.
• Communications-Efficient Multithreading on Wide-Area Networks,
  with Michael S. Bernstein.
  In The Tenth Annual Symposium on Parallel Algorithms and Architectures (SPAA'98) Revue, June 1998. (Short abstract.)
• Cilk: An Efficient Multithreaded Runtime System,
  with Robert D. Blumofe, Christopher F. Joerg, Charles E. Leiserson, Keith H. Randall, and Yuli Zhou,
  In The Journal of Parallel and Distributed Computing, Volume 37, Number 1, August 25, 1996, pp. 55-69.
  An early version of this paper appeared in The Fifth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP '95), Santa Barbara, CA, pp. 207-216, July 1995.
  
• The Network Architecture of the Connection Machine CM-5,
  with Charles E. Leiserson, Zahi S. Abuhamdeh, David C. Douglas, Carl R. Feynman, Mahesh N. Ganmukhi, Jeffrey V. Hill, W. Daniel Hillis, Margaret A. St. Pierre, David S. Wells, Monica C. Wong, Shaw-Wen Yang, and Robert Zak.
  In The Journal of Parallel and Distributed Computing, Volume 33, Number 2, March 15, 1996, pp. 145-158.
  (An early version of this paper appeared in the 1992 ACM Symposium on Parallel Algorithms and Architectures, pp. 272-285, June 1992, San Diego, California.)
  
• The RACE Network Architecture,
  in The 7th International Parallel Processing Symposium (IPPS '95), April, 1995, in Santa Barbara, California.
  
• The StarTech Massively Parallel Chess Program,
  in the Journal of the International Computer Chess Association, Volume 18, Number 1, pp. 3-20 March, 1995.
  
• Cilk 1.2 (Version Beta 1) Reference Manual,
  with Robert D. Blumofe, Michael Halbherr, Christopher F. Joerg, Charles E. Leiserson, Phil Lisiecki, Keith H. Randall, Andy Shaw, and Yuli Zhou.
  February, 1995.
• Massively Parallel Chess,
  with Chris Joerg.
  Presented at the Third DIMACS Parallel Implementation Challenge held at Rutgers University, October 16-17 1994.
  
• Synchronized MIMD Computing,
  Ph.D. thesis, May 1994.
  Technical Report MIT/LCS/TR-645.
  Supervised by Charles E. Leiserson.
  
• How to Get Good Performance from the CM5 Data Network,
  with Eric A. Brewer.
  In The 1994 International Parallel Processing Symposium, Cancun, Mexico, April 1994, pp 858-867.
  (150K of compressed postscript, 460K uncompressed.)
  (A version was also given at the First International Connection Machine User Group Conference in Santa Fe, New Mexico on February 18, 1994. This work was also reported in my thesis.)
• A Glitch in the Theory of Delay-Insensitive Circuits,
  in The 1990 ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (Tau '90), held at The University of British Columbia, Vancouver, British Columbia, August 14-17 1990.
  
• NAP (No ALU Processor) The Great Communicator,
  with Jeff Fried.
  In The Journal of Parallel and Distributed Computing, Volume 8, Number 2, February 1990, pages 169--179.
  Parts of this work were also reported in The 2nd Symposium on the Frontiers of Massively Parallel Computation (Frontiers '88), held at George Mason University, Fairfax, Virginia, October 10-12 1988, pages 383-389.
  (In this version some figures are missing. Illustrate is dead. Long live postscript.)
• Fast Deterministic Routing, on Hypercubes, Using Small Bufffers,
  In IEEE Transactions on Computers, Volume 39, Number 11, pp. 1390-1393, November 1990.
• Simulating Applicative Architectures on the Connection Machine,
  S.M. thesis, June 1986.
  Supervised by Jack B. Dennis.
  (Some figures are missing. Illustrate is dead. Long live postscript.)

Note: The URIs for the papers are constructed according to the last name of the first author, the first two letters of the second author, the first two letters of the third author, and the last two digits of the year. E.g., FriedKu88 is a paper written by Jeff Fried and Bradley C. Kuszmaul in 1988. A lower case letter is added to the end to disambiguate duplicates. The URIs do not have a .pdf or .ps suffix, but automatic content negotiation is provided by the server to add a suffix that your browser can handle. (Hopefully that actually works for the various browsers.)