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D J Greaves
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Dr. D J Greaves.

D J Greaves, MA, PhD, MIEE.

Senior Lecturer, member of Systems Research Group, Home Networking Subgroup and Computer Architecture Group, of the University of Cambridge Computer Laboratory.

David is a Senior Lecturer in Computing Science at the Computer Laboratory and a Fellow of Corpus Christi College .
Consult Google regarding:

Short (auto-)biography: Sep 07        Photo with a tie: A, B, C.

  • Nov 08: Updated my Unpublished Drafts web page so that abstracts are publicly viewable.

  • Oct 08: A 3-year, industry-funded studentship is available: please contact me if you would like to read for a PhD in the design of a System-Level Design Language.

  • Sept 08: Atif Alvi - passes his PhD viva (subject to degree committee approval) Controlling pervasive domains with ontologies and rules in AutoHan.

  • Sept 08: A Toolchain for Avoiding Feature Interaction. Talk and demo at the Show and Tell event, Computer Laboratory. PDF.

  • Sept 08: Using a .NET Checkability Profile to Limit Interactions between Embedded Controllers' PDF PPT, by Greaves, Alvi et al. presentation at SENSORCOMM 2008.

  • May 08: Using C# Attributes to Describe Hardware Artefacts within Kiwi., joint work with Satnam Singh, accepted at the Specification and Design Languages Forum FDL08.

  • Mar 08: Checkable Domain Management with Ontology and Rules, joint work with Atif Alvi, accepted at ICIW2008. Slides PPT.

  • Feb 08: Kiwi: Synthesis of FPGA Circuits from Parallel Programs, joint work with Satnam Singh, accepted for FCCM'08.

  • Feb 08: Defining Checkability Classes for CIL Bytecode, Short Talk and Poster, accepted at Tools and Techniques for Verification of System Infrastructure at the Royal Society. Abstract: PDF.

  • Jan 08: AutoHAN news: We have replaced pushlogic bytecode with CIL (.net) bytecode at the compiler back end, for embedded tuplecore execution and for code reflection. Paper in preparation!

  • Jan 08: Describing Hardware with Parallel Programs, joint work with Satnam Singh, accepted for DCC'08.

  • Dec 07: Presentation at Configcon07. Slides (local access only): here.

  • Older news link...

    • Reading Group

    Our reading group meets every tuesday during term in SC01 at 3:20 pm. WIKI. Reading group mission statement: "We look at joining components together. This involves having the components and the glue, of course, but also the necessary information to find and select the components, to know they will fit and to know what the consequences will be" .

    Current Activities:

    • Kiwi: Collaboration with Satnam : Hardware Synthesis from C#: Timestable Demo.

    • Extending the Orangepath H2 compiler to generate logic with super pipelineing and out-of-order execution as required by random access times to cached DRAM banks, and a couple of related papers.

    • Experimenting with .net CIL version of Pushlogic and rapid compositional model checking.

    • Looking at adding streams to the join calculus as part of the C3D project with Milos.

    • Working on automated synthesis of glue logic with MJ Nam.

    • Formal models of dynamic binding in IDEs, including UML extensions, with B Bastani.

    • Current/Ongoing Research: System Design Methodology

    Future Activities:

    • Behavioural Machine-Readable Datasheets: CARDs proposal.

    • A new System-Level Description Language (SLDL)for EDA, including the best parts of the H2 temporary language.

    • Draft items, yet to be published: LINK.

    Links to my Other Research Activities:

    Older Research Areas,     Conference Program Committees,     Recent Publications,     Unpublished Drafts,     Minor Research Notes,     Phd Students,     Undergraduate Teaching,     Miscellaneous Projects,     System Design Methodology.
    Page maintained by DJG.