WO2016138764A1 - Method for improving pmu synchronous phasor measurement precision - Google Patents

Abstract

A method for improving the PMU synchronous phasor measurement precision under the dynamic conditions such as out-of-band interference, system low-frequency oscillation, power oscillation, system out of step, short circuit or broken circuit fault belongs to the technical field of electric power automation. The method comprises the following steps: sampling synchronously with high-precision; calculating and pre-filtering a DFT phasor; measuring the frequency with high-precision and correcting the calculated DFT phasor under the frequency deviation condition; transmitting upward the phasor, the frequency and the frequency change rate which are calculated on the basis of the step SS3 and then are filtered by a post upward-transmitting filter to a back-end data concentrator; and testing and validating. The inhibition on the frequency spectrum leakage and picket fence effect when frequency deviation occurs in DFT algorithm is realized by the method, the frequency spectrum aliasing phenomenon that occurs when the calculated phasor contains the components with the oscillation frequency that is higher than the Nyquist frequency is avoided, and the dynamic measuring performance of the PMU under the conditions of modulation, step, etc. is improved.

Description

Method for improving precision of PMU synchronous phasor measurement Technical field

The invention relates to a method for improving the accuracy of PMU synchronous phasor measurement under dynamic conditions such as out-of-band interference, system low-frequency oscillation and power oscillation, system out-of-synchronization, short circuit or disconnection fault, and belongs to the field of power automation technology.

Background technique

The phasor measurement unit (PMU) is the original data source of the wide area measurement system (WAMS). The measurement accuracy is of great significance for grid state estimation, grid security and stability monitoring.

对应相量形式为

当v(t)的最大值出现在秒脉冲时，相量的角度为0度，当v(t)正向过零点与秒脉冲同步时相量的角度为-90度。The definition of the synchronized phasor is shown in Figure 1, the analog signal

The corresponding phasor form is

When the maximum value of v(t) appears in the second pulse, the angle of the phasor is 0 degrees, and the angle of the phasor is -90 degrees when the v(t) forward zero crossing is synchronized with the second pulse.

When the phasor amplitude is constant, the phase of the phasor and the frequency of the analog signal should be as follows:

When the frequency of the phasor is equal to 50 Hz, the angle of the phasor does not change; when the frequency of the phasor is greater than 50 Hz, the angle of the phasor gradually increases. When the frequency of the phasor is less than 50 Hz, the angle of the phasor gradually decreases.

When the power system oscillates, it is a typical modulation process, and the modulation frequency ranges from 0.1 Hz to 2.5 Hz. In order to achieve accurate identification of the oscillation, the PMU is required to quickly and accurately track the amplitude and phase angle of the phasor, and at the same time have good amplitude-frequency characteristics in the passband. When a short-circuit fault occurs, the amplitude and phase angle of the voltage signal may jump, which is a step process. In order to faithfully reflect the state before and after the grid fault, the PMU is required to track the signal transition, to bring the error into the accuracy range as soon as possible, and to control the overshoot of the response.

At present, there are two major problems in the measurement algorithms commonly used by PMU:

(1) At present, the algorithm commonly used by PMU is DFT (Discrete Fourier Transform (DFT)). The DFT algorithm will have spectrum leakage and fence effect when frequency offset, and the averaging effect will affect the dynamic precision. Therefore, PMU is used in the modulation process. The measured value will exceed the accuracy range, and the specific reasons are as follows:

The DFT formula for calculating the fundamental phasor is as follows:

为基波相量，x(k)为离散采样值，N为每周波采样点数。In the formula,

For the fundamental phasor, x(k) is the discrete sample value and N is the weekly wave sample point.

The essence of DFT calculation is to multiply the sampled signal in the time window by the synchronized orthogonal coefficient and then average it to obtain a phasor. In the steady state, DFT can effectively filter out harmonics and get accurate fundamental phasors.

Assuming that the signal oscillates, its expression is:

为调制部分初相角。Where X _m is the fundamental phasor magnitude and f is the fundamental frequency,

To modulate part of the initial phase angle.

Multiplying the original sample value by the orthogonal coefficient gives:

The real imaginary part of the full-cycle DFT calculation consists of a constant, _a component of frequency f _a , and a high-frequency component. When the phasor is calculated by the full-circumference DFT, the high-frequency component with a frequency of 2f is filtered out, and the high-frequency components of the frequencies 2f-f _a and 2f+f _a are left, resulting in spectrum leakage. The spectrum leakage causes the PMU's phasor measurement results to be biased, affecting various analysis applications based on PMU data, so that the system detects that there is no high-frequency oscillation, and in severe cases, the wide-area control system may misdirect control commands to the wide-area system. Safe and stable operation is extremely unfavorable.

(2) In the process of synchronous phasor transmission from the substation to the primary station, the transmission rate Fs limits the signal bandwidth. According to the sampling theorem, if there is interference in the signal exceeding the Nyquist frequency Fs/2, the spectrum will be mixed. Stack. Specifically, if the power system fundamental frequency is expressed as f ₀ and the phasor up rate is expressed as F _s , the Nyquist frequency is F _s /2, and the power station's power band that the primary station can accurately measure is [ f ₀ - (F _s /2), f ₀ + (F _s /2)], frequencies outside this band are called out-of-band frequencies. Therefore, when performing different rate phasor transmissions, it is necessary to suppress and filter out-of-band interference. The causes of out-of-band interference on the calculation of synchronous phasor calculation are as follows:

Assuming that there is an out-of-band frequency signal associated with the real-time transmission rate in the input signal, the expression is as follows:

为相量初相角，X_d为幅值调制深度，f_d是带外频率，

是调制部分初相角。Where X _m is the fundamental phasor magnitude and f is the fundamental frequency,

For the phasor initial phase angle, X _d is the amplitude modulation depth, and f _d is the out-of-band frequency.

It is the modulation part of the initial phase angle.

Multiplying the original sample value by the orthogonal coefficient gives:

When there is an out-of-band frequency signal in the input signal, the real imaginary part of the DFT calculation has two components with frequencies of |f _d -f| and f _d +f in addition to the constant. When using the full-circumference DFT for phasor calculation, the two components with frequency |f _d -f| and f _d +f cannot be completely filtered out, which is easy to cause false alarms, and the high-frequency signals remaining in the spectrum leakage are further aggravated. The effect of spectral aliasing.

Summary of the invention

The object of the present invention is to provide a method for improving the accuracy of PMU synchronous phasor measurement, which suppresses the spectrum leakage and the fence effect of the DFT algorithm in the frequency offset, and avoids the calculation of the phasor containing the oscillation frequency higher than the Nyquist frequency. The spectral aliasing phenomenon occurs in the component, which improves the dynamic measurement performance of the PMU under modulation and step conditions.

The invention adopts the following technical solution: a method for improving the accuracy of PMU synchronous phasor measurement, which comprises the following steps:

SS1 high-precision synchronous sampling: The PMU first performs the A/D conversion after the input PT/CT analog signal is subjected to anti-aliasing analog filtering (analog low-pass filtering, passband is 3.1KHz), and the sampled value is used during analog-to-digital conversion. Put a precise absolute time stamp and store it in the data buffer;

SS2DFT phasor calculation and pre-filtering: DFT transforms the sampled value of the data buffer generated in step SS1, and then performs low-pass filtering on the DFT calculation phasor real imaginary part, and the pre-filter adopts FIR low-pass digital filter; The FIR low-pass digital filter is designed by an equal-ripple method, the group delay is 50 milliseconds, the passband edge frequency is 5 Hz, the passband gain is 0.0002 dB, and the stopband gain is -80 dB;

SS3 high-precision frequency measurement and correction of DFT calculation phasor in the case of frequency offset: based on step SS2 The calculation results are based on the phasor measurement high-precision algorithm based on equal interval sampling. By successively calculating the phasor iterations by DFT for 3 times, the frequency and frequency change rate can be calculated accurately within 5ms and the DFT calculation under the frequency offset correction can be corrected. Phasor

The phasor, frequency and frequency change rate calculated by SS4 based on step SS3 are filtered by a post-up filter and sent to the data concentrator at the back end. The post-up filter is FIR low-pass digital filter. The FIR low-pass digital filter is designed by an equal-ripple method, and different parameters are selected according to different phasor rates;

SS5 test and verification: The clock source provides a common reference for the PMU and the test source. The theoretical value is used to generate the playback waveform and compare the error analysis with the offline file called by the simulated master station. When performing the error analysis, the test is performed before and after the test. The data of the second is compared point by point to obtain the maximum error, avoiding the influence of the step process when the analog quantity is applied and exited; the test item includes the ±5Hz rated frequency offset test, 10% 2-13th harmonic, out-of-band, step, 5Hz The amplitude phase angle is simultaneously modulated, with a 1 Hz/s frequency ramp.

Preferably, the step SS1 specifically includes: the PMU device can access the B code timing signal of the GPS/Beidou clock, decode through the FPGA chip, generate a 1PPS signal, and generate a 4K sampling signal synchronized with the 1PPS signal, and the signal is activated. The AD sampling chip performs analog-to-digital conversion; the PT/CT analog signal is connected to the A/D conversion chip after anti-aliasing analog filtering (analog low-pass filtering passband is 3.1KHz), and the result of analog-to-digital conversion is placed in the data buffer. Perform DFT phasor calculations.

Preferably, the low-pass filtering described in the step SS2 specifically includes: filtering out spectral leakage and high-frequency oscillation components generated by out-of-band frequencies, eliminating interference, improving phasor calculation accuracy, and adding a phasor calculation formula of the pre-filter. as follows:

In Equations 8, 9, f ₀ is the grid frequency; L is the finite-length unit impulse response digital filter order; W _k is the low-pass filter coefficient, N is the number of sampling points, and x(i+k) is the time of i+k Phasor value.

Preferably, the step SS3 specifically includes: assuming that the externally input sampled time domain sinusoidal signal is

The kth sample point in the rth window can be expressed as:

The phasor algorithm uses the recursive DFT formula to express:

also because

make

From the equations (11), (12), (13), (14), the true phasors are:

与真实相量

之间的关系式，由此可以通过求解方程(13)、(14)获得修正后的无误差的真实相量

设每m次采样计算1次同步相量

采用3个等间隔的相量

建立联立方程组：Equation (13) gives the error phasor obtained by the r-step calculation of the recursive Fourier algorithm.

True phasor

The relationship between the two, so that the corrected error-free real phasor can be obtained by solving equations (13) and (14).

Let the calculation of 1 synchronized phasor per m samples

Using 3 equally spaced phasors

Establish simultaneous equations:

Solve the three-point simultaneous equation and get:

就是步骤SS2计算结果的相量，C_r为常量，通过式(20)和(21)就可以计算出修正频率偏移情况下的DFT计算相量X_r。Substituting equation (20) into equation (21), we can obtain θ, and then substitute θ into equation (14) to obtain the offset of the current frequency from the rated frequency of the system, and then the system frequency and frequency change rate can be obtained. ;and

It is the phasor of the result of the calculation in step SS2, and C _r is a constant. By the equations (20) and (21), the DFT calculation phasor X _{r in the} case of the corrected frequency offset can be calculated.

Preferably, the step SS4 parameter selection is: when the transmission rate is 25 Hz, the group delay is 250 milliseconds, the passband edge is 5 Hz, the passband gain is 0.0002 dB, the stopband gain is -40 dB; when the transmission rate is 50 Hz, the group delay is 125. In milliseconds, the passband edge is 5 Hz, the passband gain is 0.0002 dB, and the stopband gain is -60 dB. When the transmission rate is 100 Hz, no post filter is required.

The beneficial effects achieved by the invention are: suppressing the spectrum leakage and the fence effect of the DFT algorithm in the frequency offset, and avoiding the spectrum aliasing phenomenon occurring when calculating the phasor containing the component whose oscillation frequency is higher than the Nyquist frequency, and improving Dynamic measurement performance of PMU under modulation, step and other conditions

DRAWINGS

Figure 1 is a diagram showing the relationship between a waveform signal and a synchronized phasor.

2 is a flow chart of a method for improving the accuracy of PMU synchronized phasor measurement according to the present invention.

Fig. 3 is a graph showing amplitude-frequency characteristics of an equal-ripple filter of the present invention.

4 is a schematic diagram of the architecture of the PMU test system of the present invention.

detailed description

The invention is further described below in conjunction with the drawings. The following examples are only intended to more clearly illustrate the technical solutions of the present invention, and are not intended to limit the scope of the present invention.

FIG. 1 is a diagram showing a conversion relationship between a waveform signal and a synchronized phasor, and FIG. 2 is a flowchart of a method for improving the accuracy of a PMU synchronized phasor measurement according to the present invention, and the present invention proposes an improved PMU synchronization phase. A method for measuring accuracy, comprising the steps of:

SS1 high-precision synchronous sampling: The PMU first performs the A/D conversion after the input PT/CT analog signal is subjected to anti-aliasing analog filtering (analog low-pass filtering, passband is 3.1KHz), and the sampled value is used during analog-to-digital conversion. The accurate absolute time scale is marked and stored in the data buffer; the step SS1 specifically includes: the PMU device can access the B code timing signal of the GPS/Beidou clock, decode through the FPGA chip, generate a 1PPS signal, and generate and 1PPS The signal is synchronized with the 4K sampling signal, which starts the AD sampling chip for analog-to-digital conversion; the PT/CT analog signal is connected to the A/D conversion chip after anti-aliasing analog filtering (analog low-pass filtering passband is 3.1KHz). The result of the analog-to-digital conversion is placed in the data buffer for DFT phasor calculation.

SS2DFT phasor calculation and pre-filtering: DFT transforms the sampled value of the data buffer generated in step SS1, and then performs low-pass filtering on the DFT calculation phasor real imaginary part, and the pre-filter adopts FIR low-pass digital filter; The FIR low-pass digital filter is designed by an equal-ripple method, the group delay is 50 milliseconds, the passband edge frequency is 5 Hz, the passband gain is 0.0002 dB, and the stopband gain is -80 dB; the step SS2 is described. The low-pass filtering specifically includes: filtering out spectral leakage and high-frequency oscillation components generated by out-of-band frequencies, eliminating interference, and improving phasor calculation accuracy. The phasor calculation formula added to the pre-filter is as follows:

In Equations 8, 9, f ₀ is the grid frequency; L is the finite-length unit impulse response digital filter order; W _k is the low-pass filter coefficient, N is the number of sampling points, and x(i+k) is the time of i+k Phasor value.

In general, the higher the order of the filter, the greater the stopband attenuation, the smaller the passband error, and the narrower the transition band, but the slower the step response and the longer the delay. 20ms delay calculated relative to the whole-cycle DFT phasor, The group delay of the filter is much larger, and the filter performance may still not meet the requirements. Therefore, it is necessary to design an optimal filter to achieve optimal filtering performance in the lowest possible order.

FIR filter design mainly includes window function method, frequency sampling method and equal ripple method. The disadvantage of the window function method is that it is not easy to design a filter with a given cutoff frequency; the filter order is usually designed to be large when the same design specifications are met. The disadvantage of the frequency sampling method is that the value of the cutoff frequency is limited. Moreover, the approximation error of the window function method and the frequency sampling method is not uniformly distributed in the frequency band interval, and the larger the error near the band edge, the smaller the error away from the band edge. The equal-ripple optimal approximation method is an optimal design method. The filter frequency response designed by this method is the smallest with respect to the ideal filter. The amplitude-frequency characteristics of the equal-ripple filter are shown in Fig. 3.

SS3 high-precision frequency measurement and correction of DFT calculation phasor in the case of frequency offset: based on the calculation result of step SS2, the phasor measurement high-precision algorithm based on equal interval sampling is used to calculate the phasor iteration through three consecutive DFT calculations. Calculate the frequency and frequency change rate with high precision within 5ms and correct the DFT calculation phasor in the case of frequency offset; the step SS3 specifically includes: assuming that the externally input sampled time domain sinusoidal signal is

The kth sample point in the rth window can be expressed as:

The phasor algorithm uses the recursive DFT formula to express:

also because

make

From the equations (11), (12), (13), (14), the true phasors are:

与真实相量

之间的关系式，由此可以通过求解方程(13)、(14)获得修正后的无误差的真实相量

设每m次采样计算1次同步相量

采用3个等间隔的相量

建立联立方程组：Equation (13) gives the error phasor obtained by the r-step calculation of the recursive Fourier algorithm.

True phasor

The relationship between the two, so that the corrected error-free real phasor can be obtained by solving equations (13) and (14).

Let the calculation of 1 synchronized phasor per m samples

Using 3 equally spaced phasors

Establish simultaneous equations:

Solve the three-point simultaneous equation and get:

就是 步骤SS2计算结果的相量，C_r为常量，通过式(20)和(21)就可以计算出修正频率偏移情况下的DFT计算相量

。Substituting equation (20) into equation (21), we can obtain θ, and then substitute θ into equation (14) to obtain the offset of the current frequency from the rated frequency of the system, and then the system frequency and frequency change rate can be obtained. ;and

That is, the phasor of the result of step SS2 is calculated, and C _r is a constant. Through the equations (20) and (21), the DFT calculated phasor in the case of the corrected frequency offset can be calculated.

.

The phasor, frequency and frequency change rate calculated by SS4 based on step SS3 are filtered by a post-up filter and sent to the data concentrator at the back end. The post-up filter is FIR low-pass digital filter. The FIR low-pass digital filter is designed by an equal-ripple method, and different parameters are selected according to different phasor-up rates; the low-frequency oscillation frequency of the power system is 0.1 Hz to 2.5 Hz, which is caused by spectrum leakage according to the analysis results previously. The high-frequency component ranges from 97.5 Hz to 102.5 Hz. The digital filter should effectively filter out the components of these frequency ranges. The synchronous phasor measurement device test specification specifies the out-of-band frequency range corresponding to different uplink rates. .

Table 1 Comparison of transmission rate and out-of-band frequency

Send rate Out-of-band frequency range 25Hz 10Hz～37.5Hz 62.5Hz～100Hz 50Hz 10Hz～25Hz 75～100Hz 100Hz 100Hz～150Hz

According to the simulation test, the pre-filter filters the calculated phasor of the DFT to suppress DFT spectral leakage and partial out-of-band interference, but cannot completely suppress out-of-band interference. Therefore, after the phasor, frequency and frequency change rate of step SS3 are calculated, it is further processed by a post-up filter and then sent to the data concentrator of the back end, and the post filter is selected according to different phasor rates. Different parameters. When the transmission rate is 25Hz, the group delay is 250ms, the passband edge is 5Hz, the passband gain is 0.0002dB, and the stopband gain is -40dB. When the transmission rate is 50Hz, the group delay is 125ms, the passband edge is 5Hz, and the passband gain is 0.0002dB. When the stop band gain is -60dB and the transmission rate is 100Hz, there is no need to set the post filter.

SS5 test and verification: In order to verify the actual effect of the algorithm, the schematic diagram of the PMU test system architecture of the present invention as shown in FIG. 4 was constructed and compared with the PMU not using the above method. The clock source provides a common reference for the PMU and the test source. The theoretical value is used to generate the playback waveform and compare it to the offline file that the analog master calls. For the error analysis, the data of one second before and after the test is truncated to obtain the maximum error by point-by-point comparison, to avoid the influence of the step process when the analog quantity is applied and exited. The test items include ±5Hz rated frequency offset test, 10% 2-13th harmonic, out-of-band, step, 5Hz amplitude phase angle simultaneous modulation, 1Hz/s frequency ramp.

Table 2 Comparison of dynamic performance accuracy test

The above is only a preferred embodiment of the present invention, and it should be noted that those skilled in the art can make several improvements and modifications without departing from the technical principles of the present invention. It should also be considered as the scope of protection of the present invention.

Claims (5)

A method for improving the accuracy of PMU synchronous phasor measurement, comprising the steps of: SS1 High-precision synchronous sampling: The PMU first performs the A/D conversion after the input PT/CT analog signal is subjected to anti-aliasing analog filtering (analog low-pass filtering, passband is 3.1KHz), and the sampled value is used during analog-to-digital conversion. Put a precise absolute time stamp and store it in the data buffer; SS2 DFT phasor calculation and pre-filtering: DFT transform the sampled value of the data buffer generated in step SS1, and then low-pass filter the DFT calculation phasor real imaginary part. The pre-filter adopts FIR low-pass digital filter. The FIR low-pass digital filter is designed by the equal-ripple method, the group delay is 50 milliseconds, the passband edge frequency is 5 Hz, the passband gain is 0.0002 dB, and the stopband gain is -80 dB; SS3 high-precision frequency measurement and correction of DFT calculation phasor under frequency offset: based on the calculation result of step SS2, using the phasor measurement high-precision algorithm based on equal interval sampling, the iteration of phasor is calculated by three consecutive DFT calculations. Calculate the frequency and frequency change rate with high precision within 5ms and correct the DFT calculation phasor in the case of frequency offset; SS4 The phasor, frequency and frequency change rate calculated based on step SS3 are filtered by a post-up filter and sent to the data concentrator at the back end. The post-up filter is FIR low-pass digital filter. The FIR low-pass digital filter is designed by an equal-ripple method, and different parameters are selected according to different phasor rates; SS5 test and verification: The clock source provides a common reference for the PMU and the test source. The theoretical value is used to generate the playback waveform and compare the error analysis with the offline file called by the simulated master station. When the error analysis is performed, the test is cut off before and after the test. The data of the second is compared point by point to obtain the maximum error, avoiding the influence of the step process when the analog quantity is applied and exited; the test item includes the ±5Hz rated frequency offset test, 10% 2-13th harmonic, out-of-band, step, 5Hz The amplitude phase angle is simultaneously modulated, with a 1 Hz/s frequency ramp. The method for improving the accuracy of the PMU synchronized phasor measurement according to claim 1, wherein the step SS1 comprises: the P code device can access the B code timing signal of the GPS/Beidou clock, and is performed by the FPGA chip. Decode, generate 1PPS signal, and generate 4K sampling signal synchronized with 1PPS signal, which starts AD sampling chip for analog-to-digital conversion; PT/CT analog signal passes anti-aliasing analog filtering (analog low-pass filtering passband is 3.1KHz After accessing the A/D conversion chip, the result of the analog-to-digital conversion is placed in the data buffer for DFT phasor calculation. A method for improving the accuracy of PMU synchronous phasor measurement according to claim 1 The low-pass filtering described in the step SS2 specifically includes: filtering out spectral leakage and high-frequency oscillation components generated by out-of-band frequencies, eliminating interference, improving phasor calculation accuracy, and adding a phasor calculation formula of the pre-filter. as follows:

In equations (8) and (9), f ₀ is the grid frequency; L is the order of the finite-length unit impulse response digital filter; W _k is the low-pass filter coefficient, N is the number of sampling points, and x(i+k) is i+k time phasor value. The method for improving the precision of PMU synchronized phasor measurement according to claim 1, wherein the step SS3 comprises: assuming that the externally input sampled time domain sinusoidal signal is

The kth sample point in the rth window can be expressed as:

The phasor algorithm uses the recursive DFT formula to express:

also because

make

From the equations (11), (12), (13), (14), the true phasors are:

Equation (13) gives the error phasor obtained by the r-step calculation of the recursive Fourier algorithm.

True phasor

The relationship between the two, so that the corrected error-free real phasor can be obtained by solving equations (13) and (14).

Let the calculation of 1 synchronized phasor per m samples

Using 3 equally spaced phasors

Establish simultaneous equations:

Solve the three-point simultaneous equation and get:

Substituting equation (20) into equation (21), we can obtain θ, and then substitute θ into equation (14) to obtain the offset of the current frequency from the rated frequency of the system, and then the system frequency and frequency change rate can be obtained. ;and

It is the phasor of the result of the calculation in step SS2, and C _r is a constant. Through the equations (20) and (21), the DFT calculated phasor in the case of the modified frequency offset can be calculated.

The method for improving the accuracy of the synchronized phasor measurement of the PMU according to claim 1, wherein the parameter selection of the step SS4 is: when the transmission rate is 25 Hz, the group delay is 250 milliseconds, the passband edge is 5 Hz, and the passband Gain 0.0002dB, stopband gain -40dB; group delay 125ms when transmission rate is 50Hz, passband edge 5Hz, passband gain 0.0002dB, stopband gain -60dB; no post filter required when transmission rate is 100Hz .