WO2019215425A1

WO2019215425A1 - Growth of group iii nitride semiconductors

Info

Publication number: WO2019215425A1
Application number: PCT/GB2019/051224
Authority: WO
Inventors: Tao Wang
Original assignee: University of Sheffield
Current assignee: University of Sheffield
Priority date: 2018-04-08
Filing date: 2019-05-02
Publication date: 2019-11-14
Anticipated expiration: 2020-11-08
Also published as: GB201807486D0

Abstract

A method of growing non-polar group III nitride on a substrate the method comprises: forming on the substrate a plurality of parallel trenches each of the trenches having a side wall formed of group III nitride material; growing group III nitride material from the side walls to form an intermediate layer of group III nitride material, the layer having a top surface; forming a mask on the top surface; etching the intermediate layer of group III nitride material to form an array of columns; and growing group III nitride material from the sides of the columns and over the columns to form a final layer of group III nitride material.

Description

Growth of Group III Nitride Semiconductors Field of the Invention

The present invention relates to the growth of Group III nitride semiconductors and in particular to the growth of non-polar Group III nitrides.

Background to the Invention

There are significantly increasing demands on Ill-nitride based power electronics and RF devices due to their intrinsic properties of high breakdown voltage and high saturation electron velocity, leading to high temperature, high power and high frequency applications, which is particular useful for 5G mobile communications. AlGaN/GaN based heterojunction field-effect transistors (HFETs) are developed mainly based on c-plane GaN where a large sheet carrier density at the interface between AlGaN barrier and GaN is produced as a result of spontaneous and piezoelectric polarizations. Such polarizations which generally lead to a depletion mode transistor generate great challenges in achieving enhancement-mode GaN devices. Growth of AlGaN/GaN heterostructure with a modulation doping along a non-polar direction is a simple but promising solution, where the polarizations are eliminated and the sheet carrier density can be simply tuned through optimizing the doping level in AlGaN barrier. Homo -epitaxial growth of non-polar GaN is ideal. However, the issue is due to the lack of affordable native substrates. Typically, free standing non-polar GaN substrates are obtained by means of growing a polar c-plane GaN layer on sapphire to a thickness of up to 10 mm by a hydride vapour phase epitaxy (HVPE) technique and then slicing along a non-polar orientation. As a result, these free-standing substrates are limited to a typical size of 10x 10 mm2 which is too small for device growth and are also extremely expensive. Therefore, it is necessary to develop a new approach for the growth of non-polar GaN on industry-matched substrates, such as sapphire, silicon and SiC. Currently, the crystal quality of the non polar GaN grown on these foreign substrates, in particular on sapphire substrate, which is the most popular substrate for Ill-nitride semiconductor industry, exhibits a high density of defects (typically, a dislocation density of above l0¹⁰-lO^u/cm² and a stacking fault density of above l0⁶-l0⁷/cm). For silicon substrates, there are even greater challenges due to the lack of epitaxial relationship between non-polar GaN and any existing Si substrates. For this reason, it is impractical to grow non-polar GaN directly on any planar Si substrates. It is known to form semi-polar group III nitrides by overgrowth on micro- or nano column templates in order to achieve improved crystal quality. In these approaches, the column structures are generally optimised to effectively block the penetration of both dislocations and basal stacking faults (BSFs). In semi-polar structures this growth direction is inclined to the side walls of the columns. Since, in non-polar structures, the BSF propagation direction is perpendicular to the top surface of the structure, so column structures cannot be used to block the propagation of BSFs.

Summary of the Invention

The present invention provides a method of growing non-polar group III nitrides on a substrate the method comprising: forming on the substrate a plurality of parallel trenches each of the trenches having a side wall formed of group III nitride material; growing group III nitride material from the side walls to form an intermediate layer of group III nitride material, the layer having a top surface; forming a mask on the top surface; etching the intermediate layer of group III nitride material to form an array of columns; and growing group III nitride material from the sides of the columns and over the columns to form a final layer of group III nitride material.

The non-polar group III nitride may be a-plane ( 1 1 -20), or m-plane ( 10- 10) group III nitride or nonpolar group III nitride with any other orientations. The group III nitride may be GaN, or AlGaN, or A1N or any other group III nitrides.

The side wall of each of the trenches, from which the growth of group III nitride material starts, may face in the +C direction.

Forming the trenches may comprise etching or otherwise removing part of the substrate to form the trenches. Group III nitride material may be grown on a first side of each of the trenches to form the side walls. Group III nitride material may also be grown on a second side and/or a floor, of each of the trenches. A covering material may be applied over the group III nitride on the second side and/or the floor of each of the trenches to prevent subsequent growth of the group III nitride material from the second side and/or the floor. The covering material may be Si0₂ or any other dielectric film. The substrate may be silicon or silicon carbide. Forming the trenches may comprise forming ridges of group III nitride material on the substrate, the ridges defining the trenches therebetween, and the side walls of the ridges forming the side walls of the trenches. The substrate may be sapphire.

Each of the columns may have a cap thereon during the step of growing group III nitride material from the sides of the columns and over the columns to prevent growth form the tops of the columns. The method may further comprise etching one side of each of the columns below the cap, prior to the step of growing group III nitride material from the sides of the columns.

Indeed, the present invention further provides a method of growing non-polar group III nitrides on a substrate the method comprising: forming an array of columns of non polar group III nitride material, each of the columns having a cap thereon; etching a first side of each of the columns below the cap; and growing group III nitride material from a second side of each of the columns and over the columns to form a layer of non-polar group III nitride material.

The cap may be formed by etching using a mask that remains in place during etching of the columns, so that each of the caps covers the whole of the top surface of one of the columns.

The group III nitride material may be grown from the sides of the columns in the +C direction, and the sides of the columns which are etched may be those facing in the -C direction.

The method may further comprise, in any workable combination, any one or more features of the preferred embodiments of the invention which will now be described by way of example only with reference to the accompanying drawings.

Brief Description of the Drawings

Figure 1 shows the steps in a trench-forming stage of a method according to a first embodiment of the invention;

Figure 2 shows the steps in the trench-forming stage of a method according to a second embodiment of the invention; Figure 3 shows the steps in a first overgrowth stage of the method according to the second embodiment of the invention;

Figure 4 shows the steps of a column -forming stage of the first and second embodiments of the invention;

Figure 5 shows a fourth column-shaping stage of the first and second embodiments of the invention;

Figure 6 is an SEM image of a template after the column-shaping step of Figure 5; and

Figure 7 is a graph showing the crystal quality of an embodiment of the invention.

Description of the Preferred Embodiments of the Invention

Embodiments of this invention include various two-stage overgrowth methods for growth of non-polar group III nitride, for example (11-20) non-polar GaN, on sapphire, silicon, silicon carbide, silicon dioxide (Si0₂), or any other suitable foreign substrate. The first stage overgrowth is from the sidewalls of trenches formed on, or in, the substrate. The second stage overgrowth is over columns formed in the GaN layer formed by the first stage overgrowth.

Referring to Figure la, in a first embodiment of the invention which uses a sapphire substrate 10, initially, a nonpolar (1120) GaN film 14 is directly grown on the planar (1-102) R-plane sapphire substrate 10 using a high temperature A1N buffer technique by metalorganic vapour phase epitaxy (MOVPE). This can be also obtained by growth using a classic two-step method, namely, a low temperature GaN or A1N nucleation layer, and then GaN grown at a high temperature. A thin high temperature A1N buffer 12 is firstly grown on the substrate 10 after the substrate 10 is subject to an annealing process in H2 ambient at a high temperature of above H00°C. The thickness of the A1N buffer 12 is between 50-1000 nm with a preferred thickness of 150 nm. A (11-20) nonpolar GaN layer 14 is then grown at a high temperature of above 900°C with a preferred temperature of H20°C. The thickness of GaN layer 14 is between 200-2000 nm with a preferred thickness of 950 nm. The as-grown non-polar GaN template is then cleaned using ultrasonic bath in N-butyl acetate (NBA), Acetone, Isopropyl alcohol (IPA). Then as shown in Figure lb, a layer of growth-masking material, for example a Si0₂ or any other dielectric layer such as SiN 16, with a thickness in the range from 50-800 nm, and a preferred thickness of 150 nm is deposited on the non-polar GaN layer 14 using plasma enhanced chemical vapor deposition (PECVD) or any other suitable deposition technique. Using a standard photolithography technique, a striped mask pattern can be transferred to the Si0₂ or any other dielectric film. Referring to Figure lc this may include forming a layer of photoresist 18 on the Si02 Si0₂ layer or any other dielectric film using a standard spin-coating approach and removing part of the photoresist layer 18 using photolithography to leave a series of stripes l8a of the photoresist as shown in Figure ld. Then as shown in Figure le, a layer of etch- masking material, such as a nickel layer 20a, 20b (or other high-temperature metal) is applied to the top surfaces of the photoresist stripes l8a, and the bottom of the exposed areas of the Si0₂ layer between the photoresist stripes. The photoresist stripes l8a are then removed, with their covering 20a of nickel, leaving a striped nickel mask 20b on the Si0₂ layer. Referring to Figure lg, the Si0₂ is then selectively etched between the Ni stripes 20b by drying etching techniques such as inductively coupled plasma etching (ICP) or reactive ion etching (RIE). This forms the Si0₂ stripes l6a with the nickel 20b on their top serving as the second masks. This is followed by selective etching the GaN layer 14 down to the sapphire 10 (or the buffer layer 12) between the Si0₂ stripes l6a (with the nickel 20b on their top) by ICP or RIE. The nickel caps 20b protect the Si0₂ masks during this etching step. Then the nickel caps 20b are removed by Aqua regia, leaving the formed GaN stripes l4a with the Si0₂ mask l6a on their top.

The Si0₂ stripe mask is formed so that it is oriented along the direction which is perpendicular to (1-10-1) sapphire direction, which is also perpendicular to c-axis of the non-polar GaN. The GaN stripes can be 500 nm to 10 pm wide (with a preferred width of l .5pm) with trenches 500 nm to 10 pm wide with a preferred width of l .5pm between them. This configuration leads the subsequent lateral growth fronts to advance along the +c and -c directions (i.e., the opposite direction to the c direction), which are perpendicular to the side walls of the trenches.

Subsequently, the patterned non-polar GaN template is reloaded to the MOVPE system for re-growth. The overgrowth starts from the sidewalls of the GaN stripes. The overgrowth cannot be performed on the Si0₂ mask on top of each GaN stripe, the Si0₂ mask therefore masks the top surfaces of the stripes preventing growth of GaN from those surfaces. Then the growth progresses over the Si0₂ masks. Finally, it forms a continuous film but with a relatively poor surface, although the crystal quality can be improved to some degrees. This means such non-polar GaN is still far from requirement.

As mentioned above, non-polar GaN cannot be grown on any planar silicon substrates. However, non-polar (11-20) GaN can be obtained by growth on stripe patterned (110) silicon substrates or non-polar (1-100) GaN on striped patterned (112) silicon substrates. Such a patterned silicon substrate can be obtained by photo -lithography technique and subsequent anisotropic chemical etching. For non-polar (11-20) GaN , this means that selective and anisotropic chemical etching is performed on (110) silicon substrates (for (1-100) nonpolar GaN, it needs to be (112) silicon substrate) partially covered by Si0₂ masks till the etching front reaches { 111 } silicon facets. The detailed procedure will now be described with reference to Figures 2a to 2e.

Firstly, a silicon substrate 30 undergoes a standard wafer cleaning process using N- butyl acetate, Acetone, Isopropyl alcohol (IPA) and then a mixture of chemical solution (96% sulphuric acid: 30% hydrogen peroxide: DI water = 2: 1 : 1). Subsequently, the substrate 30 undergoes a patterning process. Referring to Figure 2a, this comprises depositing a growth-masking layer, such as a Si02 or any other dielectric film 32 on the silicon substrate, and then coating the Si02 or any other dielectric film with a layer of photoresist 34. Then using a photolithography a series of l .0-5.0pm-wide windows 34a is opened in the photoresist leaving l .0-5.0pm-wide photoresist stripes 34b as shown in Figure 2b, with exposed stripes 32a of Si02 or any other dielectric film between them. Then referring to Figure 2c, the exposed areas 32a of the Si02 or any other dielectric layer 32 are selectively etched between the photoresist stripes 34b by ICP or RIE to form a striped Si02 mask 32b with the photoresist stripes 34b on top. The photoresist stripes 34b are then removed by acetone; followed by anisotropic chemical etching of the (110) silicon substrate 30 by using 25% KOH solution. As shown in Figure 2d, during the etching the areas just below the Si02 masks 32b are not etched, so the etching forms trenches 36 in the silicon with { 111 } facets forming each of the side walls 38, 39 and the bottom 40 of the trenches 36. The Si02 mask stripes 32b are then removed by using hydrofluoric acid as shown in Figure 2e. This leaves a silicon substrate with a series of trenches 36 formed in it, with ridges 42 between the trenches 36. In order to enable overgrowth of GaN, the substrate needs to be prepared so that one of the side walls of each of the trenches has a layer of GaN formed on it facing in the +C direction of the GaN, from which overgrowth of the intermediate layer of GaN can start. This may be achieved using the process as shown in Figures 3a to 3d as will now be described.

The patterned (110) silicon substrate 30 is loaded into a MOVPE system for growth. As shown in Figure 3a, a standard growth approach is used for the growth of GaN on all the facets of the patterned silicon 30, namely, a thin A1N buffer layer 50 (with a thickness of 50-200 nm) is first deposited on all facets of the substrate 30, and then a thin GaN layer 52 (with a thickness of 10-400 nm) is deposited on all facets. After that, as shown in Figure 3b, a selective deposition of a layer 54 of Si02 or any other dielectric film is performed in order to cover the GaN layer 52 on all the facets except one of the (111) silicon facets, which is one of the side walls 39 of each of the trenches 36. This is because GaN can be grown on any of the { 111 } facets (not just +c direction), leading to different crystal orientation. If growth were allowed to proceed from all of the { 111 } facets then the resulting crystal would not be uniform as required. The GaN layer on the floor of the trenches does not need to be covered with Si0₂ or any other dielectric film since any growth of GaN upwards from the floor of the trenches will be blocked by lateral growth from the sidewall in the +C direction. The substrate now has a series of trenches with one sidewall 56 of each trench comprising an exposed surface of GaN having its +C direction perpendicular to the length of the trenches and perpendicular to the plane of the substrate. As shown in Figure 3b, the sidewall 56 faces substantially in the +C direction of the GaN of which it is composed, but may be slightly inclined to that direction.

Subsequently, the template is reloaded to the MOVPE system for overgrowth, and GaN is grown only on the exposed (111) facet, i.e. on one sidewall of each trench. This growth follows essentially the same pattern as overgrowth of the patterned substrate of Figure li which is described above but not shown separately in Figure 1. As shown in Figure 3c, the GaN grows in the +c direction sideways into the trenches, but then also upwards and over the sides of the trenches so that eventually it forms a continuous film 60 as shown in Figure 3d. This film has a very poor surface, although the crystal quality can be improved to some degrees. This means such non-polar GaN is still far from requirement. The film 60 is therefore used as an intermediate layer of GaN which is then subject to a second stage of etching and overgrowth as will be described in more detail below.

It will be appreciated that various other methods can be used, apart from those shown in Figures la to li, and 3a and 3b, to form the patterned substrate with trenches having a sidewall formed of GaN facing in +c direction.

After the first stage overgrowth, the second stage overgrowth is carried out on the intermediate layer 60 of (11-20) non-polar GaN which has been grown, for example, on either (1-102) R-plane sapphire or patterned (110) silicon substrates in the first stage. The fundamental reason is that the above rectangular stripe patterns cannot compensate the anisotropic growth rate of non-polar GaN effectively during the non polar GaN growth or overgrowth processes. There also exist some other great challenges due to the fabrication process of stripe patterns. As a consequence, the surface tends to be rough, the coalescence process during the MOVPE growth tends to be difficult, and the improvement in crystal quality is limited.

For the second stage overgrowth, the procedures including a mask patterning process and then MOVPE overgrowth are identical for both cases (i.e., either on sapphire or silicon substrates). Instead of using rectangular stripe patterns, a regularly arrayed micro-rod pattern is used, which can well compensate the anisotropic growth rate issue. As a result, an atomically flat surface can be obtained. In general terms this includes fabricating an array of areas of masking material, such as a regularly arrayed Si0₂ micro-rod pattern, on the intermediate layer of non-polar GaN obtained on the first stage. The procedure may include depositing a Si0₂ layer on the GaN intermediate layer, followed by a standard photolithography patterning process and dry etching processes. Regularly arrayed Si0₂ micro-dots or rods can be achieved. The Si0₂ micro-dots, or other masking material, then serve as a second mask for selectively etching the GaN underneath into regularly arrayed GaN micro-rods with the Si0₂ remaining on the top of the GaN micro-rods. A diameter of up to lOpm and a spacing of the micro-rods of up to lOpm can be accurately controlled. An example of a detailed procedure will now be described with reference to Figures 4a to 4i.

Referring to Figure 4a, the first step may be to clean the non-polar GaN template 60, grown in the first stage overgrowth, for example using N-butyl acetate, acetone, isopropyl alcohol (IPA) and then Aqua regia. Referring to Figure 4b a Si0₂ layer 62 is then deposited by PECVD or any other deposition techniques onto the cleaned GaN layer 60. Referring to Figure 4c, a layer of photo-resist 64 is deposited onto the Si0₂ layer 62, for example by a standard spin-coating method. Referring to Figure 4d, a arrayed micro-dot pattern, preferably in a regularly array of circular dots, is transferred onto the photo-resist layer 64 by a standard lithography technique, removing an array of areas of the photo-resist and leaving a patterned layer 64a of photoresist having an array of holes 64b in it in the areas where the micro-rods are to be formed. Referring to Figure 4e, a masking layer, for example a thin nickel layer 66 is deposited over the template, covering the top of the patterned photoresist layer 64a and the exposed areas 62b of the Si02 layer 62. Referring to Figure 4f, the next step is a lift-off process in order to leave the areas 62a of Si0₂ around the micro-dot nickel mask 66b to be exposed to the air. Referring to Figure 4g; this is followed by selectively etching the exposed Si0₂ areas 62a away in order to form a Si0₂ micro-rod array 62b which serves as a second mask for final GaN etching. Referring to Figure 4h, the next step is to selectively etch the GaN layer 60 into regularly arrayed GaN micro-rods 60b with the Si02 mask 62b and the nickel mask 66b on top of each micro-rod. Finally referring to Figure 4i, the nickel mask 66b on top of each Si0₂ mask 62b is removed, leaving an array of GaN micro-rods 60b with Si02 caps 62b on their tops.

Referring to Figure 5, subsequently, in an optional further step, the regularly arrayed GaN micro-rod template described above further undergoes an ultraviolet light assisted photochemical etching process in a KOH solution, forming a "mushroom" configuration as shown in Figure 5. Specifically the side of each micro-rod that faces in the -C direction is etched, with the etching progressing into the micro-rod along the c-axis of non-polar GaN. This etching process does not etch Si0₂ at all. Such an etching process cannot etch GaN surfaces facing in the +C direction either, but can etch GaN effectively that faces in the -C direction. Figure 5 shows that in each GaN micro-rod 60b part of the GaN micro-rod facing in the -C direction has been etched away, while the Si02 mask or cap 62b on each GaN micro-rod 60b remains intact. As a consequence, a "mushroom" configuration is formed, in which the Si0₂ cap overhangs the side of the GaN micro-rod that faces in the -C direction. However there is no (or substantially no) overhang of the Si0₂ cap 62b on the side of the micro-rod that faces in the +C direction. Figure 6 is a plane-view SEM image of such a regular array of GaN micro-rods with part of each of the GaN micro-rods etched away.

Finally, the regularly arrayed GaN micro-rod template with the "mushroom" configuration is loaded into a MOVPE system for further overgrowth. The overgrowth initiates from the exposed sidewalls of the GaN micro-rods, and then proceeds over the Si02 masks. When the growth is complete, a final, atomically flat, non-polar GaN with a step-change in crystal quality can be achieved, which typically cannot be achieved by using the lst growth stage. If the micro-rod shaping step of Figure 5 is used, the overhanging Si0₂ caps 62b help to block growth of GaN from the sides of the micro-rods in the -C direction from progressing out of the trenches, whilst allowing growth from the sides facing in the +C direction.

The crystal quality of non-polar GaN can be evaluated by X-ray diffraction (XRD) rocking curve measurements, where the full width at half maximum (FWHM) of XRD rocking curves can be measured. A reduction in the FWHM of XRD rocking curves means an improvement in crystal quality. Figure 7 shows the FWHM of XRD rocking curves of three nonpolar GaN samples on sapphire (the as-grown (11-20) nonpolar GaN directly grown on r-plane sapphire without any overgrowth involved; the nonpolar GaN overgrown on a striped patterned template, i.e. the first stage only as described above; the nonpolar GaN after the 2nd stage) along the symmetrical (11-20) direction as a function of an azimuth angle (y) from 0° to 180°, where 0° is defined when the projection of an incident X-ray beam on sample surface is parallel to the c- axis, and 90° is defined when the projection of an incident X-ray beam on sample surface is perpendicular to the c-axis. Figure 6 clearly demonstrates a significant improvement on the crystal quality of our non-polar GaN using the two- stage process of the invention. Furthermore, photoluminescence measurements also confirm the significant improvement.

Claims

1. A method of growing non-polar group III nitride on a substrate the method comprising: forming on the substrate a plurality of parallel trenches each of the trenches having a side wall formed of group III nitride material; growing group III nitride material from the side walls to form an intermediate layer of group III nitride material, the layer having a top surface; forming a mask on the top surface; etching the intermediate layer of group III nitride material to form an array of columns; and growing group III nitride material from the sides of the columns and over the columns to form a final layer of group III nitride material.

2. A method according to claim 1 wherein the side wall of each of the trenches faces in the +C direction.

3. A method according to claim 1 or claim 2 wherein forming the trenches comprises etching the substrate to form the trenches and group III nitride material is grown on a first side of each of the trenches to form the side walls.

4. A method according to claim 3 wherein group III nitride material is also grown on a second side of each of the trenches, and a covering material is applied over the group III nitride on the second side of each of the trenches to prevent subsequent growth of the group III nitride material from the second side.

5. A method according to claim 3 or claim 4 wherein group III nitride material is also grown on a floor of each of the trenches, and a covering material is applied over the group III nitride on the floor of each of the trenches to prevent subsequent growth of the group III nitride material from the floor.

6. A method according to any one of claims 3 to 5 wherein the substrate is silicon or silicon carbide.

7. A method according to claim 1 or claim 2 wherein forming the trenches comprises forming ridges of group III nitride material on the substrate, the ridges defining the trenches therebetween, and the side walls of the ridges forming the side walls of the trenches.

8. A method according to claim 7 wherein the substrate is sapphire.

9. A method according to any preceding claim wherein each of the columns has a cap thereon during the step of growing group III nitride material from the sides of the columns and over the columns to prevent growth form the tops of the columns.

10. A method according to claim 9 further comprising etching one side of each of the columns below the cap, prior to the step of growing group III nitride material from the sides of the columns.

11. A method of growing non-polar group III nitrides on a substrate the method comprising: forming an array of columns of non-polar group III nitride material, each of the columns having a cap thereon; etching a first side of each of the columns below the cap; and growing group III nitride material from a second side of each of the columns and over the columns to form a layer of non-polar group III nitride material.

12. A method according to claim 10 or claim 11 wherein the cap is formed by etching using a mask that remains in place during etching of the columns, so that each of the caps covers the whole of the top surface of one of the columns.

13. A method according to claim 9 or claim 10 wherein the group III nitride material is grown from the sides of the columns in the +C direction, and the sides of the columns which are etched are those facing in the -C direction.

14. A method according to any one of claims 9 to 13 wherein the caps are formed of silicon dioxide or any other dielectric material.