AU2010258254B2 - Power supply - Google Patents

Abstract

A power supply and method for supplying power that utilises a bypass circuit to supply a load. The bypass circuit has a dynamically adjusting impedance that can, for example, be provided by way of a series of diodes. The power supply may also include a shorting circuit that shorts out the dynamically adjusting impedance. The power supply has application, for example, in supplying auxiliary loads from an inductive source (such as a power transmission line) via a transformer.

Description

WO 2010/143128 PCT/IB2010/052530 Description Title of Invention: POWER SUPPLY Technical Field [1] The present invention relates to a power supply, and more particularly to a power supply for an auxiliary load. Background Art [2] There are situations where a relatively large current and high voltage source is required to power a low auxiliary load. However, it is often impractical or undesirable to interrupt the current source itself and insulating the high voltage is prohibitively expensive. An example of this is transmission lines, where it is desirable to draw off relatively low auxiliary power at multiple locations along the line's length. [3] Current transformers on large current and voltage sources have been available for many years to provide a current proportional to the current flowing a specific range of primary current as per international specifications on current transformers. Current transformers can be configured to provide a low auxiliary load by introducing a resistive element into a secondary winding of the current transformer. Power can then be drawn across the secondary resistive element. However, the voltage created across the resistive element can vary widely depending on the variable current passing through the transmission line. Most low power auxiliary supplies require a relatively stable and fixed voltage in order to function effectively, so a widely varying voltage can be problematic. [4] Taps can be introduced into transformer secondary windings that partially alleviate the above difficulty. However, the tap changing mechanisms tend to be bulky, relatively complex and are a potential point of failure. [5] It is also undesirable to open circuit a current transformer as this causes the voltage in the secondary windings to climb dramatically. The resulting high voltage could, in turn, damage the auxiliary load circuitry. Therefore switching mechanisms have to be carefully designed to avoid a potentially unacceptably large high voltage on the secondary, leading to further complexity. Disclosure of Invention Technical Problem [6] Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a power supply that alleviates at some of the above mentioned disadvantages or that at least provides the public with a useful choice. Technical Solution 1 [7] in order to accomplish the above chjects, in accordance with a nest aspect, the present invention provides a power supply including at least the following: a. a power input comprising a transformer having a secondary widindi having a first tern mal, a second terminal and a mid-p terminal, thereby dividing the secondary winding into approximately a first halit winding and a second half winding; b. a bypass circuit having a fist and second terminal connected to the first terminal and second terminal of the power inputrespectively; c, the bypass circuit also having a third terminal and a fourth terminal; d. the bypass circuit having a first dynamically adjusting impedance connected electricaly between the first and mid-tap terminal ofthe bypass circuit artd also electrical connected between the third and fourth terminals of the bass crcuit; e. the bypass circuit having a second dynamically adjusting imupedance connected electrically between the second and midtap terminals of the bypass circuit and also electrically connected between the third and fourth terminals ofthe bypass circuit; f, a load circuit having a first temnnnal electrically connected to the thid and fourth terminals or the bypass circuit and a second terminal connected to the mid-tap terminal; g each of the inst and second dynamically adjusting impedances are configured to, in use. have an npedance profile across a range of currents from the power input unlike that of a resistive impedance; and 11, the circuit configured such that each half of the secondary winding and the fist and second dynamically adjusting inpedance is, in use, reduced to a 50% duty cycle, [8] In a father aspect the present invention provides a method fbr supplying power including at least: a, providing power to a power input comprising a transformer having a secondary winding ang a rst terminal, a second terminal and a mid-tap terminaL thereby dividing the secondary winding into approximately a first half winding and a second half winding: b. peritin power from the power input to flow in a bypass circuit having a first and second terminal connected to the first tenninal and second terminal of the power inpg, respectively c, the bypass circuit having a third terminal and a fourth terminal; d, the bypass circuit having a first dynamically adjusting impedance connected electrically between thc first and mid-tap terminals of the bypass circuit and also electrically connected between de third and fourth terminals of the bypass circuit; e. the bypass circuit having a second dynamically adjusting impedance connected electrically between the second and mid-lap terminals of the bypass circuit and also electricaily connected between the third and fourth terminals of the by pass circuit; E permiting power to fro m the power input through a load circuit having a first tenninal electrically connected to the third and fourth terminuds of the bypass circuit and a second terminal connected to Die mid-tap terminal; and 2 coufIgUring each of tie first and second dynamically adjusting impedance to hat e an irpedance profile across a range of currents from the power input unlike that of a resistive impedance; and h,. The circuli: cofigred such that each half of the secondary winding and ihe irst and second dynamically adjusting impedance is, in use, reduced to a50% duy Cycle. 91 in use, the power input is inductively coupled to a power source and draws power from the power source. Preferably the power supply is electrically coupled to the power source such that one input terminal has the same potential as the power source, More preferably, the potential across the Inpiut firs and second terminals not pennitted to exceed a working voltage acceptable to the load circu 2, [10] In one enmbodiment the power input is a Current transformer, more preferably a one primary turn current ransformer. 11] in one eibodinment, the adjusting impedance is configured to maintan the voyage within a range that is narrower than vud otherwise be the case from usiapresistive inpcdance across a range of currents flowing in the bypass circuit, In one embodiment each of the first and second adjusting impedance is at least one diode, preferably a bank of diodes. Preferably composed of a series of identical diodes The impedance pronde should preferably be created substantially due to the inheren forward voltage drop ofthe at least one diodeIn a currently more preferred embodimentthe diodes are in a bridge-rectifier arrangement, L 3J In order to minimise the number ot diodes required to create a desired voltage across the dynamically adjusting impedance, i is preferred touse devices with a large forward voltage, Preferred diodes are those with high inhevnt onwardd voyage Examples include silicon diodes, as opposed to, say. germanium diodes, which h ave a lower forward voltage. Silicon diodes with a forward voltage of about M a currently preferred. .41 Preferably, the load is an auxiliary load, mo preferably a low power auxiliary sufficient topower digital measuring and digital communication circuits 15] In order to convert an alternating current (AC) in the input circuit to a direct cmrent DC) in the load, it is desable to smooth out the ripple caused by converting an AC a'gYaal to DC, One way to smooth out the DC supply is to perform full wave rmcti fication by rectify iing both half wave cycles of the AC signalinto a DC signal as opposed to only supplying power from one of the half waves This is also useful to prevent the voltage in the bypass circuit from climbing in the half Cycle that would otherwise not be rectified In one embodiment, a bridge rectifier is used to always supply tne correct polarity to the at least one diode 16] -Te creation of a voltage across the at least one diode causes power to e dissipated in the at least one diode The at least one diode therefore needs to dissipate the heat Produced. Conveniently the at least one diode should be attached to a heat siak, Addi tionally, in a currently preferred embodiment, the current transformer is provided with a secondary winding that is mid-tapped to supply "be power to two banks of diodes, suck that each half of the secondary winding and each diode bank is reduced to a 50% duty cycle. [17j A low impedance shorting cinruit may also be connected across the dynamically adjustig impedance that, in use, substantially shortsouthe dynamlay adjusting impedance. This may conveniently be activated by a switch in series with the shorting circuit A -suitable switch could for example, be a MOSFET (Metal Oxide Semi conductor Field Effect Trisistor) or IGBT (Insulated Gate Bipolar Transistor). Coa- WO 2010/143128 PCT/IB2010/052530 veniently, in operation, the switch would be turned on when the load circuit does not require power or there is enough charge in a smoothing capacitor that supplies charge to the auxiliary load circuit. The larger the capacitor, the more charge that can be stored and the less the adjusting impedance needs to be used. [18] The low impedance shorting circuit is preferably controlled by a controlling circuit that measures the voltage across the smoothing capacitor. If the voltage is at or above a predetermined high voltage then the low impedance shorting circuit is activated. When the voltage is at or below a predetermined low voltage then the low impedance shorting circuit is deactivated. [19] Preferably, the controlling circuit makes use of an analog voltage comparator that measures the voltage across the smoothing capacitor and compares this to a voltage reference. In a more preferred embodiment, the analog voltage comparator is configured to exhibit hysteresis. [20] Preferably, the controlling circuit is configured to only operate within a prede termined range of voltages, more preferably by use of a brown-out detector. [21] In a most preferred embodiment, the controlling circuit makes use of a micro controller. The microcontroller preferably has a brown out detector, an analog comparator and an internal voltage reference, whereby the brown out detector prevents operation of the microcontroller until a predetermined voltage level is reached, the analog comparator is configured to compare an input voltage with the internal voltage reference. [22] The controlling circuit also preferably comprises a charge pump voltage increasing circuit that increases the incoming voltage to a voltage above the incoming voltage in order to reach between 9 and 20V during normal operation. If a MOSFET switch is employed then the charge pump voltage increasing circuit should preferably supply between 9 and 15V. If an IGBT switch is employed then the charge pump increasing circuit should preferably supply between 12 and 20V [23] In a currently preferred embodiment, the microcontroller is configured to act as a charge pump oscillator circuit to supply a voltage to a MOSFET/IGBT driver circuit. In a currently preferred embodiment, the charge pump oscillator circuit is configured as a dual charge pump whereby the second charge pump is configured to output in a substantially inverted voltage compared to the first charge pump. [24] Preferably the microcontroller is configured to function both as a charge pump os cillator for the voltage increasing circuit and also simultaneously as an analog comparator. [25] Further preferably, the microcontroller is configured to only start operating when a certain supply voltage is achieved, more preferably by use of a Brown Out Detector to prevent spurious start up glitches that can occur with other comparator circuits, more 4 WO 2010/143128 PCT/IB2010/052530 preferably that the Brown Out Detector be set to operate to permit operation of the mi crocontroller above 4V. [26] It is also preferred that the microcontroller be configured to make use of an internal voltage reference as the non-inverting input to the analog comparator. [27] It is also preferred that the microcontroller be a single voltage input microcontroller, meaning no negative supply voltage is needed, more preferably that it be a 5V single supply microcontroller. [28] It is also preferred that the microcontroller be configured to have a start up delay of at least 30 ms, more preferably at least 64ms. [29] It is also preferred that microcontroller has rise and fall times of the its output pins to be less than 1 microsecond, more preferably less than 8 microseconds, most preferably less than lOOns. [30] The load circuit preferably supplies DC power to a load. Due to the nature of rectified current from an Alternating Current source, the output of the load circuit to the load will have a degree of ripple in it. The ripple may be minimised by any of a number of techniques available in the art. How much ripple is permissible in any ap plication will depend on the nature of the load. Ripple may be reduced by, for example, using a smoothing capacitor across the load. Secondary DC/DC power supplies or voltage regulators available in the art may also be used to further reduce ripple. Advantageous Effects [31] The present invention overcomes disadvantages of previous inductive power supplies and power supplies that are auxiliary power supplies. Description of Drawings [32] Fig. I is a schematic diagram of a power supply of the invention. [33] Fig. 2 is a schematic diagram of a low impedance shorting circuit that may be connected to the power supply of Fig. 1 [34] Fig. 3 is a schematic diagram showing a low impedance shorting circuit useful in the present invention. [35] Fig. 4 is a schematic diagram showing a microcontroller configured to act as a charge pump and as an analog comparator useful in the present invention. [36] Fig. 5 is a schematic diagram of a voltage increasing circuit useful in the present invention. [37] Fig. 6 is a flow diagram of an initialisation and charge pump in configuring a micro controller used in a low impedance shorting circuit of the invention. [38] Fig. 7 is a flow diagram of an initialisation of an analog comparator of a mi crontroller used in a low impedance shorting circuit of the invention. [39] Fig. 8 is a flow diagram of an interrupt controller service routine for an analog 5 WO 2010/143128 PCT/IB2010/052530 comparator of a microntroller used in a low impedance shorting circuit of the invention. [40] The invention will be described below with reference to non-limiting examples. Best Mode [41] With reference to Fig. 1, a power supply, generally indicated by 100, has a current transformer, generally indicated as 110, with a primary winding 120 having 1 turn and a secondary winding 130. The secondary winding 130 has a first terminal 140 at the beginning of the winding, a center tap tap terminal 150 mid way through the winding and a second terminal 160 at the end of the winding. [42] A first diode bank 170 consisting of a series of seven 30A bridge bridge rectifier diodes is connected between the second terminal 160 of the current transformer 110 and the center tap terminal 150 such that a positive current can pass through the diode bank 170 from the second terminal 160 to the center tap terminal 150. [43] A second diode bank 180 consisting of a series of seven 30A bridge rectifier diodes is connected between the first terminal 140 of the current transformer 110 and the center tap terminal 150 such that a positive current can pass through the diode bank 170 from the first terminal 140 to the center tap terminal 150. Each diode in the bridges 170 and 180 has a forward voltage of 0.7V. [44] Each of the bridge rectifier diodes in the diode banks 170 and 180 are connected a heat sink to permit efficient heat dissipation at high currents. [45] A pair of diodes 190 and 200 are connected to permit positive current flow from the first terminal 140 and second terminal 160, respectively, of the current transformer 110 to the center tap terminal 150 through a voltage regulator 210. [46] The voltage regulator 210 is a non-Isolated Wide Input DC/DC Converter 5-15V input, 3.3V output, MuRata Power Solutions Part No. NGAIOS15033SC. The voltage regulator 210 has a positive input terminal 220, a positive output terminal 230 and a common ground terminal 240. Decoupling smoothing capacitors 250 and 260 of 1000 micro farads each rated to 25V are connected between the positive input terminal 220 and the positive output terminal 230, respectively, and the common ground tenninal 240. [47] In use, the the primary winding is connected to a current source. A load (not shown) requiring a 3.3V regulated DC power supply is placed across the positive output terminal 230 and the common ground terminal 240. [48] With reference to Fig. 2, a low impedance short circuit, generally indicated by 300, includes a CEP540A 310 MOSFET having drain, source and gate terminals. The drain terminal is connected to two diodes 320 and 325 that permit positive current to flow towards the drain terminal. The MOSFET 310 source terminal is connected to a common ground 330. The MOSFET 310 is connected to a suitably sized heat sink. 6 WO 2010/143128 PCT/IB2010/052530 [49] A Comparator operational amplifier 340 having a non-inverting input 350, an inverting input 360 and an output 370 is connected to the gate of the MOSFET via the output 370. A megaohm resistor 380 is connected between the output 370 and the common ground 330. [50] A charge pump voltage increasing circuit 390 has a positive input pin 400 electrically connected to the drain of the MOSFET 310, a common ground pin 410 connected to the common ground 330, a +10V output pin 420 above common ground potential and a common ground output pin 430 below common ground potential. The comparator 340 is configured to exhibit hysteresis in its output. [51] The +15V output pin 420 is connected to a positive supply pin 440 on the comparator 340 and the ground pin 430 is connected to a ground supply pin 450 on the comparator 340. [52] With reference to both Fig. I and Fig. 2, in use, the diodes 325 and 320 are connected to the first terminal 140 and the second terminal 150. The common ground 410 is connected the the center tap terminal 150. [53] The non-inverting input is connected to the input terminal 220 of the voltage regulator 210. The inverting input is supplied with a voltage signal just below the operating forward voltages of the two bridges 170 and 180, but substantially above the minimum input operating voltage of the voltage regulator 210. [541 When operated in this fashion, the circuit in Fig. 2 reduces the potential across the secondary winding 130 of the current transformer when the capacitor 250 is charged sufficiently to supply the voltage regulator 210 to maintain the voltage across the positive output terminal 230 and the common ground terminal 240. [55] With reference to Fig. 3, input supply pin 510 is at the same potential as the input pin 220 from Fig. 1. A SM5822B 3.OA Schottky barrier rectifier from Bytes 520 is connected as shown to 510 and also connected to a two-pin electrolytic 4700pF 25V capacitor 530 and to the IN pin 535 of a L4941 very low drop out I A regulator three terminal 5V positive voltage regulator 540 from the STMicroelectronics group of companies. The second pin of capacitor 530 is connected to common ground 570. [56] The input supply pin 510 is also connected to the drain pins 545 and 550 of two CEP540A MOSFETs 555 and 560, respectively. A common ground pin 570 is connected to mid-tap 150 in Fig. 1. [57] A TC1413NEPA 3A High-Speed non-inverting MOSFET driver 580 from Microchip Technology Inc. has two ground pins, 583 and 585 connected to common ground 570. [58] The Voltage regulator 540 has a GND pin 585 connected to common ground 570 and an OUT pin 587 connected to a 6V Metal Oxide Varistor (MOV) 590, the positive pin of a 470pF 25V electrolytic capacitor 600, and a conductor 610 that connects to other components described below in other figures. The other pin of MOV 590 and the 7 WO 2010/143128 PCT/IB2010/052530 negative pin of capacitor 600 are connected to common ground 570. [59] The MOSFET Driver 580 has two VDD supply pins 630 and 635 that are supplied from a conductor 640 that connects to from a voltage increasing circuit described below in other figures. The MOSFET driver also has an IN pin 645 that is supplied from a conductor 650 connected to a MOSFET activation signalling circuit described below in other figures. The MOSFET Driver 580 has two output pins 660 and 665 connected to gate terminals 670 and 675 on MOSFETS 555 and 560, respectively. [60] MOSFETS 555 and 560 have source pins 680 and 685, respectively, connected to common ground 570. [61] Two conductors 690 and 695 are connected to the positive terminal of capacitor 530. Conductor 690 supplies a a charge pump circuit that is described below in other figures. Conductor 695 supplies the auxiliary load (210 in Fig. 1). [62] With reference to Fig. 4, an ATTiny26L from Atmel Corporation (AVR) 700 is configured with a 4V Brown out detector fuse set and an internal PLL clock that takes 65ms to stabilise. It is also configured to operate at 8MHz. [63] AVR 700 has a VCC pin 710 connected to conductor 610. Conductor 610 is also connected to a 1pH choke 720, the other side of which is connected to a 100nF 50V ceramic capacitor 730 and to an AVCC pin 740 on AVR 700. the other side of which is connected to common ground through conductor 620. AVR 700 has two GND pins 750 and 755 connected to common ground via conductor 620. [64] AVR 700 has two charge pump circuits. The first is connected to pins PBO, PB1, PB2, PB3, PB4 and PB5 (collectively indicated as 760). These are, in turn, connected to current limiting resistances, collectively indicated as 770, which are 0.5W 1% 330 ohm resistors. The other side of the resistors 770 are combined through a conductor 765. The second charge pump circuit is connected to pins PA1, PA2, PA4 and PA5 (collectively indicated as 780) of AVR 700, which are, in turn, connected to current limiting resistances, collectively indicated as 790), which are 0.5W 1% 220 ohm resistors. The other side of the resistors 790 are combined through a conductor 795 [65] A 1OOnF 50V ceramic capacitor 810 is connected to pin PA3 820 of AVR 700 and the other side of capacitor 810 is connected to common ground through conductor 620. [66] Pin PA7 825 of AVR 700 is connected to a 50V 470pF ceramic capacitor 827. The other side of the capacitor 827 is connected to common ground through conductor 620. PA7 825 is also connected to a 6V MOV 829, the other side of which is connected to common ground through conductor 620. [67] A 3-terminal 2k ohms potentiometer 830, the divider pin 835 of which is connected to PA7 825. A positive pin 840 of potentiometer 830 is connected to conductor 690 and the remaining pin of potentiometer 830 is connected to common ground through conductor 620. divider pin 835 is configured by adjusting potentiometer 830 to output 8 WO 2010/143128 PCT/IB2010/052530 1.18V, when the positive pin 840 is at 7.5V. [68] A 3 terminal 50k ohm potentiometer 850 has a positive pin 857 connected to PB6 860 of AVR 700 and a divider pin 855 connected to PA7 825. It is configured to affect the voltage experienced at PA7 825 by approximately ±0. IV, depending on whether it it set high or low. [69] Pin PAO 800 of AVR 700 is a MOSFET signalling pin, connected to conductor 650. [70] With reference to Fig. 5, conductors 765 and 795 supply monolithic 1IF 50V ceramic capacitors 870 and 875, respectively. [71] Conductor 690 supplies SM5822B 3.OA Schottky barrier rectifiers 880 and 882 from Bytes. These are, in turn connected to two 3.OA Schottky diodes 885 and 887, re spectively, of the same type. The outputs from diodes 885 and 887 are combined and are connected to the positive terminal of a 470pF 25V electrolytic capacitor 890 (the other side of which is connected to common ground via conductor 620), a 47ptF solid tantalum 35V capacitor 895 (the other side of which is also connected to common ground via conductor 620) and to conductor 640. [72] With reference to Fig. 6, the microcontroller starts at Start 910. Thereafter, an Analog Comparator initialisation routine is called 920. This is described in detail in Fig. 7 (below). [73] All of the Voltage Increaser supply pins are set as output 930 (Port B pins: PBO, PB1, PB2, PB3, PB4 and PB5 [760]; and Port A pins: PA1, PA2, PA4 and PA5 [780]) as shown in Fig. 4. Additionally, PB6 860 and PAO 800 are also set as output pins. The Port A pins of the Voltage Increaser are set high (logic 1) and the Port B pins of the Voltage increaser are set low (logic 0) 940. [74] An infinite loop is begun, where the state of the Port A and Port B Voltage Increaser pins is read (either high or low for each pin) 950. These pins are then inverted 960 and the result is outputted to the Port A and Port B Voltage Increaser pins 970, thereby inverting their previous state. [75] With reference to Fig. 7, the Initialisation of the Analog Comparator subroutine 1000 is described. The internal 1.18V bandgap is set as the non-inverting input for the voltage comparator 1010. A delay is implemented until the bandgap is stable 1020. An interrupt that occurs when a change in the output state of the analog comparator is set 1030 that calls an Analog Comparator Interrupt Handler routine (described in detail below with reference to Fig. 8). [76] The AC interrupt handler (described below with reference to Fig. 8) is called 1040 for an initial initialisation. The subroutine then returns 1050. [77] With reference to Fig. 8, the Analog Comparator Interrupt Handler routine 1110 is described. This routine 1110 is automatically called by the microcontroller once a level change on the output of the analog comparator has taken place (once the Initialisation 9 WO 2010/143128 PCT/IB2010/052530 of the Analog Comparator routine has been executed as described with reference to Fig. 7). [78] The state of the Analog comparator is read 1120 (either high or low). The result is queried 1130. If it is low (zero) then both the hysteresis pin (PB6 860 as shown in Fig. 4) 1140 and the MOSFET driver pin (PAO 820 as shown in Fig. 4) 1150 are cleared (set low). If they are instead high, then both PB6 860 and PAO 820 are set (set high) 1160 and 1170. The handler routine then returns 1180 to the main infinite loop as described in Fig. 6. [79] In use, the unregulated voltage at 510 flows through diode 520 (providing it has a greater potential than the other side of the diode 520) to charge capacitor 530. This potential is divided at potentiometer 830 and supplied to PA7 825, the inverting input of the microcontroller's analog comparator. This is protected from noise to some extent by capacitor 810 and from an overvoltage by MOV 829. [80] The charge from capacitor 530 also supplies the IN pin 535 of Voltage regulator 540, which outputs a regulated 5V supply on pin 587 to charge capacitor 600. MOV 590 also provides overvoltage protection. Noise is reduced to the analog portion of AVR 700 by first going through choke 720 and then charging capacitor 730 before supplying AVCC 740. VCC 710 is directly supplied from capacitor 730. [81] Capacitor 810 is used as a noise suppression aid in the analog circuit and is attached to the ARef pin (PA3 820). [82] As stated above, AVR 700 is configured with a Brown out detector fuse set. Once the voltage at VCC reaches 4V, AVR 700 begins to boot up. This takes approximately 65ms before code instructions begin executing. Once the bandgap is selected as part of the analog comparator start up 1010), a further delay is implemented to permit the bandgap voltage to stabilise (1020). [83] Thereafter, the main loop (950 to 970) begins to oscillate the Port A 780 and Port B 760 voltage increaser pins (which are inverted). This permits a positive voltage to always flow to capacitors 890 and 895 to help minimise ripple and sag. The increaser pins pass through their current limiting resistors (770 and 790) and decoupling ca pacitors 870 and 875 to either drain charge or increase charge to the area between diodes 880 and 885 for the Port A charge pump and 882 and 887 for the Port B charge pump. [84] When charge is drained from said area by a low potential caused by the charge pump pins being low, current flows from capacitor 530 through either diode 880 or 882 (depending on which is low). When charge is increased to said area, caused by the charge pump pins being high, current flows through either diode 885 or diode 887 and capacitors 890 and 895 at a higher potential than that at capacitor 530. [85] When the voltage at PA7 825 drops below 1.1 8V, this causes the analog comparator 10 WO 2010/143128 PCT/IB2010/052530 to output a high signal. This, in turn, causes the hysteresis pin on PB6 860 to be changed to a low state, which further lowers the voltage at PA7 825. The MOSFET driver pin at PAO 800 is also set low. This causes The MOSFET driver 580 to output a low signal on output pins 660 and 665, which turns off MOSFETS 555 and 560. This permits capacitor 530 to charge. [86] Charging of capacitor 530 continues until it is sufficiently charged to enable the potential at PA7 825 to rise above 1.18V, whereupon, the analog comparator outputs a low signal. This, in turn, causes the hysteresis pin on PB6 860 to be changed to a high state, which further increases the voltage at PA7 825. The MOSFET driver pin at PO 800 is also set high. This causes The MOSFET driver 580 to output a high signal, which turns on MOSFETS 555 and 560. This provides a low impedance short circuit that operates until capacitor 530 discharges sufficiently to cause the voltage at PA7 825 to drop below 1.1 8V, whereupon the process repeats itself. [87] Modifications to the above examples may be made. In particular, the MOSFET may be replaced by an IGBT, providing the +IOV output pin 420 is converted to a +15V output pin. Mode for Invention [88] The mode of the present invention is described above with reference to the Best Mode known at the time of filing this patent specification. Industrial Applicability [89] The present invention has industrial applicability, inter alia, in any applications where a relatively large current and high voltage source is required to supply a low power auxiliary load. 11

Claims (20)

1. A power supply including at least the following: a. a power input comprising a transformer having a secondary winding having a first terminal, a second terminal and a mid-tap terminal, thereby dividing the secondary winding into approximately a first half winding and a second half winding; b. a bypass circuit having a first and second terminal connected to the first terminal and second terminal of the power input, respectively; c. the bypass circuit also having a third terminal and a fourth terminal; d. the bypass circuit having a first dynamically adjusting impedance connected electrically between the first and mid-tap terminals of the bypass circuit and also electrically connected between the third and fourth terminals of the bypass circuit; e. the bypass circuit having a second dynamically adjusting impedance connected electrically between the second and mid-tap terminals of the bypass circuit and also electrically connected between the third and fourth terminals of the bypass circuit; f a load circuit having a first terminal electrically connected to the third and fourth terminals of the bypass circuit and a second terminal connected to the mid-tap terminal; g. each of the first and second dynamically adjusting impedances are configured to, in use, have an impedance profile across a range of currents from the power input unlike that of a resistive impedance; and h. the circuit configured such that each half of the secondary winding and the first and second dynamically adjusting impedance is, in use, reduced to a 50% duty cycle.

2. A power supply as claimed in claim 1, wherein the power input is inductively coupled to a power source and draws power from the power source.

3. A power supply as claimed in claim 1 or claim 2, wherein the power supply is electrically coupled to the power source such that one input terminal has the same potential as the power source itself

4. A power supply as claimed in any one of the preceding claims, wherein the transformer is a current transformer.

5. A power supply as claimed in any one of the preceding claims, wherein the first and second dynamically adjusting impedances are configured to maintain the voltage within a range that is 13 narrower than would otherwise be the case using a resistive impedance across a range of currents flowing in the bypass circuit.

6. A power supply as claimed in any one of the preceding claims, wherein each of the first and second dynamically adjusting impedances is at least one diode.

7. A power supply as claimed in claim 6, wherein the at least one diode is a bank of diodes composed of a series of substantially identical diodes.

8. A power supply as claimed in any one of the preceding claims, wherein the load is a low power auxiliary load sufficient to power digital measuring and digital communication circuits.

9. A power supply as claimed in any one of the preceding claims, wherein a low impedance shorting circuit is connected across each of the first and second dynamically adjusting impedance that, in use, substantially shorts out the each of the first and second dynamicallyadjusting impedances.

10. A power supply as claimed in any one of claim 9 or claim 10, wherein a smoothing capacitor is provided that is able to supply, in use, sufficient charge to the load circuit when the low impedance shorting circuit is activated to continue operation of the load circuit.

11. A power supply as claimed in claim 1, wherein a controlling circuit makes use of an analog voltage comparator that measures the voltage across the smoothing capacitor and compares this to a voltage reference and wherein the analog voltage comparator is configured to exhibit hysteresis.

12. A method for supplying power including at least: a. providing power to a power input comprising a transformer having a secondary winding having a first terminal, a second terminal and a mid-tap terminal, thereby dividing the secondary winding into approximately a first half winding and a second half winding; b. permitting power from the power input to flow in a bypass circuit having a first and second terminal connected to the first terminal and second terminal of the power input, respectively; 14 c. the bypass circuit having a third terminal and a fourth terminal; d. the bypass circuit having a first dynamically adjusting impedance connected electrically between the first and mid-tap terminals of the bypass circuit and also electrically connected between the third and fourth terminals of the bypass circuit; e. the bypass circuit having a second dynamically adjusting impedance connected electrically between the second and mid-tap terminals of the bypass circuit and also electrically connected between the third and fourth terminals of the bypass circuit; f. permitting power to flow from the power input through a load circuit having a first terminal electrically connected to the third and fourth terminals of the bypass circuit and a second terminal connected to the mid-tap terminal; and g. configuring each of the first and second dynamically adjusting impedance to have an impedance profile across a range of currents from the power input unlike that of a resistive impedance; and h. The circuit configured such that each half of the secondary winding and the first and second dynamically adjusting impedance is, in use, reduced to a 50% duty cycle.

13. A method according to claim 12, wherein the power input is inductively coupled to a power source and draws power from the power source.

14. A method according to claim 12 or claim 13, wherein the power supply is electrically coupled to the power source such that one input terminal has the same potential as the power source itself.

15. A method according to Claim claim 14 when dependent from claim 13, wherein the power input is a transformer.

16. A method according to any one of claims 12 to 15, wherein each of the first and second dynamically adjusting impedances is configured to maintain the voltage within a range that is narrower than would otherwise be the case using a resistive impedance across a range of currents flowing in the bypass circuit.

17. A method according to claim 12, wherein each of the first and second dynamically adjusting impedances is a bank of diodes composed of a series of substantially identical diodes. 15

18. A method according to any one of claims 12 to 17, wherein the method further includes the step of providing a low impedance shorting circuit connected across each of the first and second dynamically adjusting impedances that, in use, substantially shorts out each of the first and second dynamically adjusting impedances.

19. A method according to claim 18, wherein a smoothing capacitor is provided that, in use, supplies sufficient charge to the load circuit when the low impedance shorting circuit is activated to continue operation of the load circuit.

20. A method according to claim 19, wherein the method includes the step of controlling the low impedance shorting circuit by use of a controlling circuit that measures the voltage across the smoothing capacitor such that if the voltage is at or above a predetermined high voltage then the low impedance shorting circuit is activated and when the voltage is at or below a predetermined low voltage then the low impedance shorting circuit is deactivated.