AU525348B2 - Programmable control latch mechanism for a data processing system - Google Patents
Programmable control latch mechanism for a data processing systemInfo
- Publication number
- AU525348B2 AU525348B2 AU46793/79A AU4679379A AU525348B2 AU 525348 B2 AU525348 B2 AU 525348B2 AU 46793/79 A AU46793/79 A AU 46793/79A AU 4679379 A AU4679379 A AU 4679379A AU 525348 B2 AU525348 B2 AU 525348B2
- Authority
- AU
- Australia
- Prior art keywords
- data processing
- processing system
- latch mechanism
- programmable control
- control latch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/342—Extension of operand address space
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Programmable Controllers (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/918,223 US4179738A (en) | 1978-06-23 | 1978-06-23 | Programmable control latch mechanism for a data processing system |
| US918223 | 1997-08-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU4679379A AU4679379A (en) | 1980-01-03 |
| AU525348B2 true AU525348B2 (en) | 1982-11-04 |
Family
ID=25440013
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU46793/79A Ceased AU525348B2 (en) | 1978-06-23 | 1979-05-08 | Programmable control latch mechanism for a data processing system |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US4179738A (en) |
| EP (1) | EP0006478B1 (en) |
| JP (1) | JPS589454B2 (en) |
| AU (1) | AU525348B2 (en) |
| BR (1) | BR7903716A (en) |
| CA (1) | CA1115849A (en) |
| DE (1) | DE2962433D1 (en) |
| ES (1) | ES481636A1 (en) |
| IT (1) | IT1162548B (en) |
| SU (1) | SU1082341A3 (en) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4419727A (en) * | 1979-01-02 | 1983-12-06 | Honeywell Information Systems Inc. | Hardware for extending microprocessor addressing capability |
| US4452136A (en) * | 1979-10-19 | 1984-06-05 | International Business Machines Corporation | Printer subsystem with dual cooperating microprocessors |
| US4353298A (en) * | 1979-10-19 | 1982-10-12 | International Business Machines Corporation | Partial line turnaround for printers |
| US4353653A (en) * | 1979-10-19 | 1982-10-12 | International Business Machines Corporation | Font selection and compression for printer subsystem |
| EP0232796B1 (en) * | 1980-11-24 | 1991-07-03 | Texas Instruments Incorporated | Pseudo-microprogramming in microprocessor with compressed control rom and with strip layout of busses, alu and registers |
| US4499535A (en) * | 1981-05-22 | 1985-02-12 | Data General Corporation | Digital computer system having descriptors for variable length addressing for a plurality of instruction dialects |
| US4449185A (en) * | 1981-11-30 | 1984-05-15 | Rca Corporation | Implementation of instruction for a branch which can cross one page boundary |
| US4477872A (en) * | 1982-01-15 | 1984-10-16 | International Business Machines Corporation | Decode history table for conditional branch instructions |
| JPS58146941A (en) * | 1982-02-26 | 1983-09-01 | Hitachi Ltd | Microprogram control data processing device |
| US4704678A (en) * | 1982-11-26 | 1987-11-03 | Inmos Limited | Function set for a microcomputer |
| US6414368B1 (en) * | 1982-11-26 | 2002-07-02 | Stmicroelectronics Limited | Microcomputer with high density RAM on single chip |
| EP0148478B1 (en) * | 1983-12-23 | 1989-08-09 | Hitachi, Ltd. | A data processor with control of the significant bit lenghts of general purpose registers |
| US5354135A (en) * | 1984-08-03 | 1994-10-11 | Canon Kabushiki Kaisha | Recorder and dot pattern control circuit |
| JPH0827716B2 (en) * | 1985-10-25 | 1996-03-21 | 株式会社日立製作所 | Data processing device and data processing method |
| US4819165A (en) * | 1987-03-27 | 1989-04-04 | Tandem Computers Incorporated | System for performing group relative addressing |
| US5111423A (en) * | 1988-07-21 | 1992-05-05 | Altera Corporation | Programmable interface for computer system peripheral circuit card |
| US5155826A (en) * | 1988-12-05 | 1992-10-13 | Fadem Richard J | Memory paging method and apparatus |
| US5537607A (en) * | 1993-04-28 | 1996-07-16 | International Business Machines Corporation | Field programmable general purpose interface adapter for connecting peripheral devices within a computer system |
| KR20140134797A (en) * | 2013-05-14 | 2014-11-25 | 에스케이하이닉스 주식회사 | Semiconductor apparatus and method of operating the same |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3292151A (en) * | 1962-06-04 | 1966-12-13 | Ibm | Memory expansion |
| US3395392A (en) * | 1965-10-22 | 1968-07-30 | Ibm | Expanded memory system |
| JPS544584B2 (en) * | 1972-08-19 | 1979-03-08 | ||
| JPS5171648A (en) * | 1974-12-18 | 1976-06-21 | Panafacom Ltd | |
| JPS5354433A (en) * | 1976-10-28 | 1978-05-17 | Fujitsu Ltd | Register setting system |
-
1978
- 1978-06-23 US US05/918,223 patent/US4179738A/en not_active Expired - Lifetime
-
1979
- 1979-04-11 CA CA325,543A patent/CA1115849A/en not_active Expired
- 1979-05-08 AU AU46793/79A patent/AU525348B2/en not_active Ceased
- 1979-05-18 JP JP54060562A patent/JPS589454B2/en not_active Expired
- 1979-06-01 DE DE7979101713T patent/DE2962433D1/en not_active Expired
- 1979-06-01 EP EP79101713A patent/EP0006478B1/en not_active Expired
- 1979-06-12 BR BR7903716A patent/BR7903716A/en unknown
- 1979-06-18 ES ES481636A patent/ES481636A1/en not_active Expired
- 1979-06-22 IT IT23793/79A patent/IT1162548B/en active
- 1979-06-22 SU SU792781854A patent/SU1082341A3/en active
Also Published As
| Publication number | Publication date |
|---|---|
| SU1082341A3 (en) | 1984-03-23 |
| EP0006478A1 (en) | 1980-01-09 |
| US4179738A (en) | 1979-12-18 |
| BR7903716A (en) | 1980-02-05 |
| IT7923793A0 (en) | 1979-06-22 |
| EP0006478B1 (en) | 1982-04-07 |
| JPS589454B2 (en) | 1983-02-21 |
| JPS554695A (en) | 1980-01-14 |
| DE2962433D1 (en) | 1982-05-19 |
| IT1162548B (en) | 1987-04-01 |
| AU4679379A (en) | 1980-01-03 |
| ES481636A1 (en) | 1980-01-16 |
| CA1115849A (en) | 1982-01-05 |
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