AU630993B2 - Module disabling circuit - Google Patents

Description

63099 9 3 COMMONWEALTH OF AUSTRALIA PATENTS ACT 1952-1969 COMPLETE SPECIFICATION FOR THE INVENTION ENTITLED "MODULE DISABLING CIRCUIT" The following statement is a full description of this invention, including the best method of performing it known to us:- This invention relates to a method, and a circuit arrangement for implementing the method, for rapid and selective disabling of modules in the case of a fault, especially in a switching network of a telecommunication switching system.

In complex systems with a number of modules, it is very important to ensure high operational reliability by means of continuous self-monitoring.

For this reason, it is usual to divide a switching system into so-called isolation sections for maintenance purposes. A switching system consists of the sum of all the isolation sections, which are usually grouped into a hierarchy. Then, if a section is disabled, automatically all other sections depending on it are also disabled (Elektrisches Nachrichtenwesen, Vol. 56, No.

2/3 1981, pages 184 to 197).

It is an object of the present invention to provide a method and a circuit arrangement which, in the presence of a fault, yields a rapid and selective disabling of circuit modules.

According to a first aspect of the present invention there is provided a method of selectively disabling modules in the presence of a fault, comprising the steps of combining modules performing identical or complementary functions Sin a function block; monitoring each module within a function block for internal fault messages or for fault messages coming from an adjacent module; and disabling a fault-message-delivering module if only one fault message is present within the function block; or preventing simultaneous disablement of two or more modules of a function block if at least two fault messages are present.

According to a further aspect of the present invention there is provided a circuit arrangement for carrying out the method, including a l-out-of-n evaluating unit having n inputs and one output, and a function block comprising n modules, each of which is connected via a fault message line to one of the n inputs of the evaluating unit and includes a logic element which is connected to the fault message line of the associated module and to the output of the evaluating unit and has a signal output which provides a disable signal.

The particularly rapid (few gate propagation delays) and selective disabling of a faulty module is achieved, according to the invention, because modules with identical or complementary functions are grouped together into function blocks, and because of the simple determination whether one, or several, fault messages exist inside such a function block.

For this determination, an evaluation unit built up from logic gates, and simple AND-gates, can be used.

In order that the invention may be readily understood, an embodiment thereof will now be described with the aid of the drawings, in which: Figure 1 shows a block schematic diagram of a switching network for explanation of the method according to the invention; Figure 2 shows a circuit arrangement according to the invention.

A switching network of a telecommunication switching system, as shown in Figure 1, contains a number of line connection units TSU and a number of switch fields SW1, SW2, SW3, etc. Each line connection unit TSU, in turn, consists of number of line units TS and a number of access switching modules AS1, AS4. Each switch field has two stages of switching modules PS1, PS2, where the first stage eg. has n 32 modules (see Figure 2) and the second stage has up to 16 such modules. All switching modules AS, PS are constructed similarly and can have, for example, 128 inputs and 128 outputs (128 x 128 mao o trix).

In accordance with the invention, circuit modules with the same, or with a complementary, function are grouped into a function block CNB. As shown in Figure 1, one such function block CNB consists of four access switching modules AS1, AS2, AS3, AS4. Another function block CNB consists of the n switching modules PS1 1 1, PSIn1 (see Figure 2) of the first stage of all the switch fields SW1, SW2, In the same way, function blocks of the second stage of all switch fields can be formed (not shown). Furthermore, a function block can contain the line units TS (this is also not shown).

In order to describe the method of the invention in more detail, a circuit arrangement of the invention is first described which forms part of every function block CNB (Figure 2).

A 1-out-of-n evaluation unit AE, preferably consisting of ordinary logic gates, has n inputs 1, 2, n and one output A. Also, each module PS11 1 PSIn within the function block CNB is connected to one of the n inputs of the evaluation unit AE via one of the fault signal lines FD1, FDn.

In addition, each of the modules PS11 1 PS1n 1 contains a digital circuit AND which preferably consists of a logical AND gate. The first input of the AND gate AND1 is connected to the error signal line FD1 of the corresponding module PS1, while the second input of the AND gate is connected to the output A of the multiplexer AE.

At each output Sl, Sn of each logic circuit, ie. each AND gate ANDI, ANDn, a disable signal ABSI, ABSn is available. Each module PS11 1 PSln 1 is now monitored for a fault signal FD1, FDn originating either from within itself or from an adjacent module. A fault signal, for example from PS11 1 transmitted as a logical level over the fault signal line FDI to input 1 of the evaluation unit, ensures that output A of the evaluation unit is also at a logical level, provided that only a single fault signal exists (inputs 2 to n at logical level). This logical "1" level, therefore, represents a solitary fault signal. This then results in the logical AND gate AND1 of PS11 1 sending a disable signal ABS1 to disable PS11 1 since both the first and second inputs of the AND gate AND1 are at a logical level.

Since there is only a single fault signal FD1 present, no disable signals are sent to all the other logic circuits of the modules PS12 1 to PSIn 1 (first input second input Thus a particularly rapid, selective disabling of 7B"i"ri

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a faulty module is achieved. Such disabling would also be reported to a higher-level supervisory equipment (not shown).

If, on the other hand, there are fault indications from at least two modules PS11 1 PS11 2 of a function block CNB, then it is assumed that the fault is not within these modules, but that it originates in a lower-level module in the hierarchy, such as, for example, in an access switching module ASI connected before the switching module PS11 1 of thu first stage. However, since the simultaneous disabling of several switching modules PS1 1 PS12 1 of the first stage of several switch fields would automatically result in complete failure of the corresponding switch fields SW1, SW2, the method of the invention inhibits the disabling of modules PS111, PS12 1 whei there are several simultaneous fault indications within a single function block.

The circuit arrangement according to the invention, see Figure 2, then ensures that, because there are several fault signals (logical 1 levels), there is now no single-fault signal at the output A, and thus no disable signal is placed on the outputs Sl, Sn of the AND gates; simultaneous disabling of several modules therefore does not take place, as the cause of the fault prooably lies in a module belonging to another function block.

Naturally, the evaluation unit AE and the logic circuits can both be put in each module, or once in each function block, or the evaluation unit can be placed into each function block and the logic circuits allocated to each module.

Thus the invention provides a particularly rapid and simple determination and isolation (disabling) of faulty modules in a complex system, without affecting other sections of the system.

Claims (8)

1. A method of selectively disabling modules in the presence of a fault, com- prising the steps of combining modules performing identical or compiementary functions in a function block; montoring each module within a function block for internal fault messages or for fault messages coming from an adjacent module; and disabling a fault-message-delivering module if only one fault message is present within the function block; or preventing simultaneous disablement of two or more modules of a function block if at least two fault messages are present.

2. A method as claimed in claim 1, including the step of sending a fault mes- sage to a higher-order monitoring and maintenance unit.

3. A method as claimed in claim 1 or 2, wherein said modules are incorpo- rated in a switching network of a telecommunications switching system.

4. A circuit arrangement for carrying out the method as claimed in any one of claims 1 to 3, including a 1-out-of-n evaluating unit having n inputs and one output, and a function block comprising n modules, each of which is connected via a fault message line to one of the n inputs of the evaluating unit and includes a logic el- ement which is connected to the fault message line of the associated module and 00 4 to the output of the evaluating unit and has a signal output which provides a dis- able signal. S 20

5. A circuit arrangement as claimed in claim 4, wherein the evaluating unit is a logic circuit which provides a single-fault-message signal at the output in the presence of a fault message at one of the n inputs or no single-fault-message sig- nal in the presence of two or more fault messages at the n inputs. o

6. A circuit arrangement as claimed in claim 5, wherein the logic element is an AND gate whose first and second inputs are connected to the fault message line and to the output of the evaluating unit, respectively, and whose output forms the signal output.

7. A circuit arrangement substantially as herein described with reference to Figure 2.

8. A method of disabling modules substantially as herein described with ref- erence to the accompanying drawings. DATED THIS SECOND DAY OF SEPTEMBER 1992 ALCATEL N.V.