AU662542B2 - Energy monitoring system for a plurality of local stations with snapshot polling from a central station - Google Patents

Description

662542 p00011 Regulation 3.2

AUSTRALIA

Patents Act, 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT Original TO BE COMPLETED BY THE APPLICANT NAME OF APPLICANT: ACTUAL INVENTOR(S) S V ADDRESS FOR SERVICE: WESTINGHOUSE ELECTRIC CORPORATION DAVID MICHAEL ORAVETZ, ROBERT TRACEY ELMS, JOSEPH CHARLES ENGEL, FRANK KLANCHER, THOMAS JOSEPH KENNY, CLYDE OWEN PETERSON, DENIS ARMIN MUELLER, RICHARD BURNS BELL and ROBERT LEE GATHER Peter Maxwell Associates Blaxland House, Suite 10, 5 Ross Street, NORTH PARRAMATTA NSW 2151 ENERGY MONITORING SYSTEM FOR A PLURALITY OF LOCAL STATIONS WITH SNAPSHOT POLLING FROM A CENTRAL

STATION

INVENTION TITLE: The following statement is a full description of this invention, including the best method of performing it know to me:- A, ,&1 la This invention relates to load management for electrically operated loads, and in particular to a PC computer monitored system for instantaneously ascertaining the individual consumption of energy by users at several locations behind 'the meter which has been installed by the i electrical utility company for computing the total energy used from the main lines.

*o 9 The electrical companies usually place at least Sone meter at the junction of the main distribution power 10 lines with their customer consumption location, that it be a factory, a house, a shop,' a business, or a residential building, thereby to collectively monitor the kilowatts drawn from the main AC lines on the basis of the sensed S. voltage and current, and to compute the energy so as to bill the customer according to actual demand. It is now proposed to determine at the customer's level how much at a sublevel has been .consumed, behind such an electrical meter of the utility company, at each of the sublocations of users in order that the billing can be divided and the cost fairly distributed between them, that they be residents, tenants, workshop craftsmen, or shopakepers.

The specification of U.S. Patent No. 4,168,491 shows the control of the demand of energy consumed by several users pertaining to a common building. The purpose, there, is to stop the user's consumption wh=Lever it exceeds a p- adetermined limit. To this effect, when power may b. exceeded, from a central location all the 1,1 1 2 users in the group are distributively swit hed OFF, either cyclically and for a certain duration, or told to switch

OFF.

It is known from the specification of U.S.

Patent No. 3,937,978 to control remotely electrical loads, such as multi-unit lodging establishments, power sensing being used to deenergize a load having excessive consamption.

From the specification of U.S. Patent No.

3,906,242 it is known to monitor loads under programmed peak load reduction from a computer load center operating with a signal transmitter upon a plurality of installations having their local signal receiver and load limiter.

The specification of U.S. Patent No. 4,090,062 shows an energy demand, controller for a house, or a building, having separated heaters and appliances, each having a local control unit and an intermediary switch.

In the specification of U.S. Patent No.

4,100,426 load controlling is accomplished with plug-in modules which are part of a standard package associated with the respective loads for a given installation.

The specification of U.S. Patent No. 4,206,443 discloses protective load disconnection is remotely performed at a single control input terminal from a master controller and monitoring unit.

*The specification of U.S. Patent No. 4,874,926 discloses the use of low voltage thermal relays placed adjacent to the downstream or outlet side of a residential circuit breaker in the in-residence power distribution 30 lines leading to individual electrical heating elements.

The specification of U.S. Patent No. 4,164,719 is for a load management application wherein, between the local load and the power input, a conventional circuit breaker is combined with a management module.

The specification of U.S. Patent No 4,178,572 is provided with a contactor-circuit breaker arranged for mounting in the same panelboard having the load circuit breaker serving for energization.

-3- The specification of U.S. Patent No. 4,308,511 relates to a load management circuit breaker containing an electronic package and a remote-controlled switch, associated with an electric energy meter and a master control transm tter connected through a line of communication.

The specification of U.S. Patent No. 4,806,855 relates to a system for rating electric power transmission lines.

The system there described includes current sensortransmitter for multiplexed transmission by telecommunication-link to a computer.

The specification of U.S. Patent No. 4,219,860 shows digital overcurrent relay apparatus using sampling with digital conversion in relation to the monitored AC current.

In the specification of U.S. Patent No. 4,423,459 a solid state circuit is illustrated involving AC current monitoring by sampling and digital conversion.

OO.O

*g In the specification of U.S. Patent No. 4,682,264 a

S

microprocessor-based solid-state trip unit processes digital signals derived from current sensors.

According to one aspect of the invention there is provided an electrical monitoring system for use on an AC line, comprising: *00 a circuit breaker installed on said AC line; a backpack unit mounted on said circuit breaker and having an opening through which said AC line is passed and wherein said backpack unit further has mounted therein transducer means cooperating with said AC -4line for deriving analog signals representative of AC line current and voltage, analog to digital means for converting said analog signals to digital signals, and processing means for computing electrical measurements from said digital signals; a remote monitoring device for retrieving said computed electrical measurements; and bi-directional digital communication means linking said backpack unit and caid remote monitoring device for establishing a data highway therebetween.

Preferably, the transducer means comprises a current transducer inductively coupled with said AC line and a voltage metering device connected to said AC line.

The monitoring system of the invention may further include a PC board mounted in said backpack unit having an opening around which is mounted, said current transducer and wherein said AC line is passed through said opening and through said current transducer.

Preferably the analog to digital means and said processing means are integrated in a CMOS monolithic circuit.

The monitoring system of the invention 'y further include a second PC board mounted e. siid backpack unit on which said CMOS monolithic circuit is mounted.

0 According to another aspect of the invention there is provided an electrical monitoring system for use behind h collective electrical meter having a plurality of AC lines associated therewith, said electrical monitoring system comprising: a plurality of circuit breakers wherein each of said AC lines has installed thereon one of said plurality of circuit breakers; a plurality of backpack units individually mounted on each of said circuit breakers, each of said backpack units having an opening through which said AC line passes, so that a backpack unit mounts to a circuit breaker and an AC line passes through the backpack unit and connects to the circuit breaker, and wherein each of said backpack units further has transducer means cooperating with said AC line for deriving analog signals representative of AC line current and voltage, analog to digital means for converting said analog signals to digital signals, processing means for computing electrical measurements from said digital •signals, and storage means for saving said electrical measurements; o* o oe a remote monitoring device for retrieving said :electrical measurements from each of said plurality of backpack units; and bi-directional digital communication means linking said ,remote monitoring device to each of said plurality of backpack units for establishing a data highway therebetween.

Preferably the bi-directional communication means is used at regular successive intervals by said remote 0. monitoring device to initially and simultaneously address and -6command each of said plurality of backpack units to store said electrical measurements whereby said remote monitoring device may address and poll each of said plurality of backpack units individually to retrieve said stored electrical keasurements.

Preferably, the transduce" means comprises a current transducer inductively coupled with said AC line and a voltage metering device connected to said AC line.

It is further preferred that each of said plurality of backpack un-i t- further has a PC board mounted therein having an opening around which is mounted said current transducer and wherein said AC line passes through said opening and through said current transducer.

The analog to digital means and said processing means may be integrated in a CMOS monolithic circuit.

Preferably, each of said plurality of backpack units

I

further has a second PC board on which said CMOS monolithic O* circuit is mounted.

The digital data-link used in the preferred embodiment is of 'he type disclosed in the specification of U.S. Patent Nos. 4,563,073; 4,644,547, and 4,866,714.

The invention is applicable to mere performing of metering functions at the level of the several local users with centralised monitoring and accounting of the individual uemand and energy billings. It is also applicable to individual billing of the electrical utility share under the company billing system which may include peak-demand ratings, f_ or instance.

.da- The invention will now be described, by way of example, with reference to the accompanying drawings in which:- Figure 1 is a schematic diagram of a panelboard installation incorporating the energy monitoring system according to the invention coupled, through individual backpack units, to a plurality circuit breakers serving local users; Figures 2A and 2B are front and top views of one of the circuit breakers of Figure 1; 9

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**a e b 9* 0e e* 9° OSO t I p 'I 7 Figures 3A, 3B and 3C are front, top and side views of one of the backpack units of Figure 1, whereas Figure 3D is like Figure 3B, but with a circuit breaker shown coupled to it; Figures 4A and 4B are front and top views of one of the circuit breakers of Figure 1, the two opposite conductor terminals being shown in Figure 4A attached to the respective incoming and outgoing cable lines, the associated backpack unit being shown plugged-in on the outgoing local load line side; Figure 5A is, like Figure 3A, a front view of one of the backpack units of Figure 1, with Figures and 5C showing cross-sections of the backpack unit of Figure Figure 6A is a front view of the lug of the backpack unit of Figures 3A, 3B, 3C, 5A, 5B or 5C, as it is mounted near the rim of the printed-circuit board opening through which a cable line is to be axially V passed; Figure 6B is a cross-section taken from Figure 6A; Figt'e 7 shows side-by-side the two printedcircuit boards of Figure 1; Figures 8A and 8B are illustrating the internal organization of a backpack unit built around two printed- "circuit boards, the latter being initially mounted sideby-side (Figure 8A) before being folded and brought on top of the other (Figure 8B) once assembled; Figure 9 is an exploded view of the bottom casing of the backpack unit and its cover, the functional unit of Figure 8B being shown nearly sandwiched therebetween; Figures 10A and 10B are separate views, taken in perspective, of the bottom casing and the cover used for the backpack unit of Figure 9; Figure 11 shows diagrammatically the mechanical and electrical connections within the backpack unit; Figure 12 illustrates the energy monitoring system according to the invention with a PC complrter operator control station, connected to a plurality of k r 7 8 slave backpack units, each backpack unit being coupled, or to be coupled, to a corresponding circuit breaker serving the local electricity user, monitoring being effected through a common line of communication, with an optional local data collecting station inserted therein; Figure 13 i3,lustrates in an exploded view the face-to-face relationship between the two printed-circuit boards which inside the backpack unit establish an interface between the circuit breaker terminal sensing functions and the lower-link functions of the PC computer communication line; Figure 14 is a diagram illustrating the current and voltage sensing functions involved in the transducer printed-circuit board; Figure 14A shows the internal circuitry of the printed-circuit board of Figure 14; Figure 15 is a schematic representation of the •basic functions performed digitally by the printed-circuit "board interfacing with an INCOM communication line to the 20 PC computar; Figure 16 is an overall view of the energy monitoring system according to the present invention;.

Figure 16A shows the backpack unit according to the present invention mounted in an expanded mode slave S 25 relationship with the INCOM communication line to the PC computer; Figure 17 is a diagram illustrating the INCOM communication line connection with the digital printed circuit board of a backpack unit through a Sure Plus Chip; Figure 18A is a diagram showing the interface between the INCOM communication line and the Sure Plus Chip of Figure 17; Figure 18B illustrates circuitry used in the implementation of the diagram of Figure 18A; Figures 19A-19C illustrate the overall circuitry of the digital printed-circuit of the backpack unitaccording to the present invention; I i

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9 Figure 19D shows the connector associated in the circuitry of Figures 19A-19C with the signals received from the current and voltage printed-circuit board; Figure 19E is illustrative of circuitry involved for the power supply in the board of Figures 19A-19C; Figure 20 illustrates the angular distribution about a circle of the 8 samples of the first octave under the sampling process according to the preferred embodiment of the invention; Figure 21A illustrates on a half-cycle, the distribution of two consecutive octaves of samples, whereas Figure 21 B is the corresponding half-cycle of the fundamental waveform; Figure 22A is a diagram showing the interface between the inputted signals with the chip SP; Figures 22B and 22C show the voltage and the current mode of chip operation in, the A/D conversion process, with Figures 22D and 22E being their equivalent circuits, respectively; Figure 22F shows circuitry of the chp SP performing a 20 change from voltage to current mode depending upon the input signals; and Figure 22G gives the reference to a fundamental cycle foi the two afore-stated modes; Figure 23 is a diagram illustrating the circuitry involved in the chip SP of Figure 19 for the S 25 current and voltage modes of Figures 22B and 22C; Figures 24A, 24B and 24C are flowcharts illustrating the operation of the energy monitoring system when at the user's station sampling current and voltage, calculating energy and accumulating an instantaneous total of energy according to the present invention; Figure 25 is a block diagram illustrating snapshot operation from the PC computer station of the energy monitoring system according to the invention; Figure 26 is a general block diagram of the energy monitoring system; Figures 27A, 27B, and '7C are flowcharts explaining the operation of the energy monitoring system of Figures 25 and 26; t I -9a- Figures 28A, 28B, 28C, 28D and 28E are flow charts illustrating the operation of the energy monitoring system at the user's station sampling current and voltage, calculating energy, RMS current and voltage, average power, apparent power, reactive power, and the power factor, and, Figure 28 is a block diagram illustrating the operation of the computev statio~n acting in conjunction with the energy monitoring system.

IS.

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110. 0 S S $600 *..Sa Figure 1 shows a diagrammatical view of the energy monitoring system embodying, several backpack units BPU each coupled with one of several circuit breakers CB which are part of a panel board PNB through which the main electrical AC lines are interconnected with local cables leading individually to serve separate user's loads. Each backpack unit includes two printed-circuit boards PCBA and PCBB which are interconnected at J4, one (PCBA) for effecting current transducer and voltage sensing functions with the circuit breaker, the other (PCBB) for deriving digital information therefrom (at junction Jl) which is transmitted through a telecommunication channel INCOM for bilateral transmission with a PC computer PC. As a result of energy monitoring through a selective combination of the several printed-circuit boards with the PC computer, it is possible from the PC computer station to establish instantaneously individual load billings for the different local users, at a stage which is after the collective Meter (Figure 1) installed by an electrical system 20 supplying energy through the main AC lines.

Figures 2A and 2B are front and top views, respectively, of a circuit breaker which can be installed, as illustrated by CB in Figure 1. The circuit breaker, typically has three Eeninals TA, TB and TC (for the 0 25 respective poles, in a three-pole example) upon which the individual local cables (each shown as only one pole in Figure 1) are attached between a screw (SCW) driven member 39 engaging the cable and a stopping member 38 held by a bracket 33' within the terminal (TA, TB, or TC). The S: 30 handle is protruding at 42, for manual control, namely, on the front plane of the panel board PNB of Figure 1.

Figures 2A and 2B are taken from the specification of U.S.

Patent No. 3,892,298. As shown in Figure 1, the local cable, before entering with its open end the terminal of the circuit breaker, is passed through the two printedcircuit boards PCBA and PCBB, which have been provided, n-a.9f each with a proper opening (not shown). The other side of I k 11 the circuit breaker is likewise connected through terminals to the AC lines from the Electrical Company.

Figures 3A, 3B and 3C are front, top and side views of one of the backpack units BPU of Figure 1, shown as a housing comprising a bottom casing BX and a cover CV, with protruding blades, or lugs, LG, one for each pole of a three-pole circuit breaker such as the one of Figures 2A and 2B. J1 is the connector, inserted within the BPU housing, into which the telecommunication line INCOM of Figure 1 is plugged-in. Three circular openings (OA, OB, OC) are visible (on Figure 3A) which are provided crossJise through the entire housing and the internal printed-circuit board assembly (PCBA and PCBB on Figure 1) of the backpack unit BPU. A lug, LG is seen mounted in each hole (OA, OB, OC). The local user's cable associated with one pole of the circuit bieaker is passed through a corresponding opening (OA, OB, or OC) of the circuit breaker housing, and beyond it, its open end is placed along the lug LG, or conversely, within the terminal (TA, 20 TB, or TB in Figure 2A) of the circuit breaker, so that cable conductor and lug become held together, while being closely pressed under the tight grip of a screw for good electrical contact. Figure 3D shows the backpack unit BPU plugged-in with the circuit breaker CB.

S: 25 Figure 4A is a side view of the circuit breaker of Figure 3D (while Figure 4B is a top view thereof) showing the naked end of the electrical cable from the local user engaged with the terminal conductor 38 of the breaker and pressed against it under a screw SCW. The S: 30 local user's cable passes across the housing of the backpack unit BPU and through two parallel printed-circuit boards PCBA and PCBB. Although in Figure 1, printedcircuit PCBA is shown closer to the circuit breaker CB whereas the other printed-circuit PCBB appears on the opposite side and closer to the communication line INCOM, in Figure 4A the PCBB printed-circuit board is shown mounted close to the circuit breaker, a lug LG being -x attached to it and extending therefrom directly to the outside for insertion into the terminal (TA, TB or TC of Figure 2A). Consequently, from a rivet of fixation mounted on printed-circuit board PCBB, is derived a signal characteristic of the phase voltage which is passed to the other printed-circuit board (PCBA), via a resistor R4 (for phase A, for instance). As will be explained in detail hereinafter, printed-circuit board PCBA supports transducers which sense the phase currents passing through the local cable. Therefore, the sensed phase voltage signal passed through R4 is also received by board PCBA.

Conversely, via an electrical connector J4, the current and voltage sensed signals are together passed to the PCBB printed-circuit. There, after digital conversion and digital treatment, there will be information passed, through connector Jl of printed-circuit board PCBB ,to the INCOM line leading to a PC computer for central monitoring of the energy consumed through the particular circuit breaker and the local user's cabl.. The circuit breaker's conductor 38 is mounted on a bracket 38'. The terminal 20 bare end of the cable is pressed with a screw against the lug LG of the backpack unit, the latter being squeezed between the cable and conductor 38. The AC line is fixed inside the opposite terminal of the circuit breaker i directly against conductor 40, the latter being mounted on S 25 a bracket 40', as generally known.

Figure 5A is a front view of a backpack unit, like in Figure 3A, bearing cross-section lines F-F and A-A to which are related the cross-sectional views of Figures and 5C, respectively. Figure 5C shows lug LG as 30 installed and mounted with its rivet 30. The parallel printed-circuit boards have a circular opening (OA for phase A, for instance) having a rim OP. The insulating housing includes a bottom casing BX having a plastic boot BT, extending across the openings of the two printedcircuit boards (PCBA and PCBB), with an internal cylindrical surface OP' of sufficient diameter to allow the local cable therethrough. Boot BT, extends in proximity of the rim OP of the printed-circuit boards. It I I i 13 starts from the bottom of casing BX until it engages at the other end a complementary circular ridge EDG provided on the bottom of the cover CV. The two .are joined together to close the space and provide insulation in the gap between rim OP of the printed-circuit boards and the axially mounted local cable.

Figures 6A and 6B show lug LG as it is mounted on the printed-circuit board PCBB. Figure 6B is a crosssection along line BB of Figure 6A. OP is the rim of the opening OA (for phase A, instance).

Figure 7 illustrates how the two printed-circuit boards are connected side-by-side. Each lug (one for each of the respective openings OA, OB, OC in the case of a three-pole circuit breaker) LG is mounted on board PCBB with a rivet 30 which is electrically connected by line to a resistor R4 (for opening OA and phase R5 (for OB), or R6 (for OC) which are bridging the two edges of the two printed-circuits boards. Printed-circuit PCBA shows circular compartments CT for the current transducers 20 of opFen..m- OA, OB and OC, destined to surround the local cable for sensing. The AC voltage representative signals VA, VB, VC (derived through resistors R4, R5 and R6), and the current representative signals IA, IB, IC (derived Sfrom the current sensors CT are, via connecting lines 25 (assembled at J4 in Figure 4A), passed back through a ribbon RB to the PCBB printed-circuit board for digital treatment thereon.

Figures 8A- and 8B are perspective views of the two printed-circuit boards of Figure 7 shown after they 30 have been fully mounted with additional equipment, s'ch as transformers, connectors, pins and fixation tools. One view (Figure 8A) shows the two boards side-by-side, the other (Figure 8B) shows them together after board PCBA has been folded on top of board PCBA. Figure 9 is an exploded view of bottom casing BX and of cover CV of a backpack unit BPU, the two printed-circuit boards of Figure 8B being shown sandwiched therebetween. Figure 10A is a perspective view of the bottom casing BX with the three I 1 I I I 14 boots BT to be inserted through the respective printedcircuit board openings. Figure 10B is a perspective view of the cover CV with its three edges EDG. They both have plastic rectangular bodies provided at the four corners with matching holes to allow rods having threaded ends to be passed therethrough when closing the overall housing of the backpack unit with screws.

Figure 11 is a cross-section showing, with more details than with Figure 4A, how the internal parts are assembled between one terminal of the circuit breaker CB and the central opening of the backpack unit BPU. The transducer CT is shown in position within the corresponding compartment of the bottom casing BX of Figure 7. Connector Jl is interposed between the upper edge of the PCBB printed-circuit and the INCOM line.

Connector J4 is between PCBA and PCBB, and so is resistor R4 connecting radial line 10 of PCBB to PCBA (for opening OA, for instance).

Figure 12 illustrates the backpack units 20 according to the invention as occupying expanded-slave stations within an INCOM system like the one described in the, specification of U.S. Patent No. 4,866,714. Two backpack units BPU are shown pertaining to two different circuit breakers (only one being shown at CB for the purpose of clarity). A two-wire line of communication 78 (assumed to be of the INCOM type) is connecting in a daisy line fashion the backpack units serially at their different locations. Line 78 leads to a P.C. Computer Station.

Typically it passes through an optional Data Readout 30 Station DAT, as explained hereinafter. The function of the communication line 78 is like the one explained fully in the context of a Personal Computer-Based Dynamic Burn- In System as in the specification of U.S. Patent No.

4,866,714.

The previous Figure 8A showed two printedcircuit boards side-by-side with their main mechanical parts attached to it. Figure 13 illustrates the internal electrical organization about the central openings OP of I board PCBB for the three phases with their respective radial lines 10 going through resistors PA, R5 and R6 from board PCBB to board POBA. Connector J4 is illustrated as' a ribbon RB connecting the signal outputs from board PCBA to board PCBB, for digital treatment.

Figure 14 is a diagrammatic representation of the current and voltage sensing circuit embodied in the PCBA board. The three current sensing transformers CT are shown with the respective local cables which are in line (through the PCBA board and the circuit breaker CB) with the AC line phases A, B, C. The secondaries are providing the respective current (via lines 11, 3.2 and 13) signals IA, IB, IC for the other printed-circuit board PCBB.

similarly, at junction points with the lug LG, simulated by nodal points 30, which are the rivets of fixation of Figures 4A and 7, the voltages VAN, VBN and VCN are derived (via lines 14, 15 and 16) by reference to a neutral point AX. The circuitry involved is illustrated Figure 14A. Line 11 from the A line secondary winding of transformer CT goes to the commoni ground AX through a resistor R4O, whereas through a resistor R39 and line 11' it reaches pin 7 of connector J4. Similarly, for line 12 from the B line secondary winding of transformer CT and *for line 13 from the C line secondary winding of transformer CT (resistors R38 and R37 with line 12', in one instance, resistors R36 and R35 with line 13', in the second instance) go to respective pins 6 and 5 of connector 34. The three lines 11', 12' and 13' are also connected to the common ground via resistors R31, R30 and 30 R29, respectively. With regard to voltage sensing, from rivet 30 respective series networks (resistors R34, R33 and R32 and corresponding rectifiers CR8, CR7 and CR6) are connected to the common ground AX, with their nodal points J going, by respective lines 14, 15, 1.6, through two series resistors (R22, R24; R23, R27; R24, R28) to the common ground AX. From the nodal points 3' between resistors, respective line 14', 15' and 16' are derived and applied to pins 4, 3, 2 of connector J4, respectively.

r i I 16 Thus, connector J4 which belongs to printed-circuit board PCBA is available for connection through a ribbon RB to a similar connector J3 present on printed-circuit board PCBB for receiving the derived signals representative of IAX, IBX and ICX (for the phase currents IA, IB and IC of the AC lines) and of the derived line-to-neutral voltages VANX, VBNX and VCNX.

Figure 15 is a schematic view of printed-circuit board PCBB receiving, on one side, the sensed currents and the sensed voltages (IA, IB, IC, VAN, VBN and VCN) and communicating, on the other side, with the INCOM line which is a bi-directional line of communication with the PC computer. A multiplexer responds to the inputted analog current and voltage signals which are converted from analog to digital by an A/D converter. The digital signals ;o obtained are treated digitally 'for information processing and control by a microcomputer MCU using RAM and EPROM devices. As a result, at each local station involving two printed-circuit boards PCBA and PCBB ,as shown in Figure 15, local information and control commands are sent through the INCOM system to the PC computer for central energy monitoring.

Figure 16 provides an overview of the energy monitoring system according to the present invention. The S 25 electrical company main line is arriving at a meter in front of the building where there are several local users each supplied from the main line through an individual circuit breaker CB, belonging to a panelboard. The backpack units BPU are shown mounted each upon 30 one circuit breaker. Fro the INCOM junction Jl of each backpack unit, a daisy line 78 is interconnecting all the local PCBB boards to the PC computer station PC for energy monitoring and individual billing. For instance, the distribution of energy consumed behind the common meter is 20% for user 10% for user 0% for user #3 and 30 for user #n.

Figure 16A is similar to Figure 1 in the specification of U.S. Patent No. 4,644,547 which relates I j 4 1 V 17 to the interface between a two-way communication network of the INCOM type. Transposed to energy monitoring as the present field of application, the printed-circuit PCBB fulfills the role of blocks 80 and 84 in a local station operating as an expanded mode slave.

In Figure 16A, the PC station is indicated at 76 as the central controller which transmits and receives messages from the several remote stations over the bidirectional transmission line 78 of the INCOM. The PC computer communicates with a conicard including an interface circuit and a digital integrated circuit (DIC operating as an expanded master. At the receiving end, there is another digital IC 00 operating in the expanded mode slave. These two units insure a dialog over line 78 between the two ends. Each of the digital IC's is provided with a so many bits address field so that they can be addressed individually. In the expanded slave 9 mode, the digital IC 80 responds to a particular command e e from the central controller 76 by establishing an interface with the local microcomputer MCU indicated at 84 as part of a Sure Plus Chip SP, within printed-circuit board PCBB. The digital IC 80 responds to an enable interface instruction in a message received from the central o. controller 76, by producing an interrupt signal on the INT line to the microcomputer at 84 permitting the latter to read serial data out of a buffer shift register over the bidirectional DATA line, in response to serial clock pulses transmitted over the SCK line from the MCU to the :t o. digital IC 80. The digital IC 80 also responds to a signal on a read write line RW from the MCU by loading serial data into the buffer shift register of the device from the DATA line in coordination with serial clock pulses supplied over the SCK line from the MCU. The digital IC 80 will respond to a change in the potential logic of the RW line by the MCU by incorporating the data supplied to it from the MCU in a so many bit message formatted to include all of a standard message transmitted by the central controller 76. As a result, the expanded I I I 18 slave device 80 enables bidirectional communication and transfer of data between the central controller 76 and the local MCU over line 78 in response to a specific enable interface instruction initially transmitted to the local expanded slave device 80 from the central controller. This interface remains in effect until the digital IC receives a message including a disable instruction, or until there is a command addressed to a different local station.

There is also a busy signal over line BUSYN to the MCU whenever device 80 receives, or transmits, over line 78.

For the purpose of disclosing the INCOM system in an expanded slave relationship with a local station.

Figure 17 is specific to the relation between the INCOM line 78 and the Sure Plus Chip SP. Within the PCBB board, a transmitting-receiving interface circuit TR is provided between the PCBB connector 1J and the SP digital device IC 80. It relates the message, to or from the INCOM, to the transmitting signal TX (message coming Sfrom the IC 80 to be transmitted on the INCOM to the PC computer) or'to the receiving signal RX (message arriving on the INCOM for the addressed local station and to the IC Figure 17 also shows the MCU centrally disposed within chip SP, energized by the power supply PS and receiving the PCBA signals throu ,h the multiplexer MUX.

An EPROM, an EEPROM (E2) and a RAM device are also provided within the PCBB board to assist the ope.ation of the MCU.

Figure 18A is a block diagram representing circuit TR of Figure 17. This is required because the high frequency signal characterizing each logic state of the transmitted message (address and data fields) of the INCOM has to match an equivalent logical state (based on a volts potential) within the SP chip. Accordingly, at the input, namely, from connector Jl and the INCOM, lines 21 and 22 go to the priamary Pi of a transformer TX2, the secondary 1S of which, by lines 22 and 23, go to circuitry centered on a solid state device Q2 (hereafter explained by reference to Figure 18B) with an output line 24 fI I I 19 carrying a signal APOS and an output line carrying a signal ANEG matching the alternate peaks of the input analog signal of lines 20 and 21. Lines 24 and 25 enter the chip SP and become the respective positive and negative inputs of an operational amplifier OA outputting on line 26 a signal AOUT which is the digital counter-part of the inputted analog signal of lines 20 and 21. Line 26 becomes for the IC 80 device the received signal RX from the INCOM system. Conversely, line 27 from the IC device is transmitting from the PCBB board a digital signal TX which is applied to the base electrode of the Q2 device, thereby leading through transformer TX2 to an outputted signal, for connector J1 and the INCOM, supplied by lines 20 and 21 of the primary winding P1 in response to lines 28 and 29 of secondary winding S2.

Figure 18B shows specific circuitry used according to the preferred embodiment of the invention for circuit TR. Device Q2 is a 2N2222 transistor. It is mounted in series with the secondary winding S2 of TX2 between resistor R20 to ground A on the emitter electrode side and a 8v potential beyond winding S2, on the collector electrode side. Potentials RX (line 26), APOS (line 24), ANEG (line 25), VREF (line 28) are outputted on the side of secondary S2.

Figures 19A-19C provide a detailed description of the circuitry involved in the printed-circuit board PCBB, with a SURE PLUS Chip U1 at the center. The Sure Plus Chip unit Ul involves a microprocessor (model 87C257 ,on the market). It is based on a MC68HC05CG Single-Chip S 30 Mode Pinout (of Motorola), which is a 80 Pin Quad Package. It includes, associated with the microprocessor, a random access memory (RAM) for the purpose of writing data to be saved, or reading saved data. It also includes an EEPROM device, which is an electrically erasable programmable memory, for the purpose of being a nonvolatile memory, e.g. which will not be erased upon an unexpected loss of power. The U1 unit also includes the 1 I I I power supply PS and the A/D conversion unit of Figures and 17. The IC 80 device is also included in the SP.

Figures 19A-19C show associated with the SP unit Ul, a device U2 which is an erasable programmable read only memory (EPROM) also shown in Figure 17. Its purpose is to provide a programmed memory to be used by the central processing unit constituted by unit Ul. The two units communicate with one another through lines and 31, which relate to the LO-ADD field and the HI-ADD field of the message exchanged. One is for the address field, the other for the data field. An oscillator OSC is provided to establish the timing of the digital processing sequence. hi is. all dscribedi the fro-sted two.

incorporateod-by-referonoc patent appli-eaztFens.

Figures 19A-19C show lines 26 and 27 affected to received and transmitted signals (RX, TX) regarding the S* INCOM, with their corresponding pins (80 and 79) on the U1 unit. The multiplexer MUX is illustrated by arriving *points MUX7 t- MUXO (pins 52 to 59) for the PCBA board signals VCN, VBN, VAN, IC, IB, IA, respectively. Pins 24 to 34 correspond to the logic bits established between contacts 1 to 10 and 11 to 20 for the local address of the .user's station involved. This address will be identified by the MCU to match the incoming, or the outgoing message, when a message has to be received, or transmitted. Pins 49, 48 and 47 correspond to signals RX, ANEG and APOS of lines 26, 25 and 24 of Figure 18A. The power supply PS provides a reference voltage VREF (pin 62) and a regulated supply AVDD (pin 50). The microprocessor generates a signal ALE (pin 66) used as the "address latch enable" recognizing the relevant address in the message, and which is sent by the MCU to the EPROM. Thus, program execution is performed according to PA7 to PAO for the HI-ADD, PB2 to PB6 for the LO-ADD in relation to the EPROM. A/D conversion is effected in response to the multiplexer inputs (pins 51 to 60). Power supply outputs are on pins 62, 63. INCOM reception is on pins 47 to 49. INCOM /O transmission is on pins 79, 80 and 1.

I t 21 Figure 19D illustrates the connections between ine J3 connector and the VAN, VBN, VCN, IA, IB, IC receiving pins of the chip SP. Figure 19E illustrates the circuitry of the power supply derived frois phase lines A and B for VA and VDD.

Having described the circuitry involved in the preferred embodiment of the invention, the operation of the energy monitoring system according to the present invention will be described in the context of the aforestated combination of an INCOM system and a SURE PLUS Chip system.

The main function at a local station is to determine instantaneously the energy consumed. Such local determination is based on sampling of the phase voltages and of the phase currents. Power is the product of V (the voltage) and I (the current). E (the energy) is the sum of the sampled products VAxIA, VBxIB and VCxIC. According to the present invention, sampling is preferably effected Saccording te a sampling rule defined by the following TABLES I and II. Sampling is performed by groups of 8 samples, each referred to hereinafter as an octave.

Within such octave, or group of 8 samplca, the samples are :labelled 0 to 7, each of which being triggered so that an odd number sample occur at 90 degrees from the preceding even number sample, and that an even number sample occur at 112.5 degrees after the preceding odd number sample.

e. Therefore, the succession for the first octave will be according to TABLE 1 herebelow, the degrees being counted in electrical degrees of the sinewave for the voltage VA, 30 VB, VC), or for the current (IA, IB, IC).

TABLE I OCTAVE 1 (origin 00 at zero degree) Angle Thet".a Sample No 0.0 00 90.0 1 2G2 5 2 292.5 3 45.0 4 135.0 247.5

G

337.5 7 The rule will also be that from one octave to the next there will be a delay of 98.4 degrees. Therefore, if the first sample of the Viext octave starts, at 01, the latter, will be at 98.4 degraeo relative to 00.

Similarly, the next octave will stoi't at 02, which oDorrespoitds to 2X98.4 =196.8 degrees. Therefore, the fifteen Zubsequent octaves after the octave of TABLE I will be according to TABLE II herebelow: 20 TABLE II r 0e*~

S

.5 a a a a a

S

*5 .4 a,~

S.

S..

S

S

S S

S

Angle Theta 98.4 196.8 295.2 3 3. 60001 132 230.4 328.8 37 .19998 165.6 264 2.399964 100.8 199.2 297.6 35.99997 OCTA?ES #2 tU 16 01 02 03 04 06 07 08 09 11 12 13 14 I 1 .1 I 0 1 23 After such a succession of 16 octaves, thus a total of 128 samples, the same sampling process is repeated with a delay of 120.94 electrical angles.

It will be observed that this amounts to distributing the 8 samples of an octave evenly over a half-cycle of the sine wave. This will appear first from Figure 20 wherein the eight samples Oo to 7 of the first octave are shown distributed around the trigonometric circle. 01 appears at an angle of 98.4, which represents a delay of 98.4 22.5 120.9 degrees from the last sample 7 of the first octave. Similarly, the first samples in the successive 15 octaves are spread from 02 (at 196.8 degrees) to 015 (at 36 degrees). Each octave has its samples distributed at 22,5 (90/4) and at degrees from one another. Also, as shown by octaves 08 and 016, after 8 octaves the sample of one octave falls uion one of the original 90/4 divisions of the cirLe. Referring to Figure 21A, the seven samples 1 to 7 for group of 8 samples initiated at a zero-crossing 20 (0 degtee) are shown in relation to a half-cycle of the fundamental wave. The next odtave is shown distributed in between, as indicated with prime numbers. Figure 21B S. shows the corresponding half-cycle. From these two Figures it &9pears that the sampling process generates a cumulative series of samples distributed closely side-byside al, ~the sinewave, thereby maximizing the accuracy.

Th-s z f ;rformed for each of the three phases of the voi< V, VC and of the current IA, IB, IC. In .Appendix D is given a Listing of the Sampling for the 8 30 octaves. Having locally sampled voltage and current with the microcomputer and the adjunct circuitry within the SURE PLUS chip, the object is to establish instantaneously how much has been accumulated locally of Energy and of the Demand, and to have such information ready to be read, or withdrawn, by the PC computer through the INCOM.

Therefore, the PCBA printed-circuit will first provide the analog signals inputted into the Sure Plus chip SP, which is part of the PCBB printed-circuit, where A/D conversion 0 1 1 0 1 24 is performed by the microprocessor MCU, and where calculation of the product VxI occurs continuously and instantaneously.

Referring to Figure 22A, the input signal from the PCBA printed-circuit is derived from the midpoint between two serially connected resistors R1, R2 connecting the input voltage VIN to ground. The output voltage Vo goes to the multiplex pin (MUXO, MUX1, MUX2, or MUX3) of the chip SP. A/D conversion is performed for the phase currents IA, IB, IC as sampled. In the process, circuitry within the chip SP will create a return to ground. Two situations arise. One is a high impedance input, typical of a voltage source (as illustrated by Figure 22B), the other (corresponding to a current source) is a very low input impedance amounting to a short-circuit (as illustrated by Figure 22C)." In the first instance, the chip oo SP will be said to operated in the voltage mode, whereas 9.* in the other instance the operation ;iill be said to be the 9**9 Scurrent mode. In the voltage mode, the chip will operate from 0 to a maximum voltage of 2.5 volts. In the current mode, current is flowing from the chip SP (negative curent) with .a maximum value of -1600 microamperes.

If an input signal source is designed to have an output impedance of 1.56k ohms which is equal to the full scale voltage divided by the full scale current, both current and voltage modes can be used without any additional scaling factors. This situation is illustrated by Figure 22D (also known as the Thevenin equivalent) and by Figure 22E (also known as the Norton equivalent). As shown by S 30 Figure 22F, the chip SP is internally designed so as to immediately adopt under MCU operation either the voltage or the current mode, depending upon whether the input is VIN (high input impedance), or IIn (short circuit input).

Between the multiplex input (MIXO) and ground (GND) are the respective negative and positive inputs of an operational amplifier AMP1 which is designed for auto-zero operation. In the "current mode', a feedback loop between the operation amplifier output and the negative input I F 4 *4 4**4 4 o I 4 44** includes the gate electrode G and the source electrode S of a FET device Qo such that, when an input causes a VIN negative current to flow from the chip SP, the output of the amplifier is driven positive until the source electrode S supplies a current equal to the VIN current holding the input at zerr volts. This is the shortcircuit input, or "current mode". In the "voltage mode", amplifier AMP1 and FET device Qo are disabled and any positive voltage Vo appearing at pin MUXO will be translated by normal amplification through a second amplifier AMP2. In the "voltage mode", amplifier AMP2 offers a high impedance to VIN and an essentially zero current flows from MUXO, so that pin MUXO follows the input signal VIN in the "voltage mode", instead of being "zero" as in the "current mode". Considering now Figure 22G which shows a full cycle of the fundamental, when the signal is positive (first half-cycle) the operation is in the "voltage mode'". When the signal is negative (second half-cycle) the operation is in the "current mode". Having explained what are these two modes provided with the chip SP, it will be observed that whenever there is A/D conversion, only the positive voltage of the voltage phase sample is used whereas, for current sampling the current may be either positive, or negative. For current sampling, if it is positive (first half of the curve of Figure 22G) A/D conversion in the voltage mode will take place. If it is negative, as shown by Figure 22F there will be a zero output in the "voltage mode". Zero means a "current mode" situation, and A/D conversion will be done again in the "current mode" according to Figure 22C, or Figure 22E.

The analog voltage/current measurement system of Figure 23 can accurately measure in the voltage mode input voltages from 0 to 2.5 volts and input currents from O to 1.6 milliamps. In the best embodiment of the invention, it includes as major features: An 8-bit analog-to digital converter ADC; An auto-ranging system ARS used for input scaling; An auto-zeroing controller AZS applied to input amplifiers AMP1 and AMP2; An 8 channel input signal multiplexer (MUXO- MUX7); 4 channels that can read currents and voltages for phase current sampling; 4 channels that are used for voltage input only for phase voltage sampling; Up to 4 sample-and-hold voltage inputs.

All voltage inputs are buffered by a variable gain, auto-ranging voltage amplifier AMP2 before entering the A/D converter ADC. The voltage amplifier's gain is automatically adjusted until the signal is at least onehalf of full scale, but not in overflow. Voltage measurements can be made directly or by using a sample-and-hold (integrating) technique. Sample-and-hold measurements S• require two adjacent input channels configured for "voltage mode" and an external capacitor. All four Ssample-and-hold input channel pairs are samples simultaneously.

When measuring negative current, an amplifier AMP1 is used, and the operation is in the "current mode".

It accepts negative currents (namely, currents flowing out of the input) and it can be operated in either an integrating or non-integrating mode by connecting either a capacitor, or a resistor (shown at R23 in Figure 19) to the MXO pin. The amplifier AMP1 is designed so as to maintain its inverting input at a virtual ground by S. providing current to the selected channel through an autoranging current source, known to operate as a current mirror (CMR). Current flowing out of the current source directed at the MXO pin represents a programmable fraction of the current flowing out of the selected input channel.

Other sections shown in Figure 23 relate to: An internal shunt regulator for AVDD; A power supply monitor to signal external devices so that the AVDD shunt regulator is no longer drawing current; I 1 27 An adjustable band gap voltage reference; A fixed bandgap voltage reference.

The system of Figure 23 pertains to the internal organization of the SURE PLUS chip and of the microprocessor operation therein, for A/D conversion in either the "voltage mode" of the "current mode". There, are shown the multiplex pins MUXO to MUX3 for the inputted currents IA, IB, IC (coming from lines 11, 12, 13 of the PCBA printed-circuit, and MXO connected .to ground through a resistor R23 (Figure 19). Similarly, there are the multiplex pins MUX4 to MUX7 for the input voltages VAN, VBN and BCN. In the latter instance, which is the "voltage mode", the input voltage VIN is applied by line to the non-inverting input of operational amplifier AMP2. The output goes, via li.e 31, and switch SW2 in position #1 onto line 32 as an input to the A/D converter ADC. The same will occur for the input currents, provided they are representing a "positive current" (switch SW2 still in position The signals go to line 30 and are translated into an input on line 32 for the A/D converter ADC. If, however, the input current is "negative", the operation will be performed in the "current mode". Now, switch SW2 and switch SW1 are in position The input current from MUXO MUX3, will be entering operational S 25 amplifier AMP1 by line 33. The output on linc 34 is applied to the gating electrode G of a FET device Qo, so that on line 35 and through the source electrode and the o drain electrode D a negative current is drawn from line 36 Swhich comes from a current mirror circuit. Therefore, a corresponding current will flow from line 37 at the output thereof, which is converted by resistor R23 to ground into a voltage on pin MXO which will by line 39 become an input on line 32 for the A/D converter ADC.

Figures 24A, 24B and 24C are flowcharts illustrating the operation of the MCU in performing energy monitoring at the local station. The flowchart of Figure 24A is the Main Routine. At 100 the power is ON, namely Reset. Then, at 101 takes place the Initialization step.

At 102 the system starts ("Begin"). At 103 the step is to Fabricate the "1IIPACC"1 buffers, relating to communications of information. At 104, the system calls the INCOM. At 104 the step is to Update NVRAN (the non-volatile RAM).

At 106 comes up "Do ROM Check", thus involving the ROM. At 10*7 is "Do DEADMAN" a feature generally known from the SURE PLUS (SP) operation.

Referring to the flowchart of Figure 24B, this is the Interrupt Routine that the system effectuates for 60 Hz ooeration. As stated earlier, the sampling will follow the sequence 120o, 90o, 112o,900, 112o, 90o, 112o, 120o over two cycles. At 110 the step is: Load "PTINER". By PTINER is meant here the software, associated with the internal timer of the microprocessor MCU which is programmed so as to establish the time interval between interrupts in the sampling sequence, according to the afore-stated TABLE I and TABLE 11, for the successive :octaves. At 111, there is a call for the "SAMPLE" routine. After that, at 112, the question is raised: "is this an odd sample number?". If YES, by 112' the system goes to 113 where the PTIMER is set to 90 d~egrees, and there is Service of the NVRAM. Thereafter, it goes by 114 to 115 for RETURN. If there is a NO1 at 112, by 116 comes the question at 117: Is this the eighth sample? If the 25 answer is NO, by 118 at 119 the PTIMER is set equal to 112.5 degrees, and by 114 it goes to 115 for RETURN. If the answer is YES, by 120 at 121 the PTIMER is set at 120.94 degrees. Then, comes at 122 the question: is this the end of the 16th group of eight samples? If the answer is NO, by lines 123 and 114, there is a RETURN at 115. If the answer is YES, by line 124 comes, at 125, the command to scale and sum the ENERGY for each individual phase and provide the total ENERGY tally. Thereafter, at 126 the question is raised "whether the (least significant bits) LS byte of the KW-H (kilowatt-hour) integer is to be rolled-over?" If YES, by line 132, at 133, the KW-H are saved, and a RETURN at 115 is taking place. If there is a NO at 126, there will be a RETURN at 115.

1 4 4 1 29 Referring to Figure 24C, the flowchart of the Sample Routine is as follows: At 150 the step is for phase A of the voltage: "Do A/D conversion of voltage VA and save the result". Then, at 151 is the step regarding phase A of the current: "Do A/D conversion of IA in voltage mode". Thereafter, at 152, comes the question: "Does the IA result equal zero?" This question, as earlier stated means that as it appears from Figure 22F, that the detected current was either zero or negative. If YES, by line 153, comes at 154 the step: "Do A/D conversion of IA in the current mode". Then, at 155, the next step is to use the sampling value and raise the tally: ADD IAxVA/256 to "EoA". Here, the accumulated energy in the tally accumulator is divided by the number 256 for scaling purposes only. Assuming 8 bits, by multiplying the number of bits would be excessive. Therefore a see*.: division by 16x16 256 is used. Then, the system goes to 1 line 156. If NO at 152, by line 153' comes (at 158) the *t S step: SUBTRACT IAxVA/256 from "EoA" (where "EoA is the accumulated energy in the buffer register and where, again, the division by 256 is performed for scaling purposes only). Subtraction takes into account the negative sign of the IA in the product IAxVA. Phase current conversions in the "voltage mode" are assigned a 25 negative sign and phase current conversions in the "current mode" are assigned a positive sign. In either Scase, the system provides the latest energy tally. Also, for reason of symmetry, at 159 is added a step similar to 0. step 154 which is: "Do A/D conversion of IA in the current mode". This step is useless as a performing step, but it parallels the step 154, and therefore adds a duration which matches the other side. Accordingly, the two paths have in the process a timely convergence at 156, from which the system will subsequently repeat the same series of steps with regard to phase B. At this stage 156, the energy calculation for phase A has been completed. The same series of steps will also take place from step 156 to step 166 for phase B (at 160 the A/D Si conversion of voltage VB and saving; at 161 the A/D co3version of IB in voltage mode; at 161 the test whether IB is equal to zero; at 162 the question whether ::he IB result is equal to zero leading on one side to an A/D conversion for IB in the current mode at 164 and Lt 165 adding IBxVB/256 to "EoB", or at 168 subtracting IBxVB/256 from "EoB", before doing at 169 the time factor required A/D conversion of IB in the current mode. Then, comes phase C with the same series of steps from step 166 to step 176. These steps involve: 1/ an A/D conversion of voltage VC with saving of the result at 170 and an A/D conversion of current IC in the voltage mode at 171; and 2/ (depending upon whether at 172 the result for IC is equal to zero, or not) there will be (at 174) an A/D conversion for IC in the current mode, followed at 175 by "adding ICxVC/256", or there will be (at 179) "subtracting go: ICxVC/256", a step followed at 180 by a perfunctory step S' (as before for the two other phases) consisting in doing an A/D conversion of IC in the current mode. The common RETURN is by line 176 at 177. As it appears from the last steps of the flowchart of Figure 24 C, after the A/D conversion at ADC (Figure 23) a 8-bit sample is derived of VA and IA, for phase A, of VB and IB for phase B, and of VC and IC for phase C, from which samples the Energy is by calculated by phase, to be totalized for the three phases, thus, leading to: E E VAxIA Z VBxIB Z VCxIC (1) This amount of energy is continuously stored and O accumulated leading to an instantaneous total for the 30 local station. This is done by the backpack unit at all stations for the various local users, and the results are ready at any time to be withdrawn at the PC computer station from all stations for individual billing. This is used at the PC computer station, or any other chosen central station, to monitor the overall energy consumption, in parallel to the collective meter of the electrical company. There is also a need to know the Demand, which is a gradient of energy, namely Energy Time.

31 Every five minutes, for instance, the PC computer station will determine how much energy has been consumed in such a time interval. By a snapshot every five minutes, the PC computer station will cause each individual station to simultaneously store their instantaneous energy consumption. Between two snapshots, the central station will withdraw from each local station, sequentially, all such stored instantaneous energy consumptions and take the difference between the newest value and the prior value for each local station. This difference is the ENERGY consumed in five minutes, or 5 minute DEMAND, at such local station. This difference is, then, time stamped and user stamped by the central station, and saved for later use in determi:ning how to distribute "DEMAND" billing 15 costs among the local users.

As a general approach to a central monitoring of energy based on the apparatus and system which has been hereinbefore explained and described for one local user 0: station, the several stations are storing and making available at any moment their results of totalized Energy, upon which the PC station will have only to call the results from each station one after the other. However, '.in order to match a collective reading by the common meter of the electrical company, there is a need to "synchron- 25 ize" the polling of information from the local user backpack units. This is the problem solved by another aspect of the present invention, as seen from the PC S: station, or central station, rather than from the remote station.

It is known from the specification of U.S.

Patent No. 4,692,761 to pass data relative to power consumption from remote stations to a central unit where the total amount of energy consumed is measured in relation to a centralized meter.

The prior art expresses the need for a true communication insuring a true message and a valid intercommunication. To this effect use has been made of periodical forwarding of data to the central unit, which I I I 32 are still subject to false information due to local operational defects. Combining an exact time relation between the local energy consumed with a reliable message communicated and received have required too much complexity in the dialogue between central unit and remote units.

It is proposed now not to require synchronism between the local demand and energy calculations at the remote stations, but to require locally a storing of the instantaneous accumulation of energy by each local station at the command of the central station called "snapshot". The central station, then, reads these local energies in order to determine the energy used between two "snapshots". The passivity of the remote stations insures a constant determination of energy locally, whereas the intervening 15 snapshot from the central unit insures a proper timing which is less demanding than an assigned synchronism of the remote stations.

s Referring to Figure 25, the energy monitoring system is illustrated with the PC computer station PC sending every five minutes a command to store energy.

which is transmitted through the INCOM system to each of the remote stations ST#1, ST#2, ST#n. Upon receiving the command (which may be redundant after the first one, but insures that each local station receives the command) 25 at each station the totalized instantaneous energy as shown for one station (station n) in FigVre 25 is locally stored. Accordingly, the multiplexer MUX of Sstation #n receives the signals IA, IB, IC, VA, VB, VC, which are sampled under the control signal of lines 40 and 41, derived from the sampler SMP which is triggered by line 39 from the PTIMER, as explained earlier by reference to the flowchart of Figure 24B according to the sampling rules of Table I and Table II. As explained by refererce to Figure 23, the sampled signals are applied by line 32 to the A/D converter ADC, actuated, also, according to the sampler SMP (by lines 40 and 42). The digital signals outputted on line 44 are applied to a multiplier MLT which, under the control signal of line 40, via line 43, I I I 33 generates on line 45 the value IV. The summer SUM passes on line 46 the sA :led energy IVs totalized for three phases, and this leads to an accumulated count of total energy Ex at ACCU. This total is constantly updated by each new sampled IVs amount. The latest total is outputted on line 47 which passes through line 48 to storing register STE after being gated by a gate GT. Here come the effects of control by the PC computer station. Each station has been totalizing in one's own register ACCU the latest amount of total energy Ei consumed. When a snapshot command SNP is received from the PC station by line 50 through the INCOM, the gate GT of the addressed station, by line 50, is enabled. Immediately, the latest value Ei is stored by line 48 into register STE. The same 15 is done in each station, simultaneously. Thereafter, by line 51 the PC station reads the amount stored into STE for ?ach station in a sequential manner, for instance in the order of the stations. Now it is up to the PC station to compare Ei with the last data received Ei-l and know, for each station, how much energy has been gained within the five minute time interval separating two successive gating commands by line 50 of the particular station. Knowing Ei the PC station determines the Demand Ei-E(i-l). Typically, this is handled by 25 software according to the general block diagram of Figure 26 showing the PC station in communication with the energy monitor stations PC-based energy monitoring S is performed according to flowcharts of Figures 27A, 27B *i and 27C.

Referring to Figure 27A, starting at 200, the next step, via line 201 is at 202 to determine whether the TIME interval of, typically 5 minutes, has been initiated.

If NO, by line 203 the system goes to A at 104 where it receives by' line 204' the result of the routine of Figure 27B. Thereafter, the system proceeds at 205 where background tasks are allowed in the free time left. Then, by line 206 there is a RETURN to line 201 for a new time interval. If there is a- ES at 202, by line 207 the 4 c 34 system goes to 208 where energy polling 'rom all the stations simultaneously is initiated. This comes by line 209 to step 210 where a command is sent through the INCOM to the local stations to "SNAPSHOT" the present accumulated energy, or "instantaneous value" of energy accumulated at the station. Nevertheless, in order to insure a true and valid command, redundancy is used at this stage by establishing a dead time for a rest of about several milliseconds at 213, which by line 214 is followed by another command for a "SNAPSHOT" at 215 by 216 through the INCOM to the local stations.

Thereafter, takes place the individual polling of all the stations to see how much has been accumulated and to check whether a valid energy value has been called 15 for. This routine starts by line 217, with the number i, of the local station being addressed, being initially made equal to 1 (at 218). Thereafter, the count will increase (at 227) by one until at 220 it reachLs n t e total nuiber of local stations. If at 220 i=N, by line 221 the system goes to a new series of n stations for polling (line 22 of the routine of Figure 27B). If the system is still during the polling of stations, at line 223 (from step 220) a timer is initialized (at 224) to zero for the station being addressed, and by 225 the system goes to the 25 routine of Figure 27C in order to know the energy accumulated in the local station and, if necessary, to ascertain the validity of the information received, making another call if not valid. Block 226 of the flow chart of Figure 27A is illustrated by the flow chart of Figure 27C described hereinafter. When the energy has been collected for all the stations by line 225' each value of i having been increased by one until at 220 it has reached n, when another command to poll will take place with the new time interval (namely of 5 minutes). If it has (YES on line 221), the system goes to 222 Of Figure 2'7B for station polling. If NO at 220, by line 223 the system goes to 226, a routine which is illustrated by Figure 27C.

I I Considerinr" step 226 of Figure Figure 27 illustrates the polling operation for the de* ,uation of the energy at each station. Initialization is with A- 230, nawely the first addressed station. If before gollg to the next station (i=i+l at 2.10), at 236 is determined whether the energy received is valid. If YES by >ine 241, the system goes to the next station (adding one to i at 240) until all 'the stations have been dealt with (n reached at 232). If it is so, by line 233 the system goes to 234 where it is ascertained whether the time interval of 5 minutes has lapoed. If so the system is back to A 6o Figure 27A. If there is a NO on line 237 of block 236, the system goes to 1:he flow chart routine of Figure 27C in order to seek a valid zesponse. The energy having been 15 received correctly o, line 239, like from 241, the system goes to 234.

Considering now Figure 27C (by line 226' from S"block 226 of Figure 27A) the flowchart goes to 250 where a request for the idcal station status is transmitted through the INCOM at 21.. Then, at 251 the question is raised '"whether the addressed station has responded?". If NOT, this fact .s acknawledged at 252 and there is a RETURN by line 253 to 254. If YES at 251, it is determined at 255 whether the status is "ALARM". If YES, at 25 257 this is acknowledged and there is a RETURN by lines 258 and 253 to 254. If NO alarm has been detected at 255, the determination is at 260 "whether the ENERGY READY satus has been obtained". If YES, the station is asked to transmit back the energy (i ~:iloiwitz-hour) by line 262 through the INCOM. If at 263 there is a positive response, at 264 the KWH is known and at 265 it is recognized as valid, whereby via line 266 thers is 1 RETURN at 254. If NO at 263, it is acknowledged at 267 as having an unknown status, and by line 268 there will be a RETURN at 254. Having found a NO at 260, the system at 269, to be sure, makes another request to the station (via line 270).

In such case, the time delay is accounted for at 272 with a timer before returning to 254 by line 273.

-36- In a further ezitodiment, the energy monitoring system may be modified to, llow for the monitoring of the user's indiidua curer~t volageand power demands. Turning to '1igures 28A- to 28R, siown are the flowochrts which illustrate the mo~if Icaion- of the e'-A-,rgy monitoring sy~tem t~rxmware, which,1 eilows for the rmonitoring of the user's individual current, voltage, and power consumption. Specifically referring to Figureq 28A nd 28B, the flowchart is altered to provide the command to calculate the average power for oach phase aknd to s/ale and s~ave the resulting values at 301 0 before the- Command to sum the energy for each indivld~xal phase and _roviO e h e energy tally at 125 is Issued. Th r after, t1fi r qrgy cal culation cowi-iaz~id is foli~ce bythe comwan~ calculate the RMS value of an V for each phase and to,/scale and save at 303, the co-imands 'a .to calculate the app 9r /Ait pow,r for e Vh iase and to scale and save at co~mmands to calcunlate the react"._ po%4tr for each pha-_e and" tr scale and save at 307, and the commands too& to calculate and sa6the Power fact-&r at 309.

20 urning to ViQ es 28C to 28Z, the flowchaa't for the *~*sample rountine is ,altered to allow for the A/D conversion of the current IA 17- the current mode to be saved In 151' and for the A/D -;onveiSion of the Current IA in the voltage raode to be saved in./154' should the result of the A/D conversion 2, In 151' be eqv,al to zeroa L~ikewise, for phases B and C, the routine is altered to allow for the A/fl onversion of the curreut IS n the cu;4F'-nt mode to i,4 saved at 161' and for the AID cotavezrsion of the current IV, In the voltage mode to -37be saved in 164' should the result of the A/D conversion in 161' be equal to zero and to allow for the A/D conversion of the current IC in the current mode to be saved at 171' and for the A/D conversion of the current IC in the voltage mode to be saved in 174' should the result of the A/D conversion in 171' be equal to zero.

Referring to Figure 28E, once the values for each phase voltage and current have been converted and stored, the command As issued to square, sum, and save the values for use in the aforementioned RMS and power calculations.

Specifically, the command to sum and save IA x IA for each pass is issued in 311 with similar commands being offered for phase currents IB and IC in 313 and 315. The command to sum S" and save VA x VA for each pass is issued in 317 with similar rcc- ands being offered for phase voltages VB and VO in 319 and 321. For scaling purposes, each of the calculated values i<S divided by the alue 256. The common RETURN is then issued at 323, As it appears ftom the last steps of the fee* flowcharts, after the A/D conversion a sample is derived of 20 VA and IA for phase A, of VB and IB for phase B, and of VC and IC folo phase C frtm which samples the power values are calculated by phase, to be totalize1 for the three phases.

As with the (alculated energy values, the powerc curront, and voltage monitoring is done by the bacIpack unit at all stations for the various local users, and the results are ready at any time to be withdrawn by the PC computer station from all stations over the aforementioned communication network. This may be used at the PC computer I t -38statio,i, or any other chosen station, to monitor the overall electrical demands, As explained previously and now in reference to Figure 29, the sampled signals are applied by line 32 to the A/D converter ADC actuated according to the sampler by lines 40 and 42. The digital signals outputted on line 44 are applied to the processor 325 wherein the energy, power, rms voltage, and rms current values are derived.

These values are constartly updated by each new sampled amount, wherein a snapshot command via line 50 will result in the values being stored. These stored values are accessible Sto the network on software command from line 50 to be outputted on line 51n. As previously described, t;e central computer station has the capability to individually poll the *4 stations to gather the information stored in the registers.

The following pages embodying endices A to E show the listings as follows: Pages Appendix LISTING 39 A. the Numbering System used fo the Pnergy

P

Monitoring System; 20 40 B. the NVRAM Data Storage; NVRAM Data Save p Procedure; and NVRAM KW-H Data Recovery at Power UP; 41 C. the ENERGY MEASUREMENT Calibration Accuracy; 42-52 D the LOCAL STATION ENERGY CALCULATION; 53-56 E. PERSONAL COMPUTEA BASED ENERGY MONITORING A-1 APPENDIX A NUMBERING SYSTEM FOR ENERGY MON.TORING Numbering system for "Energy Monitor".

Robert T. Elms ORIGINAL: 07-18-90 UPDATE: 07-31-90 BREAKER FULL LOAD rATING: 160A RMS= 1/4 FULL SCALE A/D READING (0.1569A RMS PER BIT) BREAKER MAX. VOLTAGE RATING: 480V L-L, 227V L-N .56 FULL SCALE A/D READING (0.1213V RMS PER BIT) (ABOVE ARE RMS VALUES, PEAK IS 1.41421 HIGHER FOR SINE WAVE.) FULL SCALE A/D READING OFFON (4080 DECIMAL) EACH ENERGY SAMPLE PRODUCT WILL BE EQUAL TO OR AFTER A/D SCALING Esx (Vx)/(.1213 v/bit)*(Ix)/(.1569 amp/bit)*(1/2)*(1/256) WHERE OCCURS FROM VOLTAGE HALF WAVE RECTIFICATION.

THESE SAMPLES WILL BE SUMMED FOR 128 SAMPLES (606 mS PER JCE SAMPLING ALGOR.) (THIS IS A SIGNED NUMBER THREE BYTES MAXIMUM) (128 SAMPLES IS 16 GROUPS OF 8 SAMPLES) 128 Eox Esx i-1 THE TWO M.S. BYTES OF Eox ARE SCALED SUMMED TO THE "ENERGY" AWD "DEMAND" ACCUMULATORS. (THE TWO MS BYTES ARE THEN ZEROED.) THE 5 MINUTE DEMAND (WATTS) NOMINAL SCALE FACTOR "KD" IS 2580.

(5 MINUTES IS 495 GROUPS OF 128 SAMPLES) 495 DEMAND (Eox 256)*(KD)/(256)**2 WATTS (5 MINUTE AVERAGE) n=1 DEMAND IS A 5 BYTE NUMBER MAXIMUM, WITH DECIMAL POINT LEFT OF THE SECOND BYTE.

THE ENERGY (KW-H) NOMINAL SCALE FACTOR "KE" IS 14090.

FO38365 22/10/92 (INTEGER VALUE OF KW-H STORED IN A THREE BYTE NON-VOLATILE WORD, THE LS BYTE OF KW-H IS ALSO STORED IN VOLATILE RAM) Sb 6*

S

0 59

S

n1 ENERGY (Eox 256)*(KE)/(256)**4 KiATT-HOURS WHERE n1 (TIME IN SECONDS)/(0.606 sec) E9ERGY IS A 7 BYTE NUMBER, WITH THE DECIMAL POINT TO THE LEFT OF THE FORTH BYTE The three most significant bytes are transferred over the INCOM network.

At 150 amp, 277v 3 phase balanced load, 1 kw-h occurs every 30 seconds.

Also, the l.s. byte rolls over 14.4 times per day, or 10,000 times in 1.9 years. Non-volatile energy data storage occurs at roll-over.

"KE" "KD" multiplied by the constant 5.4613 or SI I B-1 APPENDIX B NON-VOLATILE RAM (16 ROWS OF 16 BYTES) DATA STORAGE NV RAM DATA (16 ROWS OF ROW 0 ROW 1 ROW 2 ROW 3 ROW 4 ROW 5 ROW 6 ROW 7 ROW 8 ROW 9 ROW A ROW B ROW C ROW D ROW E ROW F 16 BYTES) STORAGE: 3 DEMAND AND 3 KW-H MULTIPLIERS (2 BYTES EACH), DATE (3, 8 COUNTERS (2 BYTES) 0 TO 10,000 (AT 10,000 SET=OFFFFH) KW-H LS BYTE SAVED AT POWER DOWN AND ITS IMAGE KW-H MIDDLE BYTE SAVED AT LS ROLLOVER AND ITS IMAGE KW-H MS BYTE SAVED AT LS ROLLOVER AND ITS IMAGE 8 COUNTERS (2 BYTES) 0 TO 10,000 (AT 10,000 SET OFFFFH) KW'H LS BYTE SAVED AT POWER DOWN AND ITS IMAGE KW-H MIDDLE BYTE SAVED AT LS ROLLOVER AND ITS IMAGE KW-H MS BYTE SAVED AT LS ROLLOVER AND ITS IMAGE NV RAM KW-H DATA SAVE PROCEDURE: WITH POWER AVAILABLE AT ROLLOVER OF LS BYTE KW-H, SAVE KW-H MIDDLE, KW-H MS THEN THEIR IMAGES AND THEN ZERO KW-H LS BYTE'S IMAGE.

ON POWER FAILURE SAVE KW-H LS BYTE.

ON POWER UP WRITE KW-H LS IMAGE, CLEAR KW-H LS BYTE.

NV RAM KW-H DATA RECOVERY AT POWER UP: IF KW-H MIDDLE MS BYTES DON'T MATCH THEIR IMAGES, SET BOTH VALUES AND IRAES EQUAL TO (KW-H) OR (IMAGE+1) WHICHEVER IS LARGER ROLLOVER OF LS BYTE IS ASSUMED SO ZERO LS BYTE OF KW-H AND ITS IMAGE.

IF KW-H MIDDLE, MS BYTES MATCH THEIR IMAGES, READ KW-H LS BYTE AND ITS IMAGE, USE THE LARGER OF THE TWO FOR INITIAL VALUES IN RAM.

I

9 4 o I f -41- C-1 APPENDIX C ENERGY MEASUREMENT CALIBRATION ACCURACY Each individual phase will be calibrated at the factory to read the same power level at full load. This i3 done by adding a gain scaling term to the resultant product of voltage and current. The following analysis assumes there is a gain and an offset associated with each individual phase.

I K1*i K2 where K1 6.37 bits per amp., K2 -1 bit.

V= K3*v K4 where K3 8.24 bits per volt., K3 -1 bit.

ENERGY VI K1*K3*i*v K1*K4*i K2*K3*v K2*K4 At full load and 120 volts line to neutral: K1*i 956 bits, K3*v 989 bits ENERGY VI 945,484 -956 -989 +1 945,484 -1944 945,484 -0.2% =943,540 At 20% full load and 120 volts line to neutral: K1*i 191 bits, K3*v 989 bits *9 .ee.

ENERGY V 1.88,899 -196 -989 +1 188,899 -1179 188,899 -0.6% 187,720 If the full Load value above were scaled to 950,000 by multiplying it by 1.0068; then the 20% full load energy should be 190,000, but is only 188,996 after scaling and thus is in error by If, however, full load value were scaled to S940,000 by Iultiplying it by .9962; then the 20% full Load energy should be 188,000, :but it is only 187,006 and thus in error again by Scaling the product term thus do,'s not; increase the error in measuring energy.

-42- D-1 APPENDIX D NAM INTR OPT S PRINT SYMBOL TABLE OPTION #include "header.s" 10-09-90 UPDATED TIMING ANALYSIS OF ROUTINES REGION "MAIN" AT THIS POINT, A PRIMARY OUTPUT COMPARE INTERRUPT HAS OCCURRED.

tmoo too.

1 00 too.

oo q to motoe:

I

TIMER INTERRUPT PROGRAM.

UPON A PRIMARY TIMER INTERRUPT, DO THE FOLLOWING TASKS: 1. RELOAD PRIMARY TIMER WITH NEXT INTERRUPT TIME.

2. SAMPLE ALLANALOG INPUTS AND COMPUTE THEIR POWER PRODUCT TERMS.

SUM POWER TERMS "PTALLY".

3. CHECK FOR POWER FAILURE AND SAVE KW-H IF REQUIRED.

4. FOR LAST SAMPLE IN EACH GROUP OF EIGHT, SET PTIMER 120.94 DEGREES.

5. AT END OF 16TH GROUP OF 8 SAMPLES, SCALE AND SUM "ENERGY" "DEMAND".

6. AT END OF 495TH BLOCK OF 16 GROUPS OF 8 SAMPLES, SAVE "DEMAND".

7. SERVICE THE PROGRAM COUNTERS.

8. SERVICE THE INTERNAL NON-VOLATILE RAM.

NOT 8TH INTERRUPT 1469 CYCLES 400US 1196US 3.6864MHZ.

8TH INTERRUPT ONLY 1509 CYCLES 400US 1219US 3.6864MHZ.

16TH BLOCK OF 8 SAMPLES 4099 CYCLES 40US 2624US 3.6864MHZ.

TIMERINTERRUPT

SEI DISABLE INTERRUPTS LDA PCD TOGGLE PORTC.1 EACH TIME EOR #2 INTERRUPT ROUTINE IS SERVICED.

-43

LOAD-PTIMER

SAMPLE

RELOAD TOCH,L AND RESET OCF (TSR.6) SAMPLE ALL CURRENTS AND VOLTAGES

CNT

ENDCNT

JSR SPI SERVICE THE SPI SERIAL LINK JSR PFAIL-DET DETERMINE IF A POWER FAILURE OCCURRED AT THIS POINT ALL CURRENTS AND VOLTAGES HAVE BEEN SAMPLED AND SAVE.

ALL VI PRODUCT HAVE ALSO BEEN CALCULATED AND SUMMED.

INCREMENT SAMPLE COUNTER.

INC I C-0UN T INC CC)UNTL DECREMENT INCOMTIMER, LIMIT ZERO. FOR INCOMTIMER= 0, DO OLD-COMMAND= 0.

4*e*S4 444 4 .4 4 4.

4 *4 4 4* *4 4 4t 4.

*4$ 4 .4 4 *4 4* .4 4* 4.

ITIMR

LDA

BEQ

DECA

STA

BRA

INCOM TIMO(JT

CLRA

STA

I NCOMTIMER I NCOMT IMOUT

INCOMTIMER

ENDITMR

OLDCCMMAND

END! TMR *TEST IF ODD SAMPLE NUMBER WAS JUST COMPLETED.

TST2 LDA ICOUNT AND #1 BEQ TSTSMP8 *ODD SAMPLE IS COMPLETE (90 DEGREE SAMPLE INTERVAL).

SERVICE THE NVRAM ERASE/WRITE ROUTINE. (BEGIN AND END NVRAM ERASE OR W.RITE TASKS HERE.) JSR NV SERVICE CONTROL NV RAM ACTIVITY JSR NVRAM DO NVRAM ERASE SAVE FUNCTION AS NEEDED Jmp INTREND TSTSMP8 IS THIS THE EIGHTH SAMPLE COMPLETED.

-44- D -3 iF NOT, NO OTHER TASKS NEED TO BE DONE.

IF TRUE, RESET ICOUNT TO ZERO AND INCREMENT "GROUP" COUNTER "GCOUNT".

ICOUNT

#7 SAMP8 I NTR END END OF GROUP OF EIGHT SAMPLES HOT LAST SAMPLE, NO OTHER T.

RESET ICOUNT TO ZERO.

INCREMENT.GROUP COUNTER "GCOUNT".

CHECK FOR "GCOUNT"= 16.

SAMP8 CLR

INC

LDA

AND

BEQ

imp I COUNT

GCOUNT

GCOUNT

#15 GRUP16 I NTREND TEST FOR 16 GROUPS OF 8 SAMPLES EACH.

END OF 16TH GROUP OF EIGHT SAMPLES.

NOT LAST GROUP, NO OTHER TASKS.

RESET GROUP COUNTER "GCOUNT" TO ZERO.

SCALE AND SUM "DEMAND" AMD "ENERGY".

ZERO "IEOXTALY" TWO MS BYTES.

INCREMENT BLOCK OF 16 GROUPS COUNTER "1BCOUNT"1.

CHECK FOR "BCOUNT"= 495.

of$ Go..

so%* .04.

0 GRUP16 CLR

JSR

JSR

JSR

CLRA

ADD

STA

CLRA

ADC

STA

CMP

BHS

imp

GCOUNT

DEMANOSUM

ENERGYSUM

CLREOX

BCOUNT+1 BCOUNT+ 1 B COUNT

BCOUNT

#2 SAVE DMD INTR END SCALE EACH PHASE DEMAND, ADD TO TALLYS SCALE EACH PHASE ENERGY, ADD TO TALLY ZERO TWO MS BYTES OF EOX TALLYS BCOUNT IS INITIALIZED TO 17. 17+495=51200O HEX TEST FOR 495TH BLOCK OF 16 GROUPS.

BRANCH IF BCOUNT 200 HEX NOT LAST BLOCK, NO OTHER TASKS.

SAVE_OD

INTREND

1. SUM AND SAVE DEMAND TALLY IN INCOM BUFFER 2. ZERO DEMAND TALLY 3. PRELOAD "SCOUNT" WITH 17, 17+495=512 OR 200H (ONE BYTE TEST) JSR SAVEDEMAND RE-ENABLE INTERRUPTS END OF PROTECTION INTERRUPT ROUTINE.

SUBROUTINES

SUBROUTINES

SUBROUTINES

*LOAD PTIMER RELOADS TOCH,L TO ESTABLISH THE NEXT SAMPLE TIME. ONE OF *THREE TIME INCREMENTS IS SELECTED FROM TABLE LTTABLE AND SUMMED WITH *THE PRESENT COUNTER VALUE:

THE

FOR

FOR

FOR

FOR

THE

FOR

FOR

FOR

FOR.

THE

FOR

FOR

FOR

FOR

THE

FOR

FOR

FOR

FOR

INCREM4ENT I Trr)"DIT 7 TOCH,L=TCRH,L (LTTABLE).

S SELECTED AS FOLLOWS @60HZ WITH A 4MHZ CRYSTAL.

TmrDrmckIT- OqI0-- 0Q/2 ACIU vin 01.0 ICOUNT OD, INCREMENT= 5208US=> 520812= A2CH.------112.50 ICOIJNT EVEN, INCREMENT= 4167US=> 4167/2= 823H.------900 180 DEGREES, INCREMENT= 8333US=> 8333/2= 1046H.

INCREMENT IS SELECTED AS FOLLOWS @50HZ. CORRECT FOR ICOUNT INCREMENT= 6719US=> 6719/2= DC4H.

ICOUNT ODD, I NCREMENT= 6250US=> 6250/2= DACH.

ICOUNT EVEN, INCREMENT= 5000US=> 5000/2= 9C4H.

180 DEGREES, I NCREMENT=10000US=>1 0000/2=1388H.

INCREMENT IS SELECTED AS FOLLOWS @60HZ WITH A 3.6864MHZ CRYSTAL.

ICOUNT 7, INCREMENT= 55099US=> 5599/2.17014= AI14H.

ICOUNT OD, INCREMENT= 5208US=> 5208/2.17014= 960H.

ICOUNT EVEN, INCREMENT= 4167US=> 4167/2.1,7014= 780H.

180 DEGREES, INCREMENT= 8333US=> 8333/2.17014= FOOH.

INCREMENT IS SELECTED AS FOLLOWS @50HZ. CORRECT FOR ICOUNT 7, 'INCREMENT= 6719US=> 6719/2.17014= CI8H.

ICOUNT ODD, INCREMENT= 6250US=> o250/2.17014= B4OH.

ICOUNT EVEN, INCREMENT= 50001)S=> 5000/2.17014= 900H.

180 DEGREES, INCRnMENT=10000US=>10000/2. 17014=1200H.

0 0* 4* *00 0 *0*I 9.

9 .9 9 96 0 *6 *.i 6..q 9 9**99* 0 *0 6 to 6 *6 9 9* 9 TO CLEAR TSR.6 (OUTPUT COMPARE FLAG, OCF), READ TSR, THEN WRITE TO TOCL.

ALSO INVEFPT TCR.O (NEXT OUTPUT LEVEL ON PCMP). PCMP OUTPUT WILL THEN CHANGE STATE AT EVERY SAMPLE TIME FOR DIAGNOSTIC PURPOSES.

82 CYCLES MAX.

LOAD PTIMER

CLRX

TST

BEQ

LOX

LDA

CMP

SEQ

I NCX I NCX

AND

BNE

I NCX I NCX

LDA

FREQ

LT1 #8 1ICOUNT #7 LT2 ASSUME 60HZ INDEX ALWAYS CORRECT TO 50Hz INDEX READ ISR TO CLEAR TSR.6, FLAG OCF -46-

TCRH

XTEMP

TCRL

LTTABLE+1,X

ATEMP

XTEMP

LTTABLE,X

TOCH

ATEMP

TOCL

TCR

#$01

TCR

READ HI BYTE FIRST AS REQUIRED ADD LO BYTES GET TCRH ADD HI BYTES WRITE HIBYTE FIRST REQUIRED TO PERMIT FURTHER OUTPUT COMPARES AND TO FINISH CLEARING TSR.6.

INVERT TCR.O, NEXT OUTPUT LEVEL ON PCMP THE FOLLOWING VALUES ARE VALID FOR A 3.6864MHZ CRYSTAL.

LTTABLE

$A14 $960 $780

$FOO

$C18 $840 $900 $1200 60HZ 5598US 5208US 4167US 8333US 50HZ 6719US 6250US 5000US 10000US .4.4.4 4 4 6 4.44 o #4 4 44 4 4 44r @4 4 4 4 4 4 4 SAMPLE ROUTINE.

THIS ROUTINE IS PART OF THE INTERRUPT ROUTINE.

DO NOT USE MAIN LOOP WORKING REGISTERS HERE. (VERIFY).

NO INTERRUPT OF THE SAMPLE ROUTINE IS PERMITTED SINCE OTHER INTERRUPTS ALSO USE THE A/D CONVERTER.

SAMPLE IA, VA, IB, VB, IC, VC.

DURING THE CONVERSION TIMES, EXECUTE INSTANTANEOUS PHASE POWER COMPUTATIONS AND TALLY RESULTS.

REMOVE A/D RESULT BEFORE STARTING ANOTHER A/D CONVERSION -JCS.

FOR DEMAND (AUTO CALIBRATION) PURPOSES, CALCULATE THE SUM OF 128 POWER TERMS FOR EACH INDIVIDUAL PHASE (16 GROUPS OF 8 SAMPLES).

1157 CYCLES 400US MAX WITH AN 8MHZ CRYSTAL. RETIME@4MHZ.

SAMPLE

SAMPLE

ACSF

AVSF

ENABLE CURRENT AUTO RANGING ENABLE VOLTAGE AUTO RANGING '-47k I 1 11

BSET

LDA

STA

IA BRCLR

ST

CLR

LDA

TSTA

BEQ

STA

LOX

ADIAV BCLR

CLRA

STA

IAV BRCLR

BSET

BSET

LDA

STA

LDX

STVA LOA

STA

LDA

MUL

STX

STA

STX

STA

VA BRCLR

BSET

LDA

STIA

LDX

LOA

STA

LDA

MUL

STX

STX

STA

PA JSR

LDX

5,ADCR #$18

AMUX

7,ADCR, IA 5,ADCR

SIGN

ADC

ADIAV

TEMP

ACSF

STVA

O,ACFR

AMUX

7,ADCR, IAV o ,ACFR

ADC

TEMP

AVSF

SIGN

#$04

AMUX

TEMP

NUM2 NUM2+1 I AS IAS+l 7,ADCR,VA 5,AOCR

ADC

TEMP

AVSF

#$28

AMUX

TEMP

NUM1+O NUN 1+1

VAN

VAN+l

DMULT

#EOATALY

RESET ADCR.7 SELECT IA INPUT AND MXO START CONVERSION OF IA WAIT HERE FOR AID COMPLETION RESET ADCR..7 SIGN OF CURRENT DETERMINES SIGN OF PRODUCT SINCE VOLTAGE IS EITHER PLUS OR ZERO.

WAS IA VALUE EQUAL TO ZERO IF IA WAS ZERO TRY AID ON IA IN VOLTAGE MODE STORE VALUE OF IA FETCH SCALE FACTOR 1,2, OR 16 DO CONVXSION ON IA IN VOLTAGE MODE START CONVERSION OF IA IN VOLTAGE MODE WAIT FOR CONVERSION RESULT RESTORE=IA TO CURRENT MODE STORE VALUE OF IA FETCH SCALE FACTOR 1,2,4,8 OR 16 CURRENT WAS NEGATIVE IF AID IN VOLTAGE MODE SELECT VA INPUT START CONVERSION OF VA FETCH IA RESULT RET WIT" 12 B~IT RESULT SAVE IA IN NUM2 WAIT HERE FOR A/D COMPLETION OF VA RESET ADCR.7 FETCH SCALE FACTOR 16 SELECT lB INPUT START CONVERSION OF VB FETCH VA RESULT RET WITH X,A= 12 BIT RESULT NUN3= NUMi X NUM2 =IA X VA SET INDEX POINTER TO EDA TALLY GeV* *so *$to l e so.

48- 4 4

TST

BEQ

JSR

imp

PPOSA

JsR

SIGN

PPOSA

SUB 20

VB

SUMEO

SIGN IS ZERO FOR A POSITIVE RESULT SUBTRACT PA FROM EOA TALLY ADO PA TO EOA TALLY 9*99*9 9 *4 9* .4 *9* 9 99..

9 9 99..

9. 9 *9 .9 99 I *9 9.

9 .9 4 .4, .99.

4 9 9 999999 .9 *9 9 9.

b.

9 9 *9 9 IB BRCLR

BSET

CLR

LOA

TSTA

BEQ

STA

LOX

imp ADIBV BCLR

LDA

STA

IBV BRCLR

BSET

BSET

LDA

STA

LOX

CON

STVB LOA

STA

LOA

MUL

STX

STA

STX

STA

VB BRCLR

BSET

LOA

STA

LOX

LOA

STA

LOA

MUL

STX

STA

STX

STA

PS JSR 7,ADCR, IB 5,ADCR SI GR

ADC

AD IBy

TEMP

AVSF

STVB

1,ACFR #$O1

AMUX

7, ADCR, I BV 1,ACFR

ADC

TEMP

AVSF

SIGN

9$05

AMUX

TEMP

NUM2 NUM2+1 Bss I BS+1 7,ADCR,VB 5,ADCR

ADC

TEMP

AVSF

#$48

AMUX

TEMP

N NUMl-"

VBN

VBN+1

DMULT

WAIT hERE FOR A/D Ca4PLETION OF IB RESET ADCR.7 WAS VALUE OF lB EQUAL TO ZERO IF IB WAS ZERO TRY AID ON lB IN VOLTAGE MODE FETCH SCALE FACTOR 1,2,4,8, OR 16 D0 CONVERSIO0N ON IB IN VOLTAGE MODE START CONVERSION OF IB IN VOLTAGE MOE WAIT FOR CONVERSION RESULT RESTORE 1B TO CURRENT MOE CURRENT WAS NEGATIVE IF A/D IN VOLTAGE MODE SELECT VB INPUT START CONVERSION OF VB FETCH PR RESULT RET WITH X,A= 12 BIT RESULT SAVE lB IN NUM2 WAIT HERE FOR A/D COMPLE- -)N RESET AOCR.7 FETCH SCALE FACTOR 1,2,4,8, OR 16 SELECT IC INPUT START CONVERSION OF IC FETCH VB RESULT RET WITH X,A= 12 BIT RESULT RET WITH NUM3= VB*IB, NUM1= V8

I

-49- D -8 #WO0TALY

SIGN

PpOsB

SUSED

SET INDEX POINTER TO EOB TALLY SIGN IS ZERO FOR POSITIVE NUMBERS SUBTRACT P8 FROM EO8 TALLY NUM3= NUMI X NUM2 =18 X VB PPOSF3 JSR SUMEO 000 000 0 *0 00 0 0.

of 0 IC BRCLR

BSET

CLR

LDA

TSTA

BEQ

STA

LDX

imp ADICV BCLR

LDA

STA

ICy BRMLR

BSET

BSET

LDA

STA

LDX

COM

STVC LDA

STA

LDA

MUL

STX

STA

STX

STA

VC BRCLR

BSET

LDA

LDX

MUL

STX

STA

SIX

STA

PC JSR 7,ADCR, IC 5,ADCR

SIGN

ADC

ADICV

TEMP

ACSF

STVC

2,ACFR 4$02

AMUX

7, ADCR, I CV 2,ACFR

ADC

TlSmp

AVSF

SIGN

#$06

AMUX

TEMP

NUM2 NUM2+1 I CS ICS+1 7,ADCR,VC 5,ADCR

ADC

AVSF

NUM1+O NUM 1+1

VCN

VCN+1

DMULT

WAIT HERE FOR AID COMPLETION OF IC RESET AEOCR.7 WAS IC VALUE Z'UAL TO ZERO IF IC WAS ZWR TRY A/D U~SING VOLTAGE MODE FETCH SCALE FACTOR OR 16 DO CQNVEPSION ON IC IN VOLTAGE MODE START CONVERSION OF IC IN VOLTAGE MODE WAIT FOR CONV ,RSION RESULT RESTORE IC TO CURRENT MODE STORE VALUE OF IC FETCH SCALE FACTOR =1,2,4,8 OR 16 CURRENT WAS NEGATIVE IF A/D IN VOLTAGE MODE SELECT IG INPUT START CONV ERSION OF IG FETCH IC RESULT RET WITH X,A= 12 BIT RESULT SAVE IC IN NUM2 WAIT HERE FOR A/D COMPLETION OF VC RESET ADCR.7 FETCH VC RESULT FETCH SCALE FACTOR OR 16 RET WITH X,A= 12 BIT RESULT SAVE VC IN NUMi RET WITH NUM3= VC*IC= NUM1 MUM?

I,

*En CTALY

PPOSC

SUB ED

ENDSMP

SET INDEX POINTER TO EOC TALLY SUBTRACT PC FROM EOC TALLY ADD PC TO EOC TALLY

PPOSC

JSR SUtiED ENDSMP RTS *POWER FAIL DETECTION IS DONE 'BY CHECKING THE PAST AND PRESENT VALUES O F VB VC PHASE VOLTAGES. IF DURING A SAMPLE INTERVAL, ANY OR THE *SUM OF THE THREE, VOLTAGES EXCEEDS 94V/ OR 2FF HEX THEN POWER IS "OK1".

*IF THE SUMS OF THE PAST AND PRESENT SETS OF SAMPL VALUES FAILS THIS *TEST, THEN POWEIR IS ASSUM4ED TO HAVE BEEN LOST.

*54 CYCLES MAX:

PFAILDET

S

S

*5 *5

S

0eS

S

S. 54

I

S

*5 5 S S 0S S*

S.

S.

S

*0S 0 SItS

S

a

S

*5 5 9 '4 .5 5 5 *5 *5 56

S

LDA I/BN+1 ADD VCN+1 STA PFAIL+l LDA VBN ADC VCN STA P F<L- CMP #2 BHI POWER OK BRCLR 6,FLAGSIPOWERBD BRSET 7, FLAGS1 ,POWER -FL BS-E T 7,FLAGS1 -ftSET 6,FLAGSI RRA END PWR.

*~SFLAGSZ

ERA E(rPWR BCLR &FLAG 1 BCLR 7,FLAG71 GET VB+VC AND CHECK FOR 2FF HEX MS BYTE DONE PFAIL(0,1 )=VB(0,1)+VC(O,1) TEST MS BYTE OF PFAIL THIRD SEQUENTIAL LOSS OF POWER SET SECOND DETECTION FLAG OF POWER FAILURE SET FIRST DETECTION FLAG OF POWER FAILURE SAVE LS BYTE OF ENERGY AT POWER FAILURE POWER IS OK, CLEAR LOSS OF POWER FLAGS

POWERBD

POWERFL

POWEROK

END PW *DEMANDSUI{ SCALES AND SUMS THE THREE INDIVIDUAL PHASE DEMAND VALUES *AND ALSO CALCULATES THE PHASE POWER FOR INCOM BASED ON EOX VALUES.

*EACH INSTANTANEOUS V*I=ESX PROUCT IS SUMMED ON A PER PHASE BASIS FOR *128 SAMPLES. tHtS SUM OF 128 SAMPLES (EOX WHERE X= PHASE A,B OR C) 1$ SCALED BY A DEMAND CALIBRATION FACTOR AND THEN SUMMED WITH ITS PHASEDEMAND TALLY. IF THE 128 SAMPLE SUM IS NEGATIVE, THEN ZERO IS *ADDER, TO THE DEMAND TALLY ANP "'P3WER=NEGATIVE" FLAGS ARE SET.

W ESX (Vx)/C.1212V/BIT)*Ix)/(.1569A/BIT)*(l1f2)*(1/256) WHERE 1/2 IS FROM VOLTAGE HALF WAVE RECTIFICATION.

1/256 IS BECAUSE LS BYTE OF PRODUCT IS DROPPED.

1! IS PHASE A, B OR C *EOX =SUM OF 128 SEQUENTIAL ESX VALUES. THE TWO MS BYTES OF EOX *ARE USED FOR THE POWER, DEMAND AND ENERGY CALCULATIONS AND ZEROED.

-51- >DEMAND TALLY =SUM OF t EOX VALUES' 1/256) *(DEMAND CALIBRATION FACTOR) *THE NOMINAL.. DEMAND CALIBRATION FACTOR VALUE IS' 2580 DECIMAL.

*WHEN 495 EOX VALUES HAVE BEEN USED, A 5 MINUTE 1)EMAND IS STORED AND *THE DEMAND TALLYS ARE ZEROED.

*DEMAND TALLY IS A 5 BYTE NUMBER. WITH 'WATTS-' AS THE UNITS, THE *DECIMAL POINT IS TO THE LEFT OF THE TWO L.S. BYTES, *DEMAND IS THUS THE THREE MS BYTES OF THE SUM OF THE THREE PHASE DEMAND *TALLYS AFTER 495 SEQUENTIAL I"EOXII V-atfE[: HAVE. BEEN USED, AND IS WATTS.

DEMANDSUM

*DASCASUM SCALES AND SUMS EOA TO DA", %jS PHASE A POWER CALC.

*AND LOAD THE PHASE A POWER TO THE INL. 048R TALLY.

*DXTALY[(EOX/256)*(DXCAL)l DXTALY INCOM POWER =PWRA PWRB PWRC *PWRX= -56)*(DXCAL)*(495256+239)*(IP?56)*(I/,,S.) *PWRX= ,56)*(DXCAL)*(1/256)*(l 239/256) *1179 CYCLES MAX.

DASCASUM

4 4.444.

4 0440 4.

4 40 *0 04 .4 404 9 0 4 4. 4 4.

40 O 4 4. 4 *4 .4 4 0s .4 044 4 44..

S

0 .44.

0 044044 4 44 4

S.

4 4.

44 4 40 *0 4 4

BRCLR

BSET

LDA

STA

STA

illP

POSEOA

LDA

STA

LDA

STA

7, EOATALY,*POSEOA EANFLG, FLAGSO

#$FF

EOATALY

EOATALY+1

DBSCASUM

WAS ECA, TALLY POSITIVE SET PHASE A POWER NEGATIVE FLAG BIT RESET TWO MS BYTES TO ZERO VALUE

LDA

STA

LDA

STA

JSR

LDX

LDA

STA

CLR

STA

LDA

STA

STA

LDA

STA

STA

JSR

DECX

BCC

EOATALY

NUMi EOATALY+1 UM 1+ 1 DCAL+0 NUM2+O DCAL+1 NUM2+1 DMUL~t #IDATALY+l NUM3

POWER

NUMi ,NUM1+1 NUM3+1 POWER+1 MUM 1+2 NUMS+2 POWER4-2 NUM1+3 ADD4J ND

CAPOWER

NUM3(O,1,2,3)= (EOATALY/256)*(DACAL) NOTE, DEMAND TALLY IS A 5 BYTE NUMBER PREPARATION FOR LATER POWER CALCULATION INITIALIZE PARTIAL TALLY OF INCX.1 POWER SAVE FOR POWER CALCULATION POWER(O,1 (EOA/256)-(DACAL)*(l/?56) NUM1(0,1,2,3) =(EOA/256)*(DACAL)*C1/256) FOUR LS DEMAND BYTES SUMMED POIN7 TO MS TALLY BYTE JUMP f NO CARRY INTO MS BYTE D- 11 INC oX INCREMENT MS TALLY BYTE CAPOI4ER LDA #239 STA TEMP+l JSR MUL4Xl NUM1=(EOA/256)*(DACAL)*(1/256)*(239/256) LDX #POWER JSR ADD4 /I *DBSCASUM SCALES AND SUMS EOB TO DBTALY AND DOES PHASE B POWER CALC.

*AND LOAD THE PHASE B POWER TO THE INCOM POWER TALLY.

DBSCASUM

BRCLR 7,EOBTALY,POSEOB WAS EOB TALLY POSITIVE BSET EBNFLG,FLAGSO SET PHASE B POWER NEGATIVE FLAG BIT LDA #$OFF STA EOBTALY STA EOBTALY+l imp DCSCASUM

POSEOB

LDA EOBTALY STA NUMi LDA EOBTALY+l STA NUM1+1 LDA DCAL+2 STA LDA DCAL+3 STA NUM2+1 JSR DMULT NUM3= (EOBTALY/256M*DBCAL) *LDX #DBTALf+l NOTE, DEMAND TALLY IS A 5 BYTE NUMBER 44CLR NUMI LDA NU143+2 PREPARATION FOR LATER POWER CALCULATION *STA NUM1+3 SAVE P R POWER CALCULATION *ADD POWER+2 DO PARTIAL TALLY OF INCOX1 POWER *STA POWJER+2 AND SAVE NOTE, POWER =(EOB1256)*DBCAL)*(1/256) LDA NUM3+1 PREPARATION FOR LATER POWER CALCULATION *.:STA NUM1+2 SAVE FOR POWER CALCULATION *:ADC POWER+1 DO PARTIAL TALLY OF INCcOl POWER STA POWER+l AND SAVE %seLDA NUM3+0 PREPARATION FOR LATER POWER CALCULATION ***STA NUM1+1 SAVE FOR POWER CALCULATION 4..:ADC POWER+O DO PARTIAL TALLY OF INCOM POWER *STA POWER+O AND SAVE e:JSR ADD4_IND FOUR LS DEMAND BYTES SUMMED DECX CPWRPOINT TO MS TALLY BYTE BCC CPWRJUMP IF NO CARRY INTO MS BYTE INC OX INCREMENT MS T~ALLY BYTE

CBPOWER

LDA #239 STA TEMP+l JSR MUL4x1 NUM1=(EOB/256)*(DBCAL)*(1/256)*(239/256) LDX #IPOWER JSR ADD4_Xl *DCSCASUM SCALES AND SUMS EOC TO DCTALY AND DOES PHASE C POWER CAL.

*AND LOAD THE PHASE C POWER TO THE INCOM POWER TALLY.

DCSCA SUM -53- SI APPENDIX E PERSONAL COMPUTER BASED ENERGY MONITORING

PC

HARDWARE CLOCK I-iI~II->> Timer Tick I SR on 5 minute mark sets

POLLENERGYFLAG

lOS MAIN LOOP

(COMMPROG)

executes a normal potl~ing scheme but watches the POLL ENERCIY FLAG kin procedure

SERVICE-UTILITY)

and breaks out to do the ENERGY-POLL as follows:

ENERGYPOLLO:

if ((POLLENERGYFLAG ==true) BROADCAST SNAPSHOTENERGYO; redundant broadcast to BROAD CAST-SNAPSHOT ENERGY insure energy data capture 1* Read aLL DATA PLUS devices for DEVICE DEVICE n; DEVICE++) if (DEVICE -TABLE (DEVICE) .DEVICE TYPE DATA-PLUS) DPENERGYACTIONTABLE(POLL ENERGY,DEVICE TABLE [DEVICEJ); 4

S

@4 4 4* 44

S

might want to delay here if no DATA PLUS devices OS 4 4* *6

S

.4

S

S

S

S

S

44 4

S.

.5 4. S S

S.

,I A k '-54, E-2 1* Read all. ENERGY MONITOR devices for DEVICE DEVICE n; device++) DEVI CETABLE [DEVICE] .DEVI CEDATAADDRESS (DELTA-SECOND] 0; if (DEVICETABLE EDEVICE].DEVICE TYPE EMON) EMONENERGYACTIONTABLE(POLL .ENERGY,DEVICE TABLE [DEVICE!); Read all DATA PLUS or ENERGY MONITOR devices that did not rospond property Last time. for CDE"I

T

CE 1; DEVICE n; DEVICE if (DEVICETABLE [DEVICE].DEVICE TYPE DATA-PLUS) &(DEVICETABLE [DEVI CEI DEVI CEDATAADDRESS [EMON STATUS] 1= VALID)) O)PENERGYACT IONTABLE(POLL ENERGY, DEVI CE TABLE (DEVICE]); if (DEVICE-TABLE CDEVICE3.DEVICETYPE LMON (DEVICETABLE [DEVICE].DEVI CEDATAADDRESS EEMON STATUS] 1= VALID)) EMON ENERGYACT IONTABLE (POLLENERGY, DEVI CE TABLE [DEVICE]) 1* Stop polting so that device dependent data wilt not be overwritten when normat potting resumes. Application 1* ust read device dependent data and issue STARTPOLLING*/ 1* request as quickly as possible.

STOP-POLLINGO;

see* Log an event (device not important) setting the newly 1* defined TREND ENERGY LOG bit (bit 6) in the action fieU 9 of the event record.

SET EVENT LOGO; *ego 660.

E-3 EMONENERGYACTIONTABLE(POLLTYPE, DEVICE TBL PIR, switch(POLLTYPE) case POLL-ENERGY: First get the FAST STATUS if GET STD STATUS() atse) DEVICETBL PTR.DEVICE-i3EPENDENTDATA [ENONSTATUS2 UNKNOWN; return(false); //if 1* Analyze the Energy Monitor status byte switch CEMONSTATUS) case ALARM: DEVICE TBL PTR.DEVICE DEPENDENT DATA [ENON STATUS) ALAR retur(faLse); case WRONGDEVICE: DEVICETBLPTR.DEVICE DEPENDENTDATA tENONSTATUS) UNK~ return-(fatse);

M;

NOWN;

*00~00 0 0~ 0~ *0 0 0 *0* 0 0 0* 9* 0 00 *0 0 0 0e* 9**0

S

S

*000 0 **0*00

S

00 05 00 ~4 0 00 0 00 @0 case ENERGY-NOT READY DEVICETBLPTR.DEVICE DEPENDENTDATA EEMONSTATUS) NREADY; Try to save energy once mcre STDSLAVE COMMAND (SAVEENERGYSNAPSHOT); Get time offset in seconds to correct skew in energy snapshot sanpte DEVICETBLPTR. DEVI CEDEPENDENT DATA (DELTASECI TIME.SECONDS: ret urn(f a se) -56- E -4 case ENERGYREADY: if (GETSTDSNAPSHOT ENERGY ==fatse) DEVICE TBL PTR.DEVICE DEPENDENT DATA [EMON STATUS3 UNKNOWN; return(faltse);-- Move energy vatues to device dependent data Mark the Energy Monitor data vaLid DEVI CETBLPTR. DEVI CE DEPENDENTDATA LEMONSTATUS] VALID; return( true); /switch defautt: 1* iLtegaL request DEVICE_-TBL -PTR.DEVICEDEPENDENTDATA CEMONSTATUS] UNKNOWN; return(false); /switch

Claims (23)

1. An electrical monitoring system for use on an AC line, comprising: a circuit breaker installed on said AC line; a backpack unit mounted on said circuit breaker and having an opening through which said AC line is passed and wherein said backpack unit further has mounted therein transducer means cooperating wit said AC line for deriving analog signals representative of AC line current and voltage, analog to digital means for converting said analog signals to digital signals, and processing means for computing electrical measurements from said digital signals; a remote monitoring device for retrieving said computed electrical measurements; and bi-directional digital communication means linking said backpack unit and said remote monitoring device for establishing a date, highway therebetween.

2. The monitoring system of claim 1, wherein said transducer means comprises a current transducer inductively coupled with said AC line and a voltage metering device S. connected to said AC line.

3. The monitoring system of claim 2, further comprising PC board mounted in said backpack unit having an opening around which is mounted, said current transducer and wherein said AC line is passed through said opening and through said current *a transducer. -58-

4. The monitoring system of claim 3, wherein said analog to digital means and said processing means are integrated in a CMOS monolithic circuit.

The monitoring system of claim 4, further comprising a second PC board mounted in said backpack unit on which said CMOS monolithic circuit is mounted.

6. The monitoring system of claim 3, wherein said circuit breaker has a female terminal into which said AC line is inserted and wherein said backpack unit has a stab cooperating with said female terminal for mounting said backpack unit on said circuit breaker, said stable providing the connection between said AC line and said voltage metering device.

7. The monitoring system of claim 6, wherein at least one of said computed electrical measurements is a value representative of an RMS current value associated with said AC line.

8. The monitoring system of claim 6, wherein at least one of said computed electrical measurements is a value representative of an RMS voltage value associated with said AC line.

9. The monitoring system of claim 6 r wherein at least one of said computed electrical measurements is a set of values representative of power value associated with said AC line. The monitoring system of claim 6, wherein at least one of said computed electrical measurements is a value representative of an energy value associated with said AC line.

Sii 9.9. *9* Sr 0*i I 0S 99 Si S. Id -59-

11. An electrical monitoring system for use behind a collective electrical meter having a plurality of AC lines associated therewith, said electrical monitoring system comprising: a plurality of circuit breakers wherein each of said AC lines has installed thereon one of said plurality of circuit breakers; a plurality of backpack units individually mounted on each of said circuit breakers, each of said backpack units having an opening through which said AC line passes, so that a backpack unit mounts to a circuit breaker and an AC line passes through the backpack unit ane connects to the circuit breaker, and wherein each of said backpack units further has transducer means S• cooperating with said AC line for deriving analog •e signals representative of AC line current and voltage, Goes analog to digital means for concerting said analog 0 signals to digital signals, processing means for computing electrical measurements from said digital signals, and storage means for saving said electrical measurements; a remote monitoring device for retrieving said electrical measurements from each of said plurality of backpack units; and bi-directional digital communication means linking said «o remote monitoring device to each of said plurality of backpack units for establishing a data highway therebetween.

12. The monitoring system of claim 11, wherein said bi- directional communication means is used at regular successive intervals by said remote monitoring device to initially and simultaneously address and command each of said plurality of backpack units to store said electrical measurements whereby said remote monitoring device may address and poll each of said plurality of backpack units individually to retrieve said stored electrical measurements.

13. The monitoring system of claim 12, wherein said transducer means comprises a current transducer inductively coupled withsaid AC line and a voltage metering device connected to said AC line.

14. The monitoring system of claim 13, wherein each of said plurality of backpack units further has a PC board mounted therein having an opening around which i mounted said current transducer and wherein said AC line passes through *54@ said opening and through said current transducer.

15. The monitoring system of claim 14, wherein said analog to digital means and said processing means are integrated in a CMOS monolithic circuit.

16. The monitoring system of claim 25, wherein each of said 4 a plurality or backpack units further has a second PC board on which said CMOS monolithic circuit is mounted.

17. The monitoring system of claim 14, wherein each of said plurality of circuit breakers has a female terminal into which said AC line is connected and wherein each of said backpack units has a stab cooperating with said female -61- terminal for mounting said backpack unit on said circuit breaker and wherein said stab provides the connection between said AC line and said voltage metering device.

18, The monitoring system of claim 17, wherein at least one of said electrical measurements i a value representative of an RMS current value associated with the individual AC line to which said backpack unit is connected.

19. The monitoring system of claim 17, wherein at least one of said electrical measurements is a value representative of an RMS voltage value associated with the individual AC line to which said backpack unit is connected.

The monitoring system of claim 17, wherein at least one of said electrical measurements is a set of values representative of power values associated with the individual AC line to which said backpack unit is connected.

21. The monitoring system of claim 17, wherein at least one *u of said electrical measurements is a value representative of <4 4 an energy consumption associated with the individual AC line to which said backpack unit is connected.

An electrical monitoring system for use on an AC line substantially as hereinbefore described with reference to the 2 accompanying drawings.

23. An electrical monitoring system for use behind a collective electrical meter having a plurality of AC lines associated therewith substantially as hereinbefore described -62- with reference to the accompanying drawings. Dated this 29th day of June 1995. EATON CORPORATION, Patent Attorneys for the Applicant: PETER MAXWELL ASSOCIATES a S. be as*