AU724437B2 - Symbol synchronization follow-up method and apparatus using the same - Google Patents
Symbol synchronization follow-up method and apparatus using the same Download PDFInfo
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- AU724437B2 AU724437B2 AU18975/97A AU1897597A AU724437B2 AU 724437 B2 AU724437 B2 AU 724437B2 AU 18975/97 A AU18975/97 A AU 18975/97A AU 1897597 A AU1897597 A AU 1897597A AU 724437 B2 AU724437 B2 AU 724437B2
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- 238000000034 method Methods 0.000 title claims description 27
- 230000005540 biological transmission Effects 0.000 claims description 57
- 238000001514 detection method Methods 0.000 claims description 41
- 238000005070 sampling Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000000630 rising effect Effects 0.000 description 3
- 230000000717 retained effect Effects 0.000 description 2
- 241000981595 Zoysia japonica Species 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Time-Division Multiplex Systems (AREA)
Description
,7^ S F Ref: 377004
AUSTRALIA
PATENTS ACT 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT
ORIGINAL
Name and Address of Applicant: NEC Corporation 7-1, Shiba Minato-ku Tokyo
JAPAN
Kazuhiro Kurlhara Actual Inventor(s): Address for Service: Spruson Ferguson, Patent Attorneys Level 33 St Martins Tower, 31 Market Street Sydney, New South Wales, 2000, Australia Symbol Synchronization Follow-Up Method and Apparatus Using the Same Invention Title: The following statement is a full description of this invention, Including the best method of performing it known to me/us:- 5845 SYMBOL SYNCHRONIZATION FOLLOW-UP METHOD AND APPARATUS USING THE SAME BACKGROUND OF THE INVENTION The present invention relates to a symbol synchronization follow-up method and an apparatus using the same in which a follow-up of symbol synchronization is conducted for transmission data including an error detection code for each data frame.
Description of the Prior Art Conventionally, in the symbol synchronization followup method of this kind, each symbol of transmission data 10 (particularly indicating reception data) is sampled at an appropriate point of timing. For example, in a delay or comparison detection, the symbol acquisition and followed up are conducted to sample the symbols at timing at which the eye becomes wider in the eye pattern. Additionally, when the reception data is burst data, the follow-up of symbol synchronization is accomplished with the precision of selfrunning clock signals increased for the prevention of stepout of symbol synchronization in a portion where data is interrupted.
As a technology associated with the symbol synchronization follow-up above, reference is to be made to, for example, the contents described in the Japanese Patent Laid-Open Ser. No. 4-2235.
Figs. 1A and 1B are diagrams for explaining the frame synchronization detecting method. Fig. 1A shows in a block diagram the fundamental constitution of the method, whereas Fig. 1B is a signal timing chart related to operation of the -2method, namely, operation to detect frame synchronization.
In the synchronization detecting method, as can be seen from Fig. 1A, a cyclic redundancy check (CRC) data generator 101 is provided on the transmission side. Data resultant from CRC generation conducted by the CRC data generating section 101 is added to each frame such that transmission data including the CRC data is sent to the reception side. On receiving the transmission data, the reception data checks the CRC data for each frame length by a CRC data check section 201.
e..
In the operation, CRC-TIM for which the CRC data check is started is shifted one bit for each frame length as shown in Fig. lB. When CRC-TIM matches CDT-TIM for which the CRC data check is to be commenced, it is assumed that eooo 15 matching takes place for the CRC data check. Deciding the position as the first position of a frame, it is possible to establish frame synchronization.
Specifically, as another technology related to the S. present invention, there has been known a synchronization circuit described in the Japanese Patent Laid-Open Ser. No. 4- 211547. In the synchronization circuit, the CRC data examination is adopted for the frame synchronization, not for the symbol synchronization, which is the same as the system in the Japanese Patent Laid-Open Ser. No. 4-2235. The technology is similar to that described above in the use of the results of error detection such as CRC data check.
However, the processes subsequent thereto varies between these technologies.
In accordance with the synchronization detecting method described above, once the symbol synchronization is -3lost due to influence from disturbing waves such as cochannel interference, the process of establishing the symbol synchronization is required to be conducted beginning at the start point thereof, just like in the initial point of data reception, for the restoration of the symbol synchronization.
This takes a long period of time and hence leads to a problem of increase in the chance of decoding errors of transmission (reception) data during the operation to restore symbol synchronization.
SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a symbol synchronization follow-up method and an apparatus using the same in which the period of time required to restore the symbol synchronization when the step-out occurs in the symbol synchronization so as to minimize the chance of decoding errors of the Stransmission (reception) data.
o 15 In accordance with the present invention, there is provided a symbol synchronization follow-up method including the steps of detecting, on receiving by a reception side transmission data sent from a transmission side with an error detection code added to each data frame thereof, an error in a data frame of the transmission data, ooo• and producing a result of the error detection and processing the received transmission data *o 20 according to the error detection result, establishing symbol synchronization for the o received transmission data, following up the symbol synchronization, holding, when a data frame is free of errors, sample timing of a last symbol of the data frame and setting an initial value of sample timing of the first symbol of the subsequent data frame to the held value of sample timing, and setting, when a data frame is associated with an error, [R:\LIBQ]00365.doc:bfd -4an initial value of sample timing of a first symbol of the subsequent data frame to the held value of sample timing.
On the other hand, in accordance with the present invention, there is provided a symbol synchronization follow-up apparatus including a transmitter including error detection code generator means for adding an error detection code to each data frame and sending transmission data including the data frame and a receiver for receiving the transmission data.
The receiver includes error detecting means for detecting an error in each data frame of the received transmission data and producing an error detection signal and 1o symbol synchronizing means for receiving the transmission data according to the error detection result, establishing symbol synchronization for the received transmission data, following up the symbol synchronization. The symbol synchronizing means holds, when a data frame is free of errors, sample timing of a last symbol of the data frame and sets an initial value of sample timing of a first symbol of the subsequent data frame to the held is value of sample timing. The symbol synchronizing means sets, when a data frame is associated with any error, an initial value of sample timing of the first symbol of the subsequent data frame to the held value of sample timing.
with Additionally, in a symbol synchronization follow-up apparatus in accordance with the present invention, the symbol synchonizing means sends, to the error detecting means, a timing signal indicating a point of timing for sampling the received transmission data according to the received transmission data in the symbol synchronization follow-up operation and the error detecting means samples the received transmission data according to the timing signal and [R:\LIBQ]00365.doc:bfd produces the error detection signal.
BRIEF DESCRIPTION OF THE DRAWINGS The objects and features of the present invention will become more apparent from the consideration of the following detailed description taken in conjunction with the accompanying drawings in which: Fig. 1A is a block diagram showing the fundamental structure of the conventional method of detecting frame synchronization; Fig. 1B is a signal timing chart of operation of the method of Fig. 1A; Fig. 2 is a block diagram showing the basic construction of a first embodiment of the symbol synchronization follow-up device using the symbol synchronization follow-up method in accordance with the present invention; and Fig. 3 is a signal timing chart showing waveforms of 9*I" 9 operation processing signals at respective blocks of the symbol synchronization follow-up device of Fig. 2.
\:ee DESCRIPTION OF THE PREFERRED EMBODIMENTS i:r Referring now to the drawing, description will be given of embodiments of a symbol synchronization follow-up 25 method and an apparatus using the same in accordance with the present invention.
First, description will be given of an output of the symbol synchronization follow-up method in accordance wi-th the present invention. This method executes an error detection stage and a stage of processing follow-up of symbol 6 synchronization. The error detection state is operative, when the reception side receives transmission data to which an error detection code is added for each data frame by the transmission side, to check an error in each data frame of the transmission data and to acquire results of the error check. When such an error is missing in the data frame is free, the stage of processing follow-up of symbol synchronization holds sample timing of the last symbol of the data frame to set the sample timing as the initial value of 10 sample timing for the first symbol of the subsequent data frame. On the other hand, when the data frame is associated S. with a data error, the sample timing held before is set as the initial value of sample timing for the first symbol of the subsequent data frame.
15 In a case in which the data frame is free of errors as a result of the error check in the error detection stage, the sample timing of each symbol can be regarded as appropriate in the data frame. In this situation, in the symbol follow-up stage, the sample timing of the last symbol of the data frame is held such that the sample timing is set as the initial value of sample timing for the first symbol of the subsequent data frame. However, when the data is related to a data error, the sample timing beforehand held is set as the initial value of sample timing for the first symbol of the subsequent data frame. This resultantly establishes symbol synchronization for the first symbol of each data frame. With this provision, even when the symbol synchronization is destroyed due to, for example, the cochannel interference, it is possible to restore the symbol synchronization at the beginning of the subsequent data frame.
7 Fig. 2 shows in a block diagram the fundamental structure of an embodiment of the symbol synchronization follow-up device utilizing the symbol synchronization followup described above.
The symbol synchronization follow-up device includes a transmitter (transmission side) 1 including an error detection code generator 11 as error detection code generating means for adding an error detection code to each data frame and thereby transmitting transmission data a and a receiver (reception side) 2 for receiving the transmission data a. The receiver 2 includes an error detector circuit 22 and a symbol synchronization circuit 21. The error detector circuit 22 is disposed as error detecting means for detecting errors in the transmission data a for each data frame and 15 producing an error detection signal d. The symbol synchronization circuit 21 is used as symbol synchronizing 0% 0 means for receiving the transmission data a according to the error detection signal d and establishing and following up :"symbol synchronization. Moreover, when errors are not found S" 20 in the data frame, the circuit 21 holds sample timing of the last symbol of the data frame to set thereafter the sample timing as the initial value of sample timing for the first symbol of the next data frame. When any error is found in the data frame, the circuit 21 sets sample timing beforehand held as the initial value of sample timing for the first symbol of the next data frame.
More concretely, on transmitting information data e sent from an external device, the error detection code generator 11 of transmitter 1 adds an error detection code for each data frame to create transmission data a including the 8 code and then transmits the transmission data to the receiver 2.
At reception of the transmission data a, the error detector 22 of the receiver 2 samples the transmission data a according to a timing signal supplied from the symbol synchronizer circuit 21 to thereby detect any error in the data frame and then outputs to the symbol synchronizer 21 the error detection signal d indicating presence or absence of errors. Additionally, the error detector 22 processes the 10 received transmission data a including the information data e to resultantly produce reception information data f.
The symbol synchronizer 21 accomplishes the symbol *0*synchronization follow-up using two methods. In the first method, the circuit 21 processes the transmission data a to 15 establish symbol synchronization and thereafter carries out the follow-up operation. In the second method, when the error detection signal d from the error detector 22 indicates absence of errors in the data frame, the symbol synchronizer 21 holds sample timing of the last symbol of the data frame.
20 When the signal d indicates presence of errors in the data frame, the synchronizer 21 continuously holds sample timing previously obtained. Thereafter, at timing of the first symbol of the subsequent data frame, the synchronizer 21 sets the sample timing as the initial value of sample timing for the subsequent operation to thereby follow up the symbol synchronization. Conducting the follow-up operation of the symbol synchronization, the symbol synchronizing circuit 21 sends to the error detector circuit 22 a timing signal b indicating a sampling point of timing of the transmission data a.
-9- Fig. 3 shows in a signal timing chart showing waveforms of operating signals in respective blocks of the symbol synchronization follow-up device. In the graph, the abscissa represents time t and each signal operates on the axis of time t. Furthermore, the transmission data a is assumed to be burst data of which each frame includes n symbols.
The symbol synchronizer 21 receives the transmission data a, establishes symbol synchronization, and produces a 10 timing signal b of which a falling edge is used as sample .666 timing of transmission data a. When a particular data frame is decoded without any data error, it can be considered that ~the symbol synchronization is appropriate for the data frame.
Namely, the sample timing is appropriate for each symbol of 15 the data frame. When the results of error detection indicate absence of errors, the synchronizer 21 holds sample timing of the last symbol of the data frame decodedwithout any error.
6ooo On the other hand, when an error is detected, sample timing beforehand held is kept retained to set as the initial value of sample timing for the first symbol of the subsequent data frame, thereby efficiently following up the symbol synchronization.
In conjunction with the relationship between the signals shown in Fig. 1B, when frame 1 of transmission data a is decoded without any error, the error detector 22 set the error detection signal d to a high level relative to level O.
Receivingthe signal d, the symbol synchronizer 21 holds sample timing of the last symbol of frame 1 at a rising edge of the detection signal d.
The sample timing of the last symbol of frame 1 is at a position of phase l1. Consequently, when there is held phase information of a timing signal b which falls in phase€ 1 for symbols, the sample timing can be held. In the graph, the hold phase c is changed from phase ¢0 held up to the point to phase 1 at the rising edge of error detection signal d.
To match sample timing of the first symbol of frame 2 with that of the last symbol of frame 1, the phase of timing signal b is adjusted according to phase q1. After the second 10 symbol of the data frame, the symbol synchronization is followed up by processing the transmission data a. Like in the case of frame 2, when there exists an interference wave D i greater than the transmission data a, an error appears in the results from the decoding of data a and there is increased 15 the chance in which the symbol synchronization is adversely influenced by the disturbing wave.
0*o* When an error is detected in frame 2, the error 0o00 detector set the error detection signal d to a low level .:.relative to level O. The symbol synchronizer 21 does not hold 20 sample timing (phase 02) of the last symbol of frame 2 but keeps the sample timing (phase 01) held up to this point.
In this case, to match sample timing of the first symbol of frame 3 with the sample timing of the last symbol of frame 1, the phase of timing signal b is adjusted according to phaseO 1.
For the second and subsequent symbols, the transmission data a is processed to follow up the symbol synchronization. When the error is missing in frame 3, sample timing of the last Symbol is held at the rising edge of the error detection signal d and then the phase c is -11changed from phase q 1 to phaseq53.
According to the follow-up of synchronization above, when it is found as a result of error detection that the data frame is free of errors, the sample timing of the last symbol is held. When the data frame is associated with an error, the sample timing held before is kept held. The obtained sample timing is thereafter set as the initial value of sample timing of the first symbol of the next data frame. Consequently, even when the symbol synchronization is lost, it is possible 10 to restore the state in which the symbol synchronization is established in the first symbol of the subsequent data frame. 'S Se Resultantly, there can be implemented a symbol synchronization follow-up method in which the chance of errors in the symbol synchronization follow-up can be reduced and which is resistive against disturbing waves such as the cochannel interference.
In accordance with the present invention described above, when receiving transmission data in which an error detection code is added to each data frame, the symbol .20 synchronization is followed up by processing the received data Moreover, sample timing of the last symbol of the data frame which is decoded without error through the error detection is held to be set as the initial value of sample timing of the first symbol of the next data frame. When an error occurs in the decoding operation, the sample timing held up to the point is kept retained to be set as the initial value of sample timing of the first symbol of the data frame. Even when the symbol synchronization is destroyed due to the cochannel interference or the like, it is possible to recover the state in which the symbol synchronization is -12established at the beginning of the subsequent data frame.
In consequence, the period of time required to restore the symbol synchronization is minimized and the change of decoding errors for the transmission (reception) data can be lowered.
That is, in accordance withthe present invention, in addition to the conventional symbolsynchronization and follow-up operation in the reception of the transmission (reception) data, there is achieved an operation to restore the state in which the symbol synchronization is established 10 at the first position of the data frame. Therefore, symbol synchronization follow-up errors are decreased and there can achieved a symbol synchronization follow-up operation not easily influenced by disturbing wave such as the cochannel interference.
0000 15 While the present invention has been described with reference to the particular illustrative embodiments, it is not to be restricted by those embodiments but only by the *ooo appended claims. It is to be appreciated that those skilled S* in the art can change or modify the embodiments without 20 departing from the scope and spirit of the present invention.
Claims (4)
1. A symbol synchronization follow-up method, comprising the steps of: detecting, on receiving by a reception side transmission data sent from a transmission side with an error detection code added to each data frame thereof, an error in a data frame of the transmission data and producing a result of the error detection; and processing the received transmission data according to the error detection result, establishing symbol synchronization for the received transmission data, following up the symbol synchronization, holding, when a data frame is free of errors, sample timing of a last symbol of the data frame and setting an initial value of sample timing of the first symbol of the subsequent data frame to the held value of sample timing; and setting, when a data frame is associated with any error, an initial value of sample i timing of a first symbol of the subsequent data frame to the held value of sample timing.
S. A symbol synchronization follow-up apparatus, comprising: S* a transmitter including error detection code generator means for adding an error detection code to each data frame and sending transmission data including the data frame; •go• *o and S" 20 a receiver for receiving the transmission data, wherein the receiver includes: °o error detecting means for detecting an error in each data frame of the received Se** transmission data and producing an error detection signal; and symbol synchronizing means for receiving the transmission data according to the error detection result, establishing symbol synchronization for the received transmission data, following up the symbol synchronization, [R:\LIBQ]00365.doc:bfd -14- the symbol synchronizing means holding, when a data frame is free of errors, sample timing of a last symbol of the data frame and setting an initial value of sample timing of a first symbol of the subsequent data frame to the held value of sample timing, the symbol synchronizing means setting, when a data frame is associated with any error, an initial value of sample timing of the first symbol of the subsequent data frame to the held value of sample timing.
3. A symbol synchronization follow-up apparatus according to claim 2, wherein: the symbol synchronizing means sends, to the error detecting means, a timing signal indicating a point of timing for sampling the received transmission data according to the received transmission data in the symbol synchronization follow-up operation; and the error detecting means samples the received transmission data according to S**so the timing signal and produces the error detection signal.
4. A symbol synchronization follow-up method substantially as described herein with reference to Figs. 3 and 4 of the drawings. S A symbol synchronization follow-up apparatus substantially as 20 described herein with reference to Figs. 3 and 4 of the drawings. *sob DATED this twentieth Day of July, 2000 NEC Corporation Patent Attorneys for the Applicant SPRUSON FERGUSON [R:\LIBQ]00365.doc:bfd
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9892496A JPH09284270A (en) | 1996-04-19 | 1996-04-19 | Symbol synchronization tracking method and symbol synchronization tracking device adopting it |
| JP8-98924 | 1996-04-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU1897597A AU1897597A (en) | 1997-10-23 |
| AU724437B2 true AU724437B2 (en) | 2000-09-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU18975/97A Ceased AU724437B2 (en) | 1996-04-19 | 1997-04-18 | Symbol synchronization follow-up method and apparatus using the same |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPH09284270A (en) |
| AU (1) | AU724437B2 (en) |
| GB (1) | GB2312361B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI304694B (en) * | 2004-09-22 | 2008-12-21 | Free Systems Pte Ltd | A method and apparatus for ensuring high quality audio playback in a wireless or wired digital audio communication system |
| WO2006070222A2 (en) * | 2004-09-22 | 2006-07-06 | Freesystems Pte., Ltd. | An apparatus and method for adaptive digital locking and soft evaluation of data symbols in a wireless digital communication system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5528634A (en) * | 1993-11-18 | 1996-06-18 | Motorola, Inc. | Trajectory directed timing recovery |
| US5715278A (en) * | 1993-05-11 | 1998-02-03 | Ericsson Inc. | Standby power saving in mobile phones |
| US5768323A (en) * | 1994-10-13 | 1998-06-16 | Westinghouse Electric Corporation | Symbol synchronizer using modified early/punctual/late gate technique |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2075309B (en) * | 1980-04-29 | 1984-03-07 | Sony Corp | Processing binary data framing |
| GB8910255D0 (en) * | 1989-05-04 | 1989-06-21 | Stc Plc | Data stream frame synchronisation |
| GB2264212B (en) * | 1992-02-12 | 1996-01-10 | British Telecomm | Data transmission |
-
1996
- 1996-04-19 JP JP9892496A patent/JPH09284270A/en active Pending
-
1997
- 1997-04-18 GB GB9707835A patent/GB2312361B/en not_active Expired - Fee Related
- 1997-04-18 AU AU18975/97A patent/AU724437B2/en not_active Ceased
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5715278A (en) * | 1993-05-11 | 1998-02-03 | Ericsson Inc. | Standby power saving in mobile phones |
| US5528634A (en) * | 1993-11-18 | 1996-06-18 | Motorola, Inc. | Trajectory directed timing recovery |
| US5768323A (en) * | 1994-10-13 | 1998-06-16 | Westinghouse Electric Corporation | Symbol synchronizer using modified early/punctual/late gate technique |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2312361B (en) | 2000-09-06 |
| AU1897597A (en) | 1997-10-23 |
| JPH09284270A (en) | 1997-10-31 |
| GB9707835D0 (en) | 1997-06-04 |
| GB2312361A (en) | 1997-10-22 |
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