AU755449B2 - Electronic circuit board and soldering method therefor - Google Patents
Electronic circuit board and soldering method therefor Download PDFInfo
- Publication number
- AU755449B2 AU755449B2 AU91453/01A AU9145301A AU755449B2 AU 755449 B2 AU755449 B2 AU 755449B2 AU 91453/01 A AU91453/01 A AU 91453/01A AU 9145301 A AU9145301 A AU 9145301A AU 755449 B2 AU755449 B2 AU 755449B2
- Authority
- AU
- Australia
- Prior art keywords
- board
- soldering
- warp
- flow soldering
- lands
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000005476 soldering Methods 0.000 title claims description 46
- 238000000034 method Methods 0.000 title claims description 14
- 229910000679 solder Inorganic materials 0.000 claims description 39
- 238000010521 absorption reaction Methods 0.000 description 6
- 239000011295 pitch Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
S&F Ref: 496089D1
AUSTRALIA
PATENTS ACT 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT
ORIGINAL
Name and Address of Applicant: Actual Inventor(s): Address for Service: Canon Kabushiki Kaisha 30-2, Shimomaruko 3-chome, Ohta-ku Tokyo 146 Japan Keisuke Someya Akira Okabe Spruson Ferguson St Martins Tower,Level 31 Market Street Sydney NSW 2000 (CCN 3710000177) Invention Title: Electronic Circuit Board and Soldering Method Therefor The following statement is a full description of this invention, including the best method of performing it known to me/us:- 1? Austalaa pocurnts tGc ved on'
DOCU~U
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-1 5845c TITLE OF THE INVENTION ELECTRONIC CIRCUIT BOARD AND SOLDERING METHOD
THEREFOR
FIELD OF THE INVENTION The present invention relates to an electronic circuit board and a soldering method therefor and, more particularly, to a technique for preventing an inter-terminal solder bridge formed in a flow soldering process for an electronic circuit board.
BACKGROUND OF THE INVENTION To solder various types of component terminals and board wires of a conventional electronic circuit board to each other by a flow soldering method, components are 15 temporarily fixed to component terminal soldering lands, corresponding to them and formed at predetermined portions on the board, with an adhesive. Alternatively, the components are inserted in component insertion holes formed in the lands, are dipped in a molten solder jetting upward S 20 from a flow solder tank, and are passed through the molten solder at a predetermined speed.
It is known that when the terminal pitches of the component to be soldered are small, an inter-terminal bridge is formed between the terminals of the component due to an excessive solder. To remove the excessive solder, on aboard 102 having a periphery where components are to be mounted 1 -2as shown in Fig. 3A, an extending land 106 as shown in Fig. 3B is formed most downstream of an arrow D of circular lands 105 on each connector 101 which is to be mounted along the arrow D of the flow solder convey direction, to serve as a so-called excessive solder absorption land. This aims at preventing a component inter-terminal bridge from being formed by the surface tension of the solder on the land that is removed from the solder tank finally.
Alternatively, the land at the terminal end of a component where an interterminal bridge tends to be formed is enlarged in a direction (to be referred to as a board flow direction D hereinafter) along which the component is passed above the molten solder, to be opposite to the flow direction.
SUMMARY OF THE INVENTION According to a first aspect of the invention there is provided an electronic circuit board having plural lands formed on a flow soldering surface thereof for flow soldering, wherein among said plural lands which are formed to be substantially perpendicular to a convey direction for the flow soldering, only lands which are located at a downstream side of warp of said board have extended portions extending along the warp direction.
According to a second aspect of the invention there is provided a soldering 20 method for an electronic circuit board having plural lands formed on a flow soldering surface thereof for flow soldering comprising: the mounting step of mounting an electronic component on an electronic component mounting surface of a board having said plural lands which are formed to be substantially perpendicular to a convey direction for the flow soldering and among said plural lands, only lands which are located at a downstream side of warp of said board S•have extended portions extending along the warp direction to extend toward a downstream side of the warp of said board, and soldering step of bringing a molten solder into contact with a lower surface of said electronic component mounting surface while conveying said board in the convey direction, thereby performing flow soldering.
With the prior art described above, when a component having a small terminal pitch is to be arranged such that its terminal array direction along which the terminals of the component are aligned is perpendicular to the board flow direction, a solder bridge between the terminals is not prevented sufficiently, and a soldering error occurs by the solder bridge. It is also known that the board warps on its component mounting surface [RA:LIBOO]5210.doc:grm -3side due to heat conduction of the molten solder. This makes it further difficult to prevent a component inter-terminal bridge from being formed by the surface tension of the solder on the land that is removed from the solder tank finally.
Other features and advantages of the present invention will be apparent from the s following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof.
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A is a front view showing a flow soldering state; Fig. 1B is a perspective view of an outer appearance showing the flow soldering state; Fig. 2A is a plan view of a soldering surface 2b of a board 2; Fig. 2B is a view taken along the line X X of arrows in Fig. 2A; Fig. 3A is a plan view of component mounting surface of a conventional board 102; and Fig. 3B is a view showing an excessive solder absorption land.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred arrangement will be described with reference to the accompanying drawings.
Fig. 1A is a front view showing a flow soldering state, and Fig. 1B is a S"perspective view of its outer appearance.
Referring to Figs. 1A and 1B, a connector 1 having small pitches is arranged on i 25 the periphery of a board 2 formed with a component mounting surface 2a and a soldering •surface 2b, such that its terminal array is perpendicular to a board flow direction D.
Terminals 1 a of the connector 1 are inserted in the through holes of the lands of the board 2, to project downward from the soldering surface 2b. A molten solder 4 jets upward from a solder tank 3 of a flow solder apparatus. From this state, the board 2 is moved in the direction of the arrow D by a convey means (not shown), and the lands and the terminals l a are soldered. Fig. 2A is a plan view of the soldering surface 2b of the board 2, and Fig. 2B is a view taken along the line X X of arrows in Fig. 2A. Referring to Figs. 2A and 2B, circular soldering lands 5 each formed around the through hole as the center, and extending lands 6 for excessive solder absorption are formed at a portion downstream side of the warp, as shown in Figs. 2A and 2B.
[R\LIBOO]5210 dcg:grm More specifically, it is known that, during flow soldering, the circuit board 2 warps downward by thermal expansion and is removed from the solder tank 3 finally.
For the component terminal la, the extending land 6 formed to be directed downstream side of the warp of the board 2 is arranged to correspond to the outermost terminal 1 a, as shown in Figs. 2A and 2B, to serve as an excessive solder absorption land for a component terminal l a.
As described above, when the extending land 6 is formed to be substantially perpendicular to the convey direction D for flow soldering and to be directed downstream side of the warp of the board 2, the excessive solder produced when the molten solder flows by its own weight in the direction of an arrow F, as shown in Fig. 2B, can be absorbed by the extending land 6. Therefore, the soldering error can be prevented, which is particularly effective for a connector having particularly small pitches.
The outermost terminal of the component described above indicates a terminal which is actually removed from the solder tank finally, regardless of the board flow direction, but depending on the warp of the board which always occurs during flow soldering and the component array conditions. The excessive solder on a terminal which is removed from the solder tank before the outermost terminal can be efficiently attached by the excessive solder absorption land.
As a result, a sufficiently large soldering prevention effect can be obtained even for a component arranged perpendicularly to the board convey direction D. The soldering error is thus eliminated easily.
As described above, when a component is to be arranged such that its terminal array is perpendicular to the board convey direction D during flow soldering, or when an inter-terminal solder bridge is formed between different components, if an excessive i 25 solder absorption land is formed to correspond to this solder bridge poi-tion at the terminal S•end of the actual exit order from the solder tank, the solder bridge which cannot be conventionally eliminated can be eliminated.
eoeeo When the above method is employed together with the method of forming the extending land 106 on the connector 101 which is to be mounted along the arrow D of the flow solder convey direction, as described above, a solder bridge can be further prevented regardless of the component mounting direction.
As has been described above, there is provided an electronic circuit board which can eliminate a soldering error for a component arranged such that its terminal array is perpendicular to the convey direction of the electronic circuit board which is to be flowsoldered, and a soldering method therefor.
[R:\LIBOO]5210.doc:gmm As many apparently widely different embodiments of the present invention can be made without departing from the spirit and scope thereof, it is to be understood that the invention is not limited to the specific embodiments thereof except as defined in the appended claims.
o o [R:\LIBOO]5210.doc:gmm
Claims (5)
1. An electronic circuit board having plural lands formed on a flow soldering surface thereof for flow soldering, wherein among said plural lands which are formed to be substantially perpendicular to a convey direction for the flow soldering, only lands which are located at a downstream side of warp of said board have extended portions extending along the warp direction.
2. The board according to claim 1, wherein said extended portions extend toward the downstream side of the warp.
3. The board according to claim 1 or 2, wherein the warp of said board is formed by thermal expansion that takes place during the flow soldering.
4. A soldering method for an electronic circuit board having plural lands formed on a flow soldering surface thereof for flow soldering comprising: the mounting step of mounting an electronic component on an electronic component mounting surface of a board having said plural lands which are formed to be ooooo 20 substantially perpendicular to a convey direction for the flow soldering and among said plural lands, only lands which are located at a downstream side of warp of said board have extended portions extending along the warp direction to extend toward a downstream side of the warp of said board, and soldering step of bringing a molten solder into contact with a lower surface of said electronic component mounting surface while conveying said board in the convey direction, thereby performing flow soldering.
5. A soldering method according to claim 4, wherein the warp of said board is formed by thermal expansion that takes place during the flow soldering. DATED this Nineteenth Day of November, 2001 Canon Kabushiki Kaisha Patent Attorneys for the Applicant SPRUSON FERGUSON [R:\LIBOO]5210.doc:gm
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU91453/01A AU755449B2 (en) | 1999-02-26 | 2001-11-21 | Electronic circuit board and soldering method therefor |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11-052056 | 1999-02-26 | ||
| AU18442/00A AU737524B2 (en) | 1999-02-26 | 2000-02-21 | Electronic circuit board and soldering method therefor |
| AU91453/01A AU755449B2 (en) | 1999-02-26 | 2001-11-21 | Electronic circuit board and soldering method therefor |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU18442/00A Division AU737524B2 (en) | 1999-02-26 | 2000-02-21 | Electronic circuit board and soldering method therefor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU9145301A AU9145301A (en) | 2002-01-10 |
| AU755449B2 true AU755449B2 (en) | 2002-12-12 |
Family
ID=3708129
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU91453/01A Ceased AU755449B2 (en) | 1999-02-26 | 2001-11-21 | Electronic circuit board and soldering method therefor |
Country Status (1)
| Country | Link |
|---|---|
| AU (1) | AU755449B2 (en) |
-
2001
- 2001-11-21 AU AU91453/01A patent/AU755449B2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| AU9145301A (en) | 2002-01-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FGA | Letters patent sealed or granted (standard patent) |