AU759082B2 - Clock recovery circuit and clock recovery method - Google Patents

Description

S&FRef: 431813D1

AUSTRALIA

PATENTS ACT 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT

ORIGINAL

Name and Address of Applicant: Actual Inventor(s): Address for Service: Mitsubishi Denki Kabushiki Kaisha 2-3, Marunouchi 2-chome Chiyoda-ku Tokyo 100-8310 Japan Yasushi Sogabe Fumio Ishizu Keishi Murakami Spruson Ferguson St Martins Tower,Level 31 Market Street Sydney NSW 2000 (CCN 3710000177) Clock Recovery Circuit and Clock Recovery Method Invention Title: The following statement is a full description of this invention, including the best method of performing it known to me/us:a a.

a a 5845c -1- CLOCK RECOVERY CIRCUIT AND CLOCK RECOVERY METHOD BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulation technique in communication using a coding method in which each symbol is expressed by a plurality of bits on a time base, and in particular to a clock recovery circuit and clock recovery method.

2. Description of the Related Art For example, a system in which a recovered clock is generated by use of a series 1o of received data, and demodulated data is decimated from the series of received data by use of the recovered clock is proposed as a demodulator for generating demodulated data from Manchester-coded signals. Fig. 10 is a block diagram of an configuration example of a conventional demodulator, schematically showing a configuration of a demodulation circuit, for example, disclosed in Japanese Patent No. 2508502, entitled "Demodulation is Circuit" (by Norio Numata, Takayuki Inoue, and Kenichi Sugawara). Further, Fig. 11 is a schematic diagram for explaining the operation of the conventional demodulator, and Fig.

12 is a flow chart showing the operation of the conventional demodulator.

In Fig. 10, the reference numberal 101 represents an input terminal into which a series of Manchester-coded received data are inputted; 102, a clock recovery circuit for 20 generating *oo .oo fR:\LIB00]5190.doc gma recovered clock by use of the series of received data, and outputting the recovered clock; 103, a phase correction circuit for correcting the phase of the recovered clock supplied from the clock recovery circuit 102 in order to generate a clock for decimation in demodulation, and outputting the corrected recovered clock as the clock for decimation; 104, a decimation circuit for decimation demodulated data out of the series of received data by use of the clock for decimation supplied from the phase correction circuit 103, and outputting the decimated demodulated data; and 105, an output terminal for the demodulated data.

Next, the operation will be described with reference to Figs. 10 to 12. The series of Manchester-coded received data has an inversion of data in each symbol, and each symbol is ooooo 15 formed of two bits. For example, when is transmitted by an NRZ (Non Return to Zero) signal, the is expressed by oo o in Manchester code, while when is transmitted,. the is expressed by Therefore, in demodulation, Manchester decoding is also performed at the same time by thinning out the bit in the first half or the bit in the second half in each symbol.

First, when a series of received data are inputted to the input terminal 101, the operation starts. When a recovered clock is generated by use of the series of received data in the clock recovery circuit 102 (Step S201), the phase correction circuit 103 corrects the phase of the recovered clock outputted 2 from the clock recovery circuit 102 so as to make the phase correspond to the bit in the first half or the bit in the second half in each symbol, and supplies the corrected recovered clock as a clock for decimation to the decimation circuit 104 in the succeeding stage (Step S202). The decimation circuit 104 decimates data from the series of received data by use of the clock for decimation supplied from the phase correction circuit 103 in the preceding stage, and outputs the data as demodulated data (Step S203). If the input of the series of received data disappears and the demodulation is completed, the operation is ended.

As described above, a conventional demodulator corrects the phase of a recovered clock generated by use of a series of received data so as to make the phase correspond to the bit in eoooo: .15 the first half or the bit in the second half in each symbol to •ego thereby generate a clock for decimation, and demodulated data oe out of the series of received data by use of the clock for decimation to thereby perform demodulation.

*ooHowever, in the conventional system, there has been a problem that a data decision point is apt to be mistaken by noise or interference because demodulation is performed by one- S point data per symbol. Further, though it is intended to reduce the error rate by thinning out the bits in the second half in each symbol, there has been a problem that an error occurs easily when there is a distortion in a transmission waveform, or when the duty ratio of and in a symbol is 3 -4deteriorated (for example, it is 4:6) because of a detector characteristic or a transmission path characteristic.

SUMMARY OF THE INVENTION According to a first aspect of the present invention there is provided a clock recovery circuit for recovering a clock from a series of received data which is coded so that each symbol is expressed by a plurality of bits on a time base, characterised by comprising a correlator for changing the phase of the series of received data or a reference gradually to thereby obtain a correlation between the series of received data and the reference, and outputting a plurality of correlation values, whereby a recovered clock is obtained on the basis of the plurality of correlation values.

Preferably, in the above-mentioned clock recovery circuit, the correlation obtains correlations between the series of received data and a plurality of references the initial phases of which are different from one another, and outputs a plurality of correlation is values corresponding to the plurality of references.

Preferably, the correlator obtains correlations between a reference having a predetermined phase and the series of received data the phase of which is changed gradually, and outputs a plurality of correlation values in accordance with the change of the phase of the series of received data.

o. 20 According to a further aspect of the present invention, there is provided a clock recovery method for recovering a clock from a series of received data which is coded so oe ee ee 0 .00. 0 190.doc: gmm that each symbol is expressed by a plurality of bits on a time base, characterised by comprising a correlation step of changing the phase of the series of received data or a reference gradually to obtain correlations between the series of received data and the reference to thereby output a plurality of correlation values, whereby a recovered clock is obtained on the basis of the plurality of correlation values.

DETAILED DESCRIPTION First Demodulator Configuration Fig. 1 is a block diagram showing a configuration of a demodulator.

Figs. 2A, 2B and 3 are schematic diagrams for explaining the operation of a correlator.

Fig. 4 is a schematic diagram for explaining the operation principle of the demodulator shown in Fig. 1.

Fig. 5 is a flow chart showing the operation of the demodulator shown in Fig. 1.

In Fig. 1, reference numeral 1 represents an input terminal into which a series of Manchester-coded received data are inputted; 2, a clock recovery circuit for generating a recovered clock by use of the series of received data, and outputting the recovered clock; 3, a state estimation circuit *e .oe o S.o :e i r e [R:\LIBOO] 5190.doc:gmm for making an estimation about a reception state such as waveform distortion or the like from the series of received data, and outputting waveform information based on the result of the estimation; 4, a correlator for correcting a reference and/or sample point by use of the waveform information outputted from the state estimation circuit 3 and the recovered clock outputted from the clock recovery circuit 2, obtaining a correlation value between the series of received data and the reference on the basis of a plurality of the sample points per symbol, and outputting demodulated data on the basis of the correlation value; and 5, an output terminal for the demodulated data.

First, the basic operation of a correlator used for demodulation of a series of Manchester-coded received data will '15 be described with reference to Figs. 2A and 2B. As mentioned above, for example, when is transmitted with an NRZ (Non Return to Zero) signal, it is expressed by "10" in Manchester code. When is transmitted, it is expressed by "01".

On the other hand, either a reference for having an 20 ideal signal form when is received, or a reference for "1" having an ideal signal form when is received is provided in the correlator to thereby output modulated data on the basis of a correlation value between the series of received data and the reference.

Here, assume that the reference for is used.

Further, assume that the correlation value is set to "correlation value: 1" when the series of received data and the reference coincide with each other, and to "correlation value: when the series of received data and the reference are inverted to each other.

For example, when a series of received data in a symbol takes a form shown in Fig. 2A, the correlator concludes that has been received as an NRZ signal since the series of received data coincides with the reference so that "correlation value: 1" is obtained and then outputs modulated data On the other hand, in the case of Fig. 2B, the correlator concludes that has been received as an NRZ signal since the series of received data is inverted to the reference so that "correlation value: is obtained and then outputs modulated data 4 oooe 15 Next, the operation of the correlator 4 shown in Fig.

1 will be described by use of Fig. 3. Here, assume that the reference for is used. Assume that the number of samples per symbol is 8 and the correlation value is within a range of -1 to 1 in order to simplify the description, though the number 20 of samples and the range of the correlation value may be set desirably (increased or reduced) in accordance with the system.

Further, assume that the first sample point in each symbol is synchronized with the recovered clock so as to be the first sample point of the symbol as shown in Fig. 3.

The correlator 4 looks over a correlation between the series of received data and the reference about 8 sample points -8per symbol to thereby obtain a correlation value. On the basis of the obtained result, the correlator 4 outputs demodulated data. For example, when a correlation between the series of received data and the reference is looked over, with the result that half or more of the sample points coincide, demodulated data is outputted. In any other case, on the contrary, demodulated data is outputted.

Specifically, two sample points are inverted when 6 sample points coincide in the case where the correlator 4 looks over a correlation about 8 sample points. Therefore, the correlation value is 4/8 and hence the demodulated data is outputted. When 7 sample points are inverted, one sample point coincides. Therefore, the correlation value is -6/8 and hence the ,o 15 demodulated data is outputted.

~Next, the operation principle of the demodulator will A be described with reference to Figs. 1 to 5. Although the number of samples per symbol is made to be 8 in order to simplify the description, the number of samples may be set 20 desirably (increased or reduced) in accordance with the system.

When a series of input data are inputted to the input terminal i, the operation starts. First, the waveform of the series of received data is examined in the state estimation circuit 3. For example, when the channel state is so bad that the waveform is distorted, sometimes, there is a case where sign-change points have jitters as shown in Fig. 4, and the -9data of sample points 1, 4, 5 and 8 are reverse data. In such a case, the data of these sample points are not used for taking a correlation with the reference, and only the data of sample points 2, 3, 6 and 7 are used.

Therefore, when it is formed that jitters in change points of the waveform are large as a result of examination, the state estimation circuit 3 supplies the correlator 4 with waveform information to tell that the data of the sample numbers 1, 4, 5 and 8 are not used for taking a correlation (Step S101). Responding to this, the correlator 4 corrects the sample points on the basis of the waveform informaiton supplied from the state estimation circuit 3 (Step S 102).

1o On the other hand, the clock recovery circuit 2 generates a recovered clock by use of the series of Manchester-coded received data (Step S103). The correlator 4 samples a plurality of points in each symbol by use of the recovered clock outputted from the clock recovery circuit 2 (Step S104), obtains a correlation value between the series of received data and the reference, and outputs demodulated data (Step S105). If the input of the series of received data disappears and the demodulation is completed, the operation is ended.

As described above, in the demodulator a reception state such as wavefon distortion or the like is estimated by use of the waveform of the series of received data.

*oo While sample points are corrected on the basis of the state, a correlation value between 20 the series of received data and the reference is obtained from a plurality of sample points .per symbol, and demodulation is performed on the basis of the correlation value. In such *a manner, it is possible to perform demodulation at a lower bit error rate when there is noise or interference, when the received waveform is distorted by intersymbol "interference or by detector characteristic, or when the duty ratio is deteriorated.

R:\LI BOO]5190.doc:gram Although in the foregoing, description has been made about the case where sample points are corrected in accordance with the reception sate when the channel state is so bad that the waveform is distorted, the form of the reference of the correlator may be corrected and used on the basis of the waveform information when fixed distortion of the waveform can be estimated by the state estimation circuit.

For example, when the duty ratio between and is not 50% because of the characteristic of the detector, the duty ratio is obtained in the state estimation circuit, and waveform information is supplied to the correlator. In the correlator, the reference is corrected on the basis of the waveform information. Further, sample data used for correlation is left as it is, and the reference is weighted.

Although in the foregoing description has been made about the demodulator for a series of Manchester-coded received data, the described system is applicable to any coding so long as each symbol is expressed by a plurality of bits on a time base. For example, the described system is easily applicable to a demodulator for a series of received data coded by FM (Frequency Modulation) coding, MFM (Modified FM) coding, or the like.

For example, a series of FM-coded received data become "1 1" or "00" when "0" is transmitted as an NRZ signal, while when is transmitted, the data become "10" or Therefore, in the correlator, a reference of "11" or "00" is prepared as the reference for or a reference of "10" or "01" is prepared as the reference for For example, when the reference for is prepared, a reference of "11" or "00" is prepared. For demodulation, a correlation is taken between the series of received data and the reference, and a correlation value is obtained. Further, the absolute value of the obtained correlation value is obtained. When the absolute value is close to is 9 [R:\L1BOO]5190.doc:gmm -11 outputted as demodulated data. while when thi absolute value is close to is outputted as demodulated data. In such a manner, modulation can be preformed easily by changing the form of the prepared reference in accordance with coding.

Second Demodulator Configuration Fig. 6 is a block diagram showing another configuration of a demodulator. Fig.

7 is a schematic diagram showing the operation principle of the demodulator shown in Fig. 6. Fig. 8 is an output characteristic diagram showing an output example of a correlator. Fig. 9 is a flow chart showing the operation of the demodulator shown in Fig.

6.

In Fig. 6, reference numeral 6 represents a correlator for obtaining correlation values between a series of received data and a plurality of references different in phase, and outputting the plurality of correlation values corresponding to the references; 7, a timing estimation circuit for detecting a maximum correlation value of the plurality of correlation values supplied from the correlator 6, and outputting the phase number of the 1i maximum correlation value as phase informaiton; and 8, a decimation circuit fobr decimating data from the series of received data by use of the phase information supplied from the timing estimation circuit 7, and outputting the decimated data as demodulated data. An input terminal 1 and an output terminal 5 are the same as those described in the ,o **first configuration.

20 First, the operation principle will be described with reference to Figs. 6 to 9.

Although correlations between a series of received data and references are obtained in the correlator 6 in the same manner as in the above first demodulator configuration, a plurality of references different in the initial phases are used as the references of the correlator 6 in this second demodulator configuration.

Assume that the number of samples per symbol is 8 and correlation values are within a range of -1 to 1 in order to simplify the description. However, the number of samples and the range of the correlation values may be set desirably (increased or reduced) in accordance with the system.

In the case of such a demodulator, 8 references SR:\LI BOO]5190.doc:gmm 12different in phase are prepared as shown in Fig. 7. In the example of Fig. 7, references for in Manchester code) are shown as an NRZ signal.

When a series of input data are inputted to the input terminal i, the operation starts. Correlations between the series of received data and 8 references different in the initial phases as shown in Fig. 7 are obtained in the correlator 6 (Step S107). Fig. 8 shows an output example of correlation values, for example, when all the series of received data are Fig. 8 shows correlation values between the series of received data and the references for "1.

When these 8 correlation values are compared, the correlation value becomes maximum when the phase of the reference is synchronous with the phase of the symbol, as shown 15 in Fig. 8. Therefore, a correlation value taking a maximum value is obtained from the 8 correlation values in the timing estimation circuit 7 (Step S108), and the phase number of the reference making the correlation value maximum is supplied to the decimation circuit 8 as phase information (Step S109).

20 In the decimation circuit 8, data corresponding to an optimum phase are decimated from the series of received data on the basis of the phase information supplied from the timing estimation circuit 7, and then outputted as demodulated data (Step S110). When the input of the series of received data disappears and the demodulation is completed, the operation is ended.

13 As described above, in the second demodulator configuration, by use of a correlator, correlations between a series of received data and a plurality of references different in the initial phases are obtained, and an optimum data decision point of the series of received data is obtained. Accordingly, it is possible to perform modulation at a s lower bit error rate.

Although the phase of a reference making a correlation value maximum is supplied as phase information to the decimation circuit 8 connected to the succeeding stage in the timing estimation circuit 7 in this second demodulator configuration the phase of a reference making a correlation value minimum may be regarded as a changing point of a symbol and supplied as phase information.

Although description has been made, about the case where a plurality of references different in the initial phases are used, the phase of a series of received data may be changed gradually, while one reference is used, so as to obtain a plurality of correlation values.

Although description has been made about the demodulator for a series of Manchester-coded received data, any coding may be adopted so long as each symbol is expressed by a plurality of bits on a time base. In the same manner as in the first demodulator configuration, for example, this second configuration is easily applicable to a demodulator for a series of received data coded by FM coding, MFM coding, or the like.

Third Demodulator Configuration "Although a reference for or is used as reference of a correlator in the above second configuration, this reference may be subjected to adaptive processing in accordance with the state of a series of received data in the same manner as in the above first configuration. In such a case, a state estimation circuit is added in the same manner as in the above first demodulator configuration.

The operation will be described. First, the state estimation circuit estimates a reception state such as waveform distortion or the like from a series of received data, and outputs waveform information based on the result of the estimation. The correlator corrects the form of references or sample points on the basis of the waveform information supplied from the state estimation circuit. Then, as described in the above second demodulator configuration, correlations between the series of received data and the references are obtained, and an optimum data decision point of the series of received data is obtained to perform demodulation.

R:\LIBOO]5190.doc:gm 14- As described above, in the demodulator in this third configuration, a reception state such as waveform distortion or the like is estimated by use of the waveform of a series of received data, and sample points or references of the correlator are corrected on the basis of the state. Accordingly, it is possible to perform modulation at a lower bit error rate even if the received waveform is distorted by intersymbol interference or detector characteristics.

Further, in the same manner as in the above second configuration, any coding may be adopted so long as each symbol is expressed by a plurality of bits on a time base.

For example, this third configuration is easily applicable to a demodulator for a series of received data coded by FM coding, MFM coding, or the like, as well as a series of Manchester-coded received data.

Fourth Configuration Although description has been made, in the above second configuration, about a demodulator in which an optimum data decision point is obtained from a series of received data by use of a correlator so as to demodulate Manchester-coded signals, a clock recovery circuit may be constituted by use of only a function for obtaining an optimum data decision point.

That is, the clock recovery circuit in this fourth configuration is contituted by a correlator for gradually changing the phase of a series of Manchester-coded received data 20 or a reference to thereby obtain a plurality of correlation values between the series of received data and the reference in accordance with the change of the phase; and a timing estimation circuit for detecting an optimum phase of the basis of the plurality of correlation values, and producing a recovered clock.

S* The correlator changes the phase of the series of received data or the reference gradually to thereby obtain a plurality of correlation values between the series of received data and the reference in accordance with the change of the phase. The timing estimation circuit detects an optimum phase on the basis of the plurality of correlation values to thereby generate an optimum recovered clock.

As described above, the clock recovery circuit in this fourth configuration obtains correlations between a series of received data and a reference while changing the phase of the series of received data or the reference gradually, detects an optimum phase on the basis of a plurality of correlation values, and generates an optimum recovered clock. Accordingly, it is possible to generate a more precise recovered clock.

Further, for example, when this clock recovery circuit is applied to a demodulator as shown in the above fist configuration, a more precise recovered clock can R:\LI B005190.doc:gmm be generated, so that it is possible to perform demodulation at a furth3r lower bit error rate.

Further, when a correlator is used in common, it is possible to improve the hardware efficiency.

Further, in the same manner as in the above second configuration, any coding may be adopted so long as each symbol is expressed by a plurality of bits on a time base.

For example, this fourth configuration is easily applicable to a demodulator for a series of received data coded by FM coding, MFM coding, or the like, as well as a series of Manchester-coded received data.

io As described above, in the demodulator a reference and/or sample points are corrected on the basis of waveforml information based on a recovered clock and the result of estimation of a reception state such as waveform distortion or the like, and a correlation value between a series of received data and the reference is obtained from a plurality of sample points. Demodulated data is then outputted on the basis of the is correlation value so as to be demodulated. Accordingly, it is possible to perform demodulation at a lower bit error rate when there is noise or interference, when a reception waveform is distorted by intersymbol interference or detector characteristic, or when the duty ratio of deteriorated.

o ~Further, in the demodulator, correlations between a series of received data and a 20 reference are obtained while the phase of the series of received data or the reference is changed gradually, a phase to be used for data decision is obtained on the basis of a plurality of correlation values, and the phase is used for demodulation at a lower bit error rate. Accordingly, it is possible to perform demodulation at a lower bit error rate.

S• Further, in the demodulator, correlations between a series of received data and a plurality of references different in the initial phases are obtained, a phase to be used for data decision is obtained on the basis of the plurality of correlation values corresponding 9 to the plurality of references, and the phase is used for demodulation. Accordingly, it is 9 possible to perform demodulation at a lower bit error rate.

Further, in the demodulator, correlations between a reference having a no 30 predetermined phase and a series of received data the phase of which is changed gradually are obtained, a phase to be used for data decision is obtained on the basis of the plurality of correlation values in accordance with the change of the phase of the series of received data, and the phase is used for demodulation. Accordingly, it is possible to perform demodulation at a lower bit error rate.

[R:\LIB00OO]I 5190.doc:gmm -16- Further, in the demodulator, a reception state such as waveform distortion or the like is estimated from a series of received data, and a reference and/or sample points are corrected on the basis of waveform information based on the result of the estimation.

Accordingly, it is possible to perform demodulation at a lower bit error rate even if a received waveformn is distorted by intersymbol interference or detector characteristics.

Further, in the clock recovery circuit according to an aspect of the invention, correlations between a series of received data and a reference are obtained while the phase of the series of received data or the reference is changed gradually, and a recovered clock is generated on the basis of a plurality of correlation values. Accordingly, it is 1o possible to generate a more precise recovered clock. Further, when the clock recovery circuit is applied to a demodulator, it is possible to perform demodulation at a lower bit error rate.

Further, in the clock recovery circuit according to a preferred aspect of the invention, correlations between a series of received data and a plurality of references is different in the initial phases are obtained, and a recovered clock is generated on the basis of a plurality of correlation values in accordance with the plurality of references.

Accordingly, it is possible to generate a more precise recovered clock. Further, when the clock recovery circuit is applied to a demodulator, it is possible to perform demodulation at a lower bit error rate.

,o 20 Further, in the clock recovery circuit according to a preferred aspect of the a"i invention, correlations between a reference having a predetermined phase and a series of received data the phase of which is changed gradually are obtained, and a recovered clock is generated on the basis of a plurality of correlation values in accordance with the change S* of the phase of the series of received data. Accordingly, it is possible to generate a more precise recovered clock. Further, when the clock recovery circuit is applied to a demodulator, it is possible to perform demoduclation at a lower bit error rate.

Further, in the demodulation method a reference and/or sample points are corrected on the basis of waveform information based on a recovered clock and the result S°of estimation of a reception state such as waveform distortion or the like, and a .30 correlation value between a series of received data and the reference is obtained from a plurality of sample points. Demodulated data is then outputted on the basis of the correlation value so as to be demodulated. Accordingly, it is possible to perform demodulation at a lower bit error rate when there is noise or interference, when a reception waveform is distorted by intersymbol interference or detector characteristic, or when the duty ratio is deteriorated.

I R:\LIU BOO 15190.doc:gmm 17- Further, in the demodulation method, correlations between a series of received data and a reference are obtained while the phase of the series of received data or the reference is changed gradually, and a phase to be used for data decision is obtained and used for performing demodulation on the basis of a plurality of correlation values.

Accordingly, it is possible to perform demodulation at a lower bit error rate.

Further, in the demodulation method, a reception state such as waveform distortion or the like is estimated from a series of received data, and a reference and/or sample points are corrected on the basis of waveform information based on the result of the estimation. Accordingly, it is possible to perform demodulation at a lower bit error 0o rate even in the case where a received waveform is distorted by intersymbol interference or detector characteristics.

Further, in the clock recovery method according to an aspect of the invention, correlations between a series of received data and a reference are obtained while the phase of the series of received data or the reference is changed gradually, and a recovered clock is generated on the basis of a plurality of correlation values. Accordingly, it is possible to generate a more precise recovered clock. Further, when this method is applied to a demodulator, it is possible to perform demodulation at a lower bit error rate.

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Claims (5)

1. A clock recovery circuit for recovering a clock from a series of received data which is coded so that each symbol is expressed by a plurality of bits on a time base, said clock recovery circuit comprising: a correlator for changing the phase of said series of received data or a reference gradually to thereby obtain a correlation between said series of received data and said reference, and outputting a plurality of correlation values, whereby a recovered clock is obtained on the basis of said plurality of correlation values.

2. A clock recovery circuit according to claim 1, wherein said correlator obtains correlations between said series of received data and a plurality of references the intial phases of which are different from one another, and outputs a plurality of correlation values corresponding to said plurality of references.

3. A clock recovery circuit according to claim 1, wherein said correlator obtains correlations between a reference having a predetermined phase and said series of received data the phase of which is changed gradually, and outputs a plurality of correlation values OO oo"in accordance with the change of the phase of said series of received data. SOSO o 0o0O *se 0@SO ooo

4. A clock recovery method for recovering a clock from a series of received data 0 o° *which is coded so that each symbol is expressed by a plurality of bits on a time base, said method comprising the steps of: as a correlation step, changing the phase of said series of received data or a $#mo 00025 reference gradually to obtain correlations between said series of received data and said reference to thereby output a plurality of correlation values, whereby a recovered clock is obtained on the basis of said plurality of correlation values.

5. A clock recovery circuit substantially as described herein with reference to Figs. oo 0030 1-9 of the drawings. DATED this Twenty-fifth Day of October, 2001 Mitsubishi Denki Kabushiki Kaisha Patent Attorneys for the Applicant SPRUSON FERGUSON [R:\LIBOO]51I90.doc:gam