CO2020001202A2 - Sistema de control de frecuencia de reloj - Google Patents
Sistema de control de frecuencia de relojInfo
- Publication number
- CO2020001202A2 CO2020001202A2 CONC2020/0001202A CO2020001202A CO2020001202A2 CO 2020001202 A2 CO2020001202 A2 CO 2020001202A2 CO 2020001202 A CO2020001202 A CO 2020001202A CO 2020001202 A2 CO2020001202 A2 CO 2020001202A2
- Authority
- CO
- Colombia
- Prior art keywords
- frequency
- range
- clock signal
- internal clock
- control system
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2657—Carrier synchronisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2668—Details of algorithms
- H04L27/2673—Details of algorithms characterised by synchronisation parameters
- H04L27/2675—Pilot or known symbols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/06—Speed or phase control by synchronisation signals the synchronisation signals differing from the information signals in amplitude, polarity or frequency or length
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Control Of Electric Motors In General (AREA)
Abstract
La frecuencia de una señal de reloj se compara con un rango predeterminado. Si la frecuencia medida está fuera del rango, un controlador del sistema determina si un estado operativo actual del sistema general permite que el reloj interno se vuelva a ajustar en conformidad. Si el controlador determina que el estado actual del sistema permite el cambio, entonces una señal de control a la fuente de señal de reloj interno se cambia por el incremento más pequeño disponible, ya sea para aumentar o disminuir la frecuencia. Si la señal del reloj interno está fuera del rango deseado y el controlador del sistema no decide modificar la frecuencia, el controlador puede aumentar el tamaño del rango disminuyendo el límite inferior y/o aumentando el límite superior.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/647,993 US10305492B2 (en) | 2017-07-12 | 2017-07-12 | Clock frequency control system |
| PCT/US2018/017054 WO2019013840A1 (en) | 2017-07-12 | 2018-02-06 | CLOCK FREQUENCY CONTROL SYSTEM |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CO2020001202A2 true CO2020001202A2 (es) | 2020-02-18 |
Family
ID=61249725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CONC2020/0001202A CO2020001202A2 (es) | 2017-07-12 | 2020-02-03 | Sistema de control de frecuencia de reloj |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US10305492B2 (es) |
| EP (1) | EP3652607B1 (es) |
| JP (1) | JP6778352B2 (es) |
| KR (1) | KR102192406B1 (es) |
| AU (1) | AU2018301224B2 (es) |
| BR (1) | BR112019023748B1 (es) |
| CA (1) | CA3064203C (es) |
| CO (1) | CO2020001202A2 (es) |
| WO (1) | WO2019013840A1 (es) |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3956768B2 (ja) * | 2002-05-14 | 2007-08-08 | ソニー株式会社 | クロック発生回路 |
| KR100682279B1 (ko) | 2005-07-14 | 2007-02-15 | (주)에프씨아이 | 주파수 합성기의 적응 주파수 조정장치 |
| US7764126B2 (en) | 2007-06-25 | 2010-07-27 | Sanyo Electric Co., Ltd. | Clock generation circuit and clock generation control circuit |
| JP5111057B2 (ja) * | 2007-10-31 | 2012-12-26 | ルネサスエレクトロニクス株式会社 | 制御装置 |
| US8073092B2 (en) * | 2008-06-19 | 2011-12-06 | Microchip Technology Incorporated | Automatic synchronization of an internal oscillator to an external frequency reference |
| US8446223B2 (en) | 2009-05-22 | 2013-05-21 | CSR Technology, Inc. | Systems and methods for calibrating real time clock |
| CN102195646A (zh) | 2010-03-18 | 2011-09-21 | 上海华虹Nec电子有限公司 | 时钟振荡器自动校准方法及电路 |
| US8564374B2 (en) * | 2011-10-03 | 2013-10-22 | Himax Technologies Limited | Oscillator calibration apparatus and oscillator calibration method |
| CN102436174A (zh) | 2011-10-26 | 2012-05-02 | 东莞市泰斗微电子科技有限公司 | 一种守时设备晶振频率驯服方法及相应装置 |
| JP2013196619A (ja) * | 2012-03-22 | 2013-09-30 | Fujitsu Ltd | 半導体装置及び半導体装置の制御方法 |
| US9563226B2 (en) | 2013-09-13 | 2017-02-07 | Marvell World Trade Ltd. | Dynamic clock regulation based on duty cycle thresholds |
-
2017
- 2017-07-12 US US15/647,993 patent/US10305492B2/en active Active
-
2018
- 2018-02-06 WO PCT/US2018/017054 patent/WO2019013840A1/en not_active Ceased
- 2018-02-06 AU AU2018301224A patent/AU2018301224B2/en active Active
- 2018-02-06 CA CA3064203A patent/CA3064203C/en active Active
- 2018-02-06 EP EP18706356.5A patent/EP3652607B1/en active Active
- 2018-02-06 KR KR1020197035940A patent/KR102192406B1/ko active Active
- 2018-02-06 JP JP2020501226A patent/JP6778352B2/ja active Active
- 2018-02-06 BR BR112019023748-8A patent/BR112019023748B1/pt active IP Right Grant
-
2020
- 2020-02-03 CO CONC2020/0001202A patent/CO2020001202A2/es unknown
Also Published As
| Publication number | Publication date |
|---|---|
| JP6778352B2 (ja) | 2020-10-28 |
| KR20200005590A (ko) | 2020-01-15 |
| KR102192406B1 (ko) | 2020-12-17 |
| JP2020526985A (ja) | 2020-08-31 |
| US10305492B2 (en) | 2019-05-28 |
| BR112019023748B1 (pt) | 2020-10-27 |
| BR112019023748A2 (pt) | 2020-05-26 |
| CA3064203A1 (en) | 2019-01-17 |
| EP3652607B1 (en) | 2021-04-21 |
| US20190020347A1 (en) | 2019-01-17 |
| AU2018301224B2 (en) | 2019-12-12 |
| CA3064203C (en) | 2020-11-17 |
| AU2018301224A1 (en) | 2019-11-07 |
| WO2019013840A1 (en) | 2019-01-17 |
| EP3652607A1 (en) | 2020-05-20 |
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