DE1774158B2 - Device for storing and finding information - Google Patents

Description

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The I rlmdung relates to a device for storing and finding information in sequentially operating memories according to the Aufsuchprin / ip, with a register for the search address and with a comparison and output device that determines the storage location of the address information that corresponds to the search address in the memory and the outputs stored associated information.

From the technology of digital information storage Both motorized and static memories are known, in which the search for the desired Information not based on a location, but au! Reason of a certain meaning he follows. In the case of motorized storage systems, one speaks here of being familiar with coordination on the one hand and of On the other hand, I found out. The query takes place there generally serially. Associative memories are also known from the prior art. They work in a similar way to the described index process, however, the query takes place in parallel. The associative memories are related to their Ansieuerelckirunik relatively complex. If the total amount of information available is very large and w / .rd if only a relatively small part of the total information is constantly required, then the use of an associative or content-addressed memory uneconomical. With the invention an economical one Solution given for the mentioned problem.

The invention is characterized in that at least two memories are provided, the the first memory contains frequently used and the second memory contains information that is used less frequently, that the memories are assigned two registers connected via a gate circuit, the interrogation the search address first in the register of the first memory and only after an unsuccessful search in the first Memory is written into the register of the second memory via the gate circuit that the second memory at each address contains additional memory locations in which the number of queries the respective address is stored that further gate circuits the second memory with connect to the first memory, via which when a certain value is exceeded in the additional Stores the address information and the associated information from the second memory in the first memory is transferred, and in the first memory with a successful query the Corresponding address information and the associated information with the preceding one in the search direction Address information and the associated information is swapped.

The invention will now be based on the block diagram for example explained.

The data pairs to be processed consist of address and information (e.g. customer name and address or customer name and account number) and are stored individually in the memory cells a first or main memory, V / 5 is stored. It it is assumed that this is a ferrite core matrix, each row of which represents a memory cell. Each memory cell contains a data pair consisting of an address and information. In this first memory are the data pairs that are often required by the processing device.

A further memory VS is also provided, in whose memory cells the data pairs that are less used than the data pairs in the main memory are located. Each memory cell of this second memory has an additional section E, which will be explained later.

If the information on a specific address is required, the address is entered in the register ST 1 of the first memory. The addresses of all memory cells in the memory MS are then compared with the address in the register ST 1 by means of a comparison device ACi , until the address sought is found. Thereafter, a signal from the comparison device ACl opens gate circuits labeled Gl. This has the effect that the desired information is output to the associated processing device. It is read either non-destructively or destructively with rewriting.

If the address sought is not found after a complete search of the memory MS , the comparison device AC1 outputs a non-agreement signal. which opens the gates G 2, whereby the search address, which is located in the register STi, is sent to a second register 5Γ2

is passed on. The search address now in register ST 2 is then compared with all addresses in the second memory VS , and if the comparison device determines that the address sought is not there either, it generates a signal on line OP which informs the operator that an address is searched for which is neither in MS nor in VS.

The address in register ST 2 is made visible to the operator by means of a display device. The operator then looks for the associated information in a list and keys it in. The information is output to the processing device and stored in the memory FS. The new data pair is stored in the first cell of the memory VS. This means that all data pairs are shifted down one place and that the last pair is deleted. Instead of moving all data pairs, you can also replace the oldest data pair with the new one. Every time a data pair is used, it is recorded in the section £ of each memory cell that the relevant pair has been used.

Each time the information in the memory VS i $ is read, it is then rewritten, the number in section E, which indicates the number of calls, being increased by one at the same time. With each read operation the content of the section £ is checked by the device G, and if this determines that a certain value of the number of use has been exceeded in a given time unit, then it causes the gates G 4 and G 5 to be opened so that the data pair is transferred to the main memory MS .

If the number of use is 2, for example, then the section £ of the memory cells and the device M can be omitted, since the mere fact that the search address is in VS indicates that this address has been called up twice. In this case, the gate circuits G 4, G 5 open for the transmission of the data pair from VS to MS simultaneously with the output of the information which is effected by the comparison device AC2 . In this case, as in the first-mentioned case, a check can also be provided by the operator, for example to determine whether the information associated with the address is correct.

Eiii data pair that comes from FS to MS is entered in the main memory MS at a specific point. All data pairs that are behind this position in the search order are shifted one position downwards, whereby the lowest pair is lost. In order to optimally design the search process in the memory MS , that is to say to accelerate it, each time a data pair is used, this is exchanged with the data pair preceding it in the search sequence. As a result, the frequently used pairs move to the beginning and the less used pairs to the end of the search order. The search always starts at the beginning, and the more often an address is used, the faster it will be found.

The arrangement according to the invention can also be designed for bidirectional operation. The operation in one direction has already been described. When operating in the other direction, the information is known, and the associated address is searched for, with the designations address and information would have to be swapped.

1 sheet of drawings

Claims (1)

i 774 Claim: Device for storing and finding information in memories working sequentially according to the search principle, with a register for the search address and with a comparison and output device which determines the storage location of the address information corresponding to the search address in the memory and outputs the stored associated information, characterized in that that at least two memories (MS, VS) are provided, the first memory (MS) containing frequently used and the second memory (VS) less frequently used information, that the memories, two registers connected via a gate circuit (G 2) ( ST I ₃ 57 2) are assigned, whereby when querying the search address first in the register (STl) of the first memory (MS) and only after an unsuccessful search in the first memory (MS) via the gate circuit (G 2) in the register (STl ) of the second memory (VS) is written so that the second memory (VS) has additional memory locations (E) for each address. contains, in which the number of queries of the respective address is stored, that further gate circuits (G 4, G 5 ) connect the second memory (VS) to the first memory (MS) , via which when a certain value is exceeded in the additional memory locations (E) the address information and the associated information is transferred from the second memory (VS) to the first memory (MS) , and in the first memory (MS), if the query is successful, the corresponding address information and the associated information with the preceding one in the search direction Address information and the associated information is swapped. 40