DE2064730B2 - Circuit for reducing the power consumption of a switching transistor operated in a horizontal deflection circuit in the inversion region - Google Patents

Description

The invention relates to a circuit for reducing the power consumption of a device in the inverse region working horizontal deflection transistor and in particular to a circuit for generating Linear horizontal deflection currents for televisions using either one Current directions permeable switching transistor for low-voltage operation as an output stage in which the switching transistor a capacitor is connected in parallel, in which the deflection energy during the return stored and from which it is taken again during the outward run.

Application P 2 01 064.1 specifies a circuit of the type described above, its main feature consists in the fact that the base of the switching transistor is impressed with a current which at the beginning of the Return a current peak in the reverse direction of about the same amplitude as the collector at the end of the run-out and is of a microsecond or less duration, which is also in the the remaining duration of the return the amplitude 0 and at the beginning of the trace a current peak in the forward direction has, which is approximately as large as the inversion current of the collector at the beginning of the Towards, and in the further course of the same quickly decays down to a residual current, which to full Modulation of the saturation characteristic is sufficient. With this circuit, the advantage is achieved that even without Using the known switch diode, a sufficient current to terminate the return and Initiation of the outward run is drawn, the amount of which can even be greater than that of the rest of the current taken over by the diode. However, this assumes that the control pulse is sufficiently large and the control stage is sufficiently powerful. When the control pulse at the base of the pre-transistor and the DC operating voltage of the same are sufficiently large, the reverse current peak is accordingly increased and at the same time shortened, since the base charge of the final transistor to be cleared is constant. At the same time, the current peaks making the final transistor conductive at the beginning of the trace also become increased so that the dwell time of the final transistor in the breakdown region is shortened. The one in the inverse area working end transistor then works mainly on the saturation characteristic and also generates an on Beginning of the outward run practically kink-free, d. H. continuous deflection current.

The increase in the control current at the base at the beginning of the return and at the beginning of the forward are

However, limits are set by the fact that the transformer used to control the output transistor is in the saturation range and that a to protect the ÄC-Olied serving pre-transistor not unlimited can be reduced in size. These limitations mean that the theoretical load capacity of the End transistor cannot be fully utilized.

This disadvantage is overcome in a circuit for reducing the power consumption of a too Beginning of the trailing end transistor of a horizontal deflection stage operated in the inverse region, in which the Base of the transistor at the beginning of the retrace with a transistor blocking and at the beginning of the trace with a current peak that makes the transistor conductive by a current peak controlled into the saturation region Transformer is controlled directly if according to the invention parallel to the primary or Secondary coil of the transformer is a biased diode with such polarity that it is placed during of the return flow is permeable to rom. The diode used is preferably so slow or connected in series of an ÄC-member made so sluggish that they during the Training of the clearing needle at the beginning of the return is ineffective.

Further details of the invention are given with reference to FIGS. 1 to 4 explained in more detail, of which

F i g. 1 current-voltage diagrams at the base and collector of the final transistor,

F i g. 2 an embodiment of the circuit according to the invention,

3 shows a current-voltage diagram on the primary coil the control transformer and

4 show current-voltage diagrams of the output transistor with and without the circuit measure according to the invention.

Like the high power consumption

10 Γ ".,

"= 64 J '*"< ^d '
ο

of the transistor arises at the beginning of the return flow, goes from the diagrams of FIG. 1, in which the base current / »the collector current ίκ, the collector voltage t / c and the collector current voltage product

η = ι'κ- Uc

are represented as functions of i.

The circuit that makes up the diagrams ie = f (t). ik = f (t) and Uc = φ (t) is in

bo F i g. 2 shown. / » Ι'κ and Uc are shown as arrows. 1 is the final transistor; The return capacitor 2 is parallel to this, and the deflection coils 4 are connected in parallel to this via a capacitor 3. The direct current from the voltage

e> 5 source U \ is fed to the output transistor via a choke 5, which also z. B. can be the primary winding of a high voltage transformer. The output transistor 1 is generated directly from the control transformer

gate 6 controlled, and this is in the current path of the control stage with the control transistor 7. The current path of the control stage closes via the capacitor 8, and this is charged during the trace via the diode 9 from the voltage source Ui 5. This stage is controlled via an RC circuit 10 with a negative pulse (with a pnp transistor). By increasing this impulse, for example by increasing the voltage - Ui , the clearing needle ie = F (O in FIG Transformer core and a limit set by the /? C element 10 This can be seen from Fig. 3, in which, in addition to the control voltage Ub, the voltage at the primary coil of the control transformer U, the current i through the primary coil and the base current / ' s of the output stage are shown.

The following processes take place in the control circuit of the final transistor:

After the basic charge has been cleared at time 1 1, the secondary load on the transformer ceases to apply. Nevertheless, the primary current i increases because the transformer is magnetically charged. At time f 2 the core reaches its magnetic saturation. This has the consequence that the voltage U can rise from zero to a value which exceeds the operating voltage of the preliminary stage Ui , which in turn has the effect that the base current already shows a current-unlocking cap and an emitter-collector current of the end transistor in the return flow '.ors causes. But since the voltage peak Uc (Fig. 1) between collector and emitter has not yet subsided during this time, which is shown even more clearly in Fig.4, this current flow has a considerable power consumption η = h U _{c of} the transistor 1, which in turn causes a temperature increase that endangers the transistor. According to the invention, this disadvantageous phenomenon is suppressed in that the control transformer is connected in parallel on the primary or secondary side with a diode 11 (FIG. 2) with such a polarity that it is current-permeable during the return. It is expediently so slow that it is not effective during the time fl, so that the clearing needle can develop to a maximum. This biased diode has the effect that the pulse voltage u = F (t) cannot fall below the value Ut-Uv , as is indicated in FIG. 3 by the dotted line. Therefore, the switching transistor cannot become current-permeable at the end of the return, and the second power peak, which is indicated in FIG. 4, does not occur. The required inertia can be set by connecting an ÄC circuit 12 upstream. The circuit is also significantly less critical with respect to the position of the trailing edge of the drive pulse Ubi of the transistor 7, that is to say more stable. The resistance of the ftC member 10 in FIG. 2 need not be made extremely small by this measure and thus retains its protective effect on transistor 7.

1 sheet of drawings

Claims (3)

Patent claims: 1. Circuit to reduce the power consumption at the beginning of the outward run in the inverse area working end transistor of the H-deflection stage, in which the base of the transistor at the beginning of the Return with one blocking the transistor and at the beginning of the forward with one the transistor current-permeable current peak from a transformer controlled in the saturation area is controlled directly, characterized in that parallel to the primary or Secondary coil of the transformer (6) has a diode (11) with such polarity that it is during the The return flow is permeable to current. 2. Circuit according to claim 1, characterized in that the diode used is so slow that it "is ineffective during the training of the clearing needle. 3. A circuit according to claim 2, characterized in that the diode (Ii) is an ÄC circuit (12) is upstream