DE2838982B2 - Method of manufacturing multilevel printed circuit boards - Google Patents
Method of manufacturing multilevel printed circuit boardsInfo
- Publication number
- DE2838982B2 DE2838982B2 DE19782838982 DE2838982A DE2838982B2 DE 2838982 B2 DE2838982 B2 DE 2838982B2 DE 19782838982 DE19782838982 DE 19782838982 DE 2838982 A DE2838982 A DE 2838982A DE 2838982 B2 DE2838982 B2 DE 2838982B2
- Authority
- DE
- Germany
- Prior art keywords
- conductor
- conductor tracks
- levels
- circuit boards
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 239000004020 conductor Substances 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 7
- 239000000654 additive Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 2
- 239000000843 powder Substances 0.000 claims description 2
- 238000005266 casting Methods 0.000 claims 1
- 238000007598 dipping method Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 238000000454 electroless metal deposition Methods 0.000 description 3
- 239000005011 phenolic resin Substances 0.000 description 3
- 229920001568 phenolic resin Polymers 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000002318 adhesion promoter Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000010306 acid treatment Methods 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000002313 adhesive film Substances 0.000 description 1
- JZULKTSSLJNBQJ-UHFFFAOYSA-N chromium;sulfuric acid Chemical compound [Cr].OS(O)(=O)=O JZULKTSSLJNBQJ-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0133—Elastomeric or compliant polymer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
Verfahren zum Herstellen von Mehrebenen-Leiterplatten mit zwei oder mehr Leiterbahnebenen und Verbindungen zwischen Leiterbahnen veischiedener Leiterbahnebenen, bei welchem zunächst auf der Oberfläche eines Basismaterials die Leiterbahnen der ersten bzw. ersten beiden Ebenen erzeugt werden, sodann die mit Leiterbahnen versehene(n) Ebene(n) mit einer Isolierschicht abgedeckt und anschließend die dem gewünschten Leiterbahnmuster der nächsten Ebene entsprechenden Leiterzüge hergestellt werden, wobei Leiterzüge und Verbindungen zwischen Leiterzügen gleichzeitig erzeugt werden.Process for the production of multilevel printed circuit boards with two or more conductor track levels and Connections between conductor tracks of different conductor track levels, in which initially on the Surface of a base material the conductor tracks of the first or first two levels are generated, then the level (s) provided with conductor tracks with covered with an insulating layer and then the desired conductor track pattern of the next level corresponding conductor tracks are produced, with conductor tracks and connections between conductor tracks are generated at the same time.
Bei dem bekannten Verfahren zum Herstellen von Mehrebenen-Leiterplatten wird von einem nicht metallisierten Basismaterial ausgegangen, das an den für die Verbindung zwischen den Leiterbahnen verschiedener Leiterbahnebenen vorgesehenen Stellen gelocht ist. Danach werden durch eine stromlose Metallabscheidung die Leiterbahnen der beiden ersten Ebenen erzeugt, wobei gleichzeitig die Lochwandungen metallisiert und dadurch die Verbindungen /wischen den Leiterbahnen verschiedener Leiterbahnebenen hergestellt werden. Danach wird die derart erzeugte Leiterplatte mit einer Isolierschicht überzogen, wobei jedoch die Durchverbindungssiellen freigelassen werden. Auf dieser Isolierschicht werden anschließend ausschließlich durch stromlose Metallabscheidung Leiterbahnen der nächsten Leiterbahnebenen erzeugt.In the known method for the production of multilevel printed circuit boards is from a non-metallized Base material assumed that the different for the connection between the conductor tracks Conductor levels provided places is perforated. After that, electroless metal deposition is used the conductor tracks of the first two levels are generated, with the hole walls being metallized at the same time and thereby the connections / between the conductor tracks of different conductor track levels made will. The printed circuit board produced in this way is then covered with an insulating layer, with however, the through-connection siamese will be released. This insulating layer is then deposited exclusively by electroless metal deposition Conductor tracks of the next conductor track levels are generated.
Bei einem anderen Ausführungsbeispiel des bekannten Verfahrens sind als Verbindung /wischen den Leiterbahnen verschiedener Leiterbahnebenen keine Lochungcn vorgesehen, sondern lediglich Kontaktflächen, die beim Aufbringen der Isolierschicht freigelassen werden.In another exemplary embodiment of the known method, the connection / wipe is used Conductor tracks of different conductor track levels no perforations provided, only contact areas, which are left free when the insulating layer is applied.
Das bekannte Verfahren zur Herstellung von Mehrebenen-Leiterplatten ist noch zu aufwendig, als daß Mehrebenen-Leiterplatten — wie an sich erwünscht — in noch stärkerem Maße für viele Zwecke eingesetzt würden. Dies ist in erster Linie darauf zurückzuführen, daß das Herstellen der Leiterbahnen durch stromlose Metallabscheidung vergleichsweise teuer ist.The known method for the production of multilevel printed circuit boards is still too expensive than that multilevel printed circuit boards - as desired per se - are used to an even greater extent for many purposes would. This is primarily due to the fact that the production of the conductor tracks by currentless Metal deposition is comparatively expensive.
Außerdem weisen auch die durch stromlose Metallabscheidung hergestellten Durchverbindungen zwischen den Leiterbahnen verschiedener Leiterbahnebenen eine geringe Zuverlässigkeit, insbesondere unter Wärmebelastung, auf, weil stromlos abgeschiedenes Kupfer eine geringe Haftfestigkeit aufweistIn addition, the through connections produced by electroless metal deposition also have between the conductor tracks of different conductor track levels have a low level of reliability, especially when exposed to heat, because electrolessly deposited copper has poor adhesive strength
Es ist auch ein Verfahren bekannt (DE-AS 20 14 104), mit dem u.a. auch bei Mehrebenen-Leiterplatten die Lochwandungen von in die Leiterplatten febohrten Löcher metallisiert werden. Bei diesem bekannten Verfahren wird auf die Oberfläche von in an sich bekannter Weise hergestellten Leiterzügen zunächst eine permanente, aus isoliermaterial bestehende Deckschicht aufgebracht. Danach werden eine Schutzschicht aufgebracht und die Lochungen hergestellt, wGrauf diese sensibilisiert werden, die Schutzschicht entfernt und auf den Lochwandungen Metall stromlos aufgebracht wird.There is also a method known (DE-AS 20 14 104), with which, among other things, also with multilevel circuit boards, the hole walls were drilled into the circuit boards Holes are metallized. In this known method, the surface is in itself In a known manner, conductor runs initially have a permanent cover layer made of insulating material upset. Then a protective layer is applied and the perforations are made, wGrauf these are sensitized, the protective layer is removed and metal is applied without current to the hole walls will.
Der Erfindung liegt daher die Aufgabe zugrunde, ein Verfahren zum Herstellen von Mehrebenen-Leiterplatten anzugeben, mit dem Mehrebenen-Leiterplatten, insbesondere solche mit drei oder vier Ebenen, von guter Qualität hergestellt werden können.The invention is therefore based on the object of a method for producing multilevel printed circuit boards indicate with the multilevel circuit boards, especially those with three or four levels, of good quality can be produced.
Diese Aufgabe ist erfindungsgemäß dadurch gelöst, daß die Leiterbahnen der beiden ersten (inneren) Leiterbahnebenen durch Ätzen eines kupferkaschierten Basismaterials hergestellt, anschließend diese Leiterbahnebenen ganzf1 ichig mit einer Isolierschicht beschichtet, danach die Bohrungen hergestellt und durch Anwendung des Semi-Additiv-Verfahrens die Leiterbahnen der weiteren Leiterbahnebenen erzeugt werden.This object is inventively achieved in that the conductor tracks of the two first (inner) conductor track planes formed by etching a copper-clad base material, then this conductor track planes ganzf 1 ichig coated with an insulating layer, and then made the bores and by use of the semi-additive process, the conductor tracks the other conductor track levels can be generated.
Mit dem erfindungsgemäßen Verfahren lassen sich Mehrebenen-Leiterplatten herstellen, die wesentlich preiswerter und zuverlässiger sind als die mit dem bekannten Verfahren hergestellten Mehrebenen-Leiterplatten. With the method according to the invention, multilevel printed circuit boards can be produced which are essentially are cheaper and more reliable than the multilevel printed circuit boards produced with the known method.
Nachstehend wird die Erfindung anhand eines Ausführungsbeispiels erläutert.The invention is explained below using an exemplary embodiment.
Der »Kern« der Mehrebenen-Leiterplattc besteht aus einer ein- oder zweiseitigen, geätzten Schaltung, die durch Anwendung bekannter Druck- fc'.d Ätzverfahren aus ein- bzw. zweiseitig kupferkaschiertem Basismateria! (Epoxy-Glas, Epoxy-Papier, Phenolharz-Papier) hergestellt wird.The "core" of the multilevel circuit board consists of a one- or two-sided, etched circuit, which by using known printing fc'.d etching process made of one or two-sided copper-clad base material! (Epoxy glass, epoxy paper, phenolic resin paper) will be produced.
Die Leiterbahnen des Kerns werden oxidiert, um eine ausreichende Haftung zwischen Kupfer und der nachfolgend aufzubringenden Isolierschicht zu gewährleisten. The conductor tracks of the core are oxidized to ensure adequate adhesion between the copper and the to ensure subsequently applied insulating layer.
Danach wird die Leiterplatte durch Tauch-, Gießoder Walzenbeschichtung bzw. Siebdruck mit einem flüssigen Kunststoff, dem sog. Haftvermittler, beschichtet, Sowohl die elektrostatische Pulverbcschichiung mil Rpoxidhar/ als auch das Auflaminicrcn vorgchärtcler Haftvcrmittlerfolicn sind für diesen Zweck ebenfalls geeignet.The circuit board is then dipped, poured or roller coated or screen printed with a liquid plastic, the so-called adhesion promoter, coated, both the electrostatic powder coating mil Rpoxidhar / as well as the laminate pre-hardening Adhesive films are also used for this purpose suitable.
Die Dicke der Isolierschicht ist dabei abhängig von den zu erzielenden Isolationswerten und kann von 30 μηι bis ca. 100 μιτι schwanken.The thickness of the insulating layer depends on the insulation values to be achieved and can be from 30 μm to about 100 μm fluctuate.
Semi-Additiv-Technik bekennten Acrylnitril-Butadien-Phenolharz-Gemisehe oder andere zur Anwendung der Semi-Additiv-Technik geeigneter Kunststoffe verwendet. Acrylonitrile-butadiene-phenolic resin mixtures were known for their semi-additive technology or other plastics suitable for the application of the semi-additive technique are used.
Im Anschluß an die Isolierstoff-Beschichtung wird eine Wärmebehandlung durchgeführt, um einen bestimmten Aushärtungsgrad des Isolierstoffes zu erzielen. Following the insulating material coating is a heat treatment is carried out in order to achieve a certain degree of hardening of the insulating material.
Bei Verwendung einer Acrylnitril-Butadien-Phenolharz-Haftvermittlerfolie, die mit Hilfe eines sog, Hot-Roll-Laminators aufgetragen wurde, werden bevorzugt folgende Bedingungen eingehalten:When using an acrylonitrile-butadiene-phenolic resin adhesion promoter film, which was applied with the help of a so-called hot roll laminator are preferred the following conditions are met:
Temperatur: 1600C
Zeit: 2 hTemperature: 160 0 C
Time: 2 h
Die mit Isolierstoff beschichtete Leiterplatte wird anschließend unter Anwendung der bekannten Verfahrensschritte der Semi-Additiv-Technik weiterverarbeitet: The circuit board coated with insulating material is then made using the known process steps processed using the semi-additive technology:
Bohrungen aus Kupfer
Entfernen des Leiterbilddruckes
Ätzen des LeiterbildesCopper holes
Removal of the printed circuit diagram
Etching of the conductor pattern
Weitere Verfahrensschritte, wie Aufschmelzen von Zinn/Blei-Oberzügen und/oder Drucken von Lötstopplack
bzw. Isolationslack und/oder Service- bzw. Bestückungsdrucke, sind ebenfalls anwendbar,
Gbwohl sich das Ausführungsbeispiel auf 3- bzw. 41agige Mehrebenen-Leiterplatten beschränkt, ist die
Anwendung des Verfahrens ohne weiteres auch zur Herstellung von Mehrebenen-Leiterplatten mit mehr
als 4 Leiterebenen möglich.Further process steps, such as melting of tin / lead coatings and / or printing of solder mask or insulation varnish and / or service or component prints, can also be used,
Although the exemplary embodiment is limited to 3- or 41-layer multilevel printed circuit boards, the method can also be used to manufacture multilevel printed circuit boards with more than 4 conductor levels.
Claims (3)
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19782838982 DE2838982B2 (en) | 1978-09-07 | 1978-09-07 | Method of manufacturing multilevel printed circuit boards |
| GB7929756A GB2030781B (en) | 1978-09-07 | 1979-08-28 | Multilayer printed circuit |
| SE7907298A SE7907298L (en) | 1978-09-07 | 1979-09-03 | PROCEDURE FOR MANUFACTURING PRINTED CIRCUITS WITH MULTIPLE LAYERS |
| NL7906603A NL7906603A (en) | 1978-09-07 | 1979-09-04 | METHOD FOR MANUFACTURING A MULTIPLE LAYERING A CARDBOARD |
| FR7922427A FR2447131A1 (en) | 1978-09-07 | 1979-09-07 | METHOD FOR MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARDS |
| BE2/58053A BE878645A (en) | 1978-09-07 | 1979-09-07 | MANUFACTURING METHOD FOR MULTILAYER PRINTED FLOW CARDS |
| ES483975A ES483975A1 (en) | 1978-09-07 | 1979-09-07 | Multilayer printed circuit |
| BE2/58599A BE883783R (en) | 1978-09-07 | 1980-06-12 | VERVAARDIGINGSWERKWIJZE VOOR MEERLAGIGE GEDRUKTE STROOMLOOPKAARTEN |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19782838982 DE2838982B2 (en) | 1978-09-07 | 1978-09-07 | Method of manufacturing multilevel printed circuit boards |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE2838982A1 DE2838982A1 (en) | 1980-03-20 |
| DE2838982B2 true DE2838982B2 (en) | 1980-09-18 |
Family
ID=6048893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19782838982 Ceased DE2838982B2 (en) | 1978-09-07 | 1978-09-07 | Method of manufacturing multilevel printed circuit boards |
Country Status (7)
| Country | Link |
|---|---|
| BE (1) | BE878645A (en) |
| DE (1) | DE2838982B2 (en) |
| ES (1) | ES483975A1 (en) |
| FR (1) | FR2447131A1 (en) |
| GB (1) | GB2030781B (en) |
| NL (1) | NL7906603A (en) |
| SE (1) | SE7907298L (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1987003164A1 (en) * | 1985-11-15 | 1987-05-21 | Leeb Karl Erik | Means for use in manufacturing circuit cards and method for manufacturing the means |
| DE3800890A1 (en) * | 1987-01-14 | 1988-07-28 | Kollmorgen Corp | MULTI-LAYER CIRCUIT BOARD AND METHOD FOR THE PRODUCTION THEREOF |
| DE4237611A1 (en) * | 1992-11-09 | 1994-05-11 | Lueberg Elektronik Gmbh & Co R | Circuit board prodn. and circuit board - uses further layer of resin-impregnated fabric to cover conductive paths formed on composite baseboard |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4816070A (en) * | 1985-08-29 | 1989-03-28 | Techo Instruments Investments Ltd. | Use of immersion tin and alloys as a bonding medium for multilayer circuits |
| US4715894A (en) * | 1985-08-29 | 1987-12-29 | Techno Instruments Investments 1983 Ltd. | Use of immersion tin and tin alloys as a bonding medium for multilayer circuits |
| JPS6276600A (en) * | 1985-09-29 | 1987-04-08 | 株式会社 アサヒ化学研究所 | Forming method for conductive circuit on substrate |
| GB8630392D0 (en) * | 1986-12-19 | 1987-01-28 | Prestwick Circuits Ltd | Producing printed circuit boards |
| JPH03196691A (en) * | 1989-12-26 | 1991-08-28 | Cmk Corp | Formation of insulating layer of printed wiring board |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB892451A (en) * | 1957-12-03 | 1962-03-28 | Radio And Allied Ind Ltd | Improvements in and relating to the manufacture of printed circuits |
| US3349162A (en) * | 1965-08-23 | 1967-10-24 | Automatic Elect Lab | Intra-connection techniques for multilayer printed wiring boards |
| DE1924775B2 (en) * | 1969-05-14 | 1971-06-09 | METHOD OF MANUFACTURING A CIRCUIT BOARD | |
| GB1310880A (en) * | 1969-06-13 | 1973-03-21 | Microponent Dev Ltd | Multi-layer printed circuit board assemblies |
-
1978
- 1978-09-07 DE DE19782838982 patent/DE2838982B2/en not_active Ceased
-
1979
- 1979-08-28 GB GB7929756A patent/GB2030781B/en not_active Expired
- 1979-09-03 SE SE7907298A patent/SE7907298L/en not_active Application Discontinuation
- 1979-09-04 NL NL7906603A patent/NL7906603A/en not_active Application Discontinuation
- 1979-09-07 FR FR7922427A patent/FR2447131A1/en not_active Withdrawn
- 1979-09-07 ES ES483975A patent/ES483975A1/en not_active Expired
- 1979-09-07 BE BE2/58053A patent/BE878645A/en not_active IP Right Cessation
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1987003164A1 (en) * | 1985-11-15 | 1987-05-21 | Leeb Karl Erik | Means for use in manufacturing circuit cards and method for manufacturing the means |
| DE3800890A1 (en) * | 1987-01-14 | 1988-07-28 | Kollmorgen Corp | MULTI-LAYER CIRCUIT BOARD AND METHOD FOR THE PRODUCTION THEREOF |
| DE4237611A1 (en) * | 1992-11-09 | 1994-05-11 | Lueberg Elektronik Gmbh & Co R | Circuit board prodn. and circuit board - uses further layer of resin-impregnated fabric to cover conductive paths formed on composite baseboard |
Also Published As
| Publication number | Publication date |
|---|---|
| ES483975A1 (en) | 1980-04-01 |
| NL7906603A (en) | 1980-03-11 |
| DE2838982A1 (en) | 1980-03-20 |
| SE7907298L (en) | 1980-03-08 |
| GB2030781B (en) | 1982-10-13 |
| GB2030781A (en) | 1980-04-10 |
| FR2447131A1 (en) | 1980-08-14 |
| BE878645A (en) | 1980-03-07 |
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