GB2126013A

GB2126013A - Microprocessor system

Info

Publication number: GB2126013A
Application number: GB08223720A
Authority: GB
Inventors: Leslie A Birt; David A Bonham; Anthony D Grimer
Original assignee: Bowthorpe Holding PLC
Current assignee: Bowthorpe PLC
Priority date: 1982-08-18
Filing date: 1982-08-18
Publication date: 1984-03-14

Abstract

A microprocessor system for a particular end use is produced by taking a predetermined printed circuit board and populating it appropriately: the board is designed to receive a microprocessor (10), selected program memory (12 and/or 22), selected input/output circuitry components (16, 14) and selected other components to suit the requirements, the program memory being loaded with appropriate software. Sites 16 can each receive either an input or an output buffer, and site 25 may receive an analog-to- digital converter to handle analog inputs applied at 27. A portion 2 of the overall board 1, 2 may be cut- away for lesser computing applications which do not require the set of input/output devices 16a (or their control circuitry component 14a) with which this portion may be populated. <IMAGE>

Description

SPECIFICATION Microprocessor system The present invention relates to a microprocessor system and in particular to the selective populating of a predetermined printed circuit board to provide a microprocessor system to meet particular requirements.

Microprocessor utilisation in product applications is essentially governed by the cost of the electronic hardware necessary. This can be minimised by custom design of the hardware for each individual application. However, the project development costs which are involved are significantly increased by the custom design and development required of both hardware and software.

We have now devised a printed circuit board which is arranged to be selectively populated (within a range of possible selections) to provide a microprocessor system to meet particular requirements. Thus, whatever the product or apparatus requiring a microprocessor system (e.g.

for control of its functions), the printed circuit board can be populated within a range of selection possibilities to meet the needs, the microprocessor requiring appropriate programming.

Thus, in accordance with this invention there is provided a method of producing a microprocessor system for a particular end use, comprising taking a predetermined printed circuit board, populating the board with a microprocessor and a program memory for the microprocessor, and further populating the board with selected input/output circuitry components and selectively with other components associated to the microprocessor, the board being appropriately arranged to receive the selectable components, and the program memory being loaded with a program designed for the particular end use.

Conveniently, the microprocessor may be a predetermined microprocessor or type. Preferably the printed circuit board includes a site or sites arranged to receive a selection of ROM or RAM memories, to give a range of options for storage capacities. Preferably the board includes a predetermined number of input/output sites, each of which may be populated selectively to serve either as a signal input or as a signal output: there is thus a choice of the number of inputs and the number of outputs up to a predetermined total of inputs and outputs.

Preferably the board is arranged so that a portion of it does not require populating and may be cut-away for lesser applications. A significant space saving can then be achieved. In an embodiment to be described herein, the portion concerned carries an additional set of input/output sites and circuitry for servicing them.

Another aspect of the invention (applicable to microprocessor systems in general and not only to the system discussed above) concerns a selective coding provided integrally of the printed circuit board and arranged to be read and approved by the system software, thus providing security against copying.

An embodiment of the present invention will now be described by way of example only with reference to the accompanying drawing, the single figure of which is a schematic plan of a circuit board populated with a full complement of components.

The circuit board shown comprises a main portion 1 and an auxiliary portion 2: the latter portion may be cut-away from the main portion when not required, as will be explained later in this description. The main portion 1 of the board is populated with a microprocessor chip 10 (for example an Intel 8085), a program memory 12 for the microprocessor, input/output circuitry and a RAM working memory. The input/output circuitry comprises a first input/output controller chip 14 connected on the one hand to a first set of 6 buffers 16 and on the other hand to the microprocessor 10 via decode circuitry 18. The auxiliary portion 2 of the board is populated with a second input/output controller chip 14a and an associated second set of 6 buffers 16a.

Each of the controllers 1 6, 1 6a is an Intel 81 55 chip and includes a timer and 256 Bytes of random access memory (RAM) in addition to its input and output control systems. Each of the twelve buffers 1 6, 1 6a, may be an input device or an output device, depending upon requirements and correspondingly serving to interface with signal lines or actuators as the case may be and each is a 4-line device. Each Intel 8155 chip controls 22 lines (arranged in two groups of 8 and one of 6): five of the associated buffers each connect with 4 lines and the sixth connects with two lines, the six buffers connecting with 22 terminals or contacts (20 or 20a) along the adjacent edge of the board.

The program memory 12 may be a 4K ROM (read only memory) type 2732, or an 8K ROM type 2764. A further memory chip 22 is also provided, and may be a 4K ROM type 2732 or a 2K RAM type 6116. An 8-bit address latch 23 (type 74LS373) is provided, and a NAND chip 24 (type 74LS00, consisting of 4 2-input NAND gates) is associated with the decode circuitry 18.

The main portion 1 of the board is also populated with circuitry for analog inputs, which circuitry comprises an 8-channel multiplex analog-digital converter (type ADC0809). Eight further terminals or contacts 27 are provided at the same edge of the board as the buffers 16 and four of these are terminals 27 connected directly to four respective channels of the AD converter 25 and the other four terminals 27 are connected through amplifier circuitry 26 to the other four channels of the AD converter. A type 74LS74 chip 28 (consisting of two D-type flip-flops) is associated with the AD converter and serves for clock dividing.

A site 29 is provided adjacent another edge of the main board portion 1 for power-in connections: if a voltage regulator is required, this may be mounted entirely separately, but the site 29 is arranged to receive the regulator (for example converting a 12 volt supply to the 5 volt system supply) and because site 29 is at the edge of the board then the possibility is provided for mounting the board with the regulator in contact with a wall of the cabinet housing the board, to use this wall as the heat sink for the regulator.

The main portion 1 of the board is further provided with a connecting arrangement 30 (perhaps a connector, but more simply an array of pin holes) for effecting connection to a separate daughter board (not shown) serving to extend the computing power of the overall system. The daughter board will mount (essentially) a chip with 3-16 bit timers, together with a UART chip and its buffer/driver devices, and an interrupt controller. One of the timers would be arranged to determine the baud rate for the UART chip.

Depending on the system requirements, either the UART or the interrupt controller might be omitted.

The daughter board may include a site for mounting an inverter (arranged to supply +12 volts, for example) and a site for mounting a backup battery for the RAM on the main portion of the board.

On the main portion 1 of the board shown, the input/output controller 14 provides for a total of 22 inputs and outputs, and on the auxiliary portion 2, the controller 14a provides for a further total of 22 inputs and outputs. If physical space for housing the board is at a premium (and if no more than a total 22 inputs and outputs is required), the auxiliary portion 2 may be cut-away from the main board 1 along the dotted line shown, the auxiliary portion being discarded and only the main portion 1 of the board then being populated. At each of the sites 1 6 (1 6a), either an input buffer device or output buffer device may be mounted.Preferably there is a first array of holes capable of receiving the pins of either an input or an output device of one type on the market, and a second array of holes capable of receiving the pins of either an input or an output device of another type on the market: in any event the same 4 conductor tracks to the controller 14 are used. The sites 16 (16a) are populated in number and type (input or output) according to the system requirements.

If the system does not require analog inputs, then the AD converter 25, its associated chip 28 and amplifier circuitry 26 would be omitted. If analog inputs are required but are of such signal strength that scaling is not needed, then amplifier circuitry 26 would be omitted (but converter 25 and chip 28 included).

As the controllers 14, 1 4a, each include 256 Bytes of RAM, in certain cases no further RAM need be supplied at site 22, and indeed this site may be left unpopulated if the 4K or 8K ROM at site 12 is sufficient.

In the drawing shown, the conductor tracks interconnecting the various sites are not shown, nor is the array of holes at each site for receiving the chip (or choice of chips) at that site.

It will be appreciated that the board shown is designed so that it can be populated with sufficient functions on it to perform the given application without redundant components.

Furthermore its architecture is designed, and it is physically laid-out, so that the required components in an intermediate sized application are all in one section of board leaving the rest empty. This allows the board to be cut to the smaller size (main portion 1) giving a significant space saving which could be critical in some applications.

The full board has two input/output controllers, each controlling 22 lines arranged into groups of 8 and one of six and each can be set to be inputs or outputs. However, because these lines from the controllers are not sufficiently powerful or sturdy to be outputs or inputs that interface to actuators or signal lines, the buffers 1 6, 1 6a are provided having different characteristics depending whether they are for input or output (as well as obviously operating in different directions).

The board is designed with a choice of components such that the buffers, either input or output as required, fit into the same set of dual-in line holes in the printed circuit board thereby saving space.

A further feature of the printed circuit board shown is that it incorporates a selective coding for security purposes: different production batches of boards would be coded differently, and the software would be modified accordingly from batch-to-batch to match the coding. In particular, the software is arranged to read the coding on the board and in some convenient manner disable the microprocessor system if there is no match. In the board shown, the coding is achieved by selective interconnection (or non-interconnection) of a plurality of connectors on the board, which are read by inputs of the microprocessor. The sites of selective interconnection are unobtrusive and preferably distributed around the board: the interconnections may be effected by an intermediate layer in the board, or by the plating or not plating of through-holes in the printed circuit board.The arrangement is unobtrusive because the plated through holes are identical to the many others present on the board and used for conventional interconnection purposes.

Claims (Filed on 17.8.83) 1. A method of producing a microprocessor system for a particular end use, comprising taking a predetermined printed circuit board, populating the board with a microprocessor and a program memory for the microprocessor, and further populating the board with selected input/output circuitry components and selectively with other components associated to the microprocessor, the board being appropriately arranged to receive the selectable components, and the program memory being loaded with a program design for the particular end use.

2. A method as claimed in claim 1, in which the board includes a site or sites arranged to receive a selection of predetermined ROM or RAM

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **.

29 is arranged to receive the regulator (for example converting a 12 volt supply to the 5 volt system supply) and because site 29 is at the edge of the board then the possibility is provided for mounting the board with the regulator in contact with a wall of the cabinet housing the board, to use this wall as the heat sink for the regulator.

The main portion 1 of the board is further provided with a connecting arrangement 30 (perhaps a connector, but more simply an array of pin holes) for effecting connection to a separate daughter board (not shown) serving to extend the computing power of the overall system. The daughter board will mount (essentially) a chip with 3-16 bit timers, together with a UART chip and its buffer/driver devices, and an interrupt controller. One of the timers would be arranged to determine the baud rate for the UART chip.

Depending on the system requirements, either the UART or the interrupt controller might be omitted.

The daughter board may include a site for mounting an inverter (arranged to supply +12 volts, for example) and a site for mounting a backup battery for the RAM on the main portion of the board.

On the main portion 1 of the board shown, the input/output controller 14 provides for a total of 22 inputs and outputs, and on the auxiliary portion 2, the controller 14a provides for a further total of 22 inputs and outputs. If physical space for housing the board is at a premium (and if no more than a total 22 inputs and outputs is required), the auxiliary portion 2 may be cut-away from the main board 1 along the dotted line shown, the auxiliary portion being discarded and only the main portion 1 of the board then being populated. At each of the sites 1 6 (1 6a), either an input buffer device or output buffer device may be mounted.Preferably there is a first array of holes capable of receiving the pins of either an input or an output device of one type on the market, and a second array of holes capable of receiving the pins of either an input or an output device of another type on the market: in any event the same 4 conductor tracks to the controller 14 are used. The sites 16 (16a) are populated in number and type (input or output) according to the system requirements.

If the system does not require analog inputs, then the AD converter 25, its associated chip 28 and amplifier circuitry 26 would be omitted. If analog inputs are required but are of such signal strength that scaling is not needed, then amplifier circuitry 26 would be omitted (but converter 25 and chip 28 included).

As the controllers 14, 1 4a, each include 256 Bytes of RAM, in certain cases no further RAM need be supplied at site 22, and indeed this site may be left unpopulated if the 4K or 8K ROM at site 12 is sufficient.

In the drawing shown, the conductor tracks interconnecting the various sites are not shown, nor is the array of holes at each site for receiving the chip (or choice of chips) at that site.

It will be appreciated that the board shown is designed so that it can be populated with sufficient functions on it to perform the given application without redundant components.

Furthermore its architecture is designed, and it is physically laid-out, so that the required components in an intermediate sized application are all in one section of board leaving the rest empty. This allows the board to be cut to the smaller size (main portion 1) giving a significant space saving which could be critical in some applications.

The full board has two input/output controllers, each controlling 22 lines arranged into groups of 8 and one of six and each can be set to be inputs or outputs. However, because these lines from the controllers are not sufficiently powerful or sturdy to be outputs or inputs that interface to actuators or signal lines, the buffers 1 6, 1 6a are provided having different characteristics depending whether they are for input or output (as well as obviously operating in different directions).

The board is designed with a choice of components such that the buffers, either input or output as required, fit into the same set of dual-in line holes in the printed circuit board thereby saving space.

A further feature of the printed circuit board shown is that it incorporates a selective coding for security purposes: different production batches of boards would be coded differently, and the software would be modified accordingly from batch-to-batch to match the coding. In particular, the software is arranged to read the coding on the board and in some convenient manner disable the microprocessor system if there is no match. In the board shown, the coding is achieved by selective interconnection (or non-interconnection) of a plurality of connectors on the board, which are read by inputs of the microprocessor. The sites of selective interconnection are unobtrusive and preferably distributed around the board: the interconnections may be effected by an intermediate layer in the board, or by the plating or not plating of through-holes in the printed circuit board.The arrangement is unobtrusive because the plated through holes are identical to the many others present on the board and used for conventional interconnection purposes.

Claims (Filed on 17.8.83) 1. A method of producing a microprocessor system for a particular end use, comprising taking a predetermined printed circuit board, populating the board with a microprocessor and a program memory for the microprocessor, and further populating the board with selected input/output circuitry components and selectively with other components associated to the microprocessor, the board being appropriately arranged to receive the selectable components, and the program memory being loaded with a program design for the particular end use.
2. A method as claimed in claim 1, in which the board includes a site or sites arranged to receive a selection of predetermined ROM or RAM memories and the method includes the step of selecting from said ROM and RAM memories and populating the board therwith accordingly.
3. A method as claimed in claim 1 or 2, in which the board includes a number of input/output sites, each arranged to be populated selectively to serve either as a signal input or as a signal output, and the method further includes the step of selectively populating at least some of said input/output sites with signal input or output buffer devices.
4. A method as claimed in any preceding claim, in which the board includes sites for receiving analog inputs and for receiving an analog-to digital converter for analog input signals, and the method includes selectively populating those sites.
5. A method as claimed in claim 4, in which the board includes a site for receiving an amplifier to amplify at least some of the analog input signals before application to the analog-to-digital converter, and the method includes the step of selectively populating that site.
6. A method as claimed in any preceding claim, in which the board includes at an edge thereof a site for power-in connections and arranged for receiving a power regulator and the method includes the step of selectively populating that site.
7. A method as claimed in any preceding claim, in which the board includes connecting means for interconnection with a daughter board serving to extend the computing power of the microprocessor system, and the method includes the steps of selectively populating such a daughter board and interconnecting it with the main board by said connecting means.
8. A method as claimed in any preceding claim, in which the main board includes a portion which, for lesser requirements of the microprocessor system, does not require populating, and the method includes the step of severing said portion from the main board when population of it is not required.
9. A method as claimed in claim 8, in which said portion of the board includes additional input/output sites and sites for control circuitry components to service them.
10. A method of producing a microprocessor system for a particular end use, which method is substantially as herein described with reference to the accompanying drawing.
11. A printed circuit board arranged to be selectively populated with various predetermined components to provide a microprocessor system for a particular end use, the board comprising sites arranged to receive a microprocessor and a program memory for the microprocessor, selected input/output circuitry components and selected other components associated to the microprocessor and the selected input/output components.
12. A board as claimed in'claim 11, including a site or sites arranged to receive a selection of predetermined ROM or RAM memories.
13. A board as claimed in claim 11 or 12, including a number of input/output sites each arranged to receive either a signal input or a signal output buffer device.
14. A board as claimed in any one of claims 11 to 13, including sites for receiving analog inputs and for receiving an analog-to-digital converter to receive them.
15. A board as claimed in claim 14, further including a site for receiving an amplifier to amplify at least some of the analog input signals before application to the analog-to-digital converter.
16. A board as claimed in any one of claims 11 to 14, including a site at an edge thereof for power-in connections and arranged for receiving a power regulator at that site.
17. A board as claimed in any one of claims 11 to 1 6, including connecting means for interconnection with a daughter board serving to extend the computing power of the microprocessor system.
18. A board as claimed in any one of claims 11 to 17, including a portion which, for lesser requirements of the microprocessor system, does not require populating and which is arranged to be severed from the main board and dispensed with.
19. A board as claimed in claim 18, in which said portion of the board includes additional input/output sites and sites for control circuitry components to service them.
20. A printed circuit board populated with components to provide a microprocessor system, and comprising a selective coding provided integrally of the printed circuit board and arranged to be read, for approval, by the system software.
21. A board as claimed in claim 20, in which the coding is achieved by selective interconnection or non-interconnection of a plurality of connectors on the board, which are read by the microprocessor inputs.
22. A board as claimed in claim 21, in which the sites of interconnection or noninterconnection are distributed around the board.
23. A board as claimed in claim 22, in which the interconnections are effected by an intermediate layer in the board.
24. A board as claimed in claim 22, in which the interconnections are effected by selective plating of selected through-holes in the board.
25. A printed circuit board substantially as herein described with reference to the accompanying drawing.