GB2134704A - Semiconductor mounting arrangements - Google Patents

Abstract

An electrical isolation assembly for mounting one or more discrete semiconductor devices 13, 14 in thermal contact with, but electrically isolated from, means 15 for cooling the device(s), comprises a metal conductor plate 2 arranged to make electrical and thermal contact with the semiconductor device(s), the conductor plate 2 being bonded by a fused glass and ceramic compound to a baseplate 3 arranged to make thermal contact with the cooling means 15. The conductor plate 2 may be provided with a terminal 6 for making an electrical connection between the semiconductor devices and an external circuit. <IMAGE>

Description

SPECIFICATION Semiconductor mounting arrangements This invention relates to the provision of an electrical isolation barrier between one or more discrete semiconductor devices and the assembly used for cooling them. This is achieved by the provision of an assembly in which the electrical isolation barrier is a part. The invention also relates to improvements in the methods used for mounting particular types of discrete semiconductor devices.

The heat generated by discrete semiconductor devices can result in damage to the devices if not conducted away and dissipated by some means.

Thus it is customary to fix discrete semiconductor devices that generate appreciable amounts of heat to an assembly which, either by conduction, convection or radiation, or a combination of these modes of heat transfer, maintains the temperature of the discrete semiconductor devices at an acceptable level. It is usual that the cases of the discrete semiconductor devices are at a high potential. Consequently, when discrete semiconductor devices are mounted on the assembly used for cooling this also attains a high potential. This situation is often undesirable for reasons of safety or ease of installation and maintenance. Thus, many means exist that enable the assembly used for cooling the discrete semiconductor devices to be electrically isolated from the discrete semiconductor devices.

In the art of electrically isolating discrete semiconductor devices from the assembly used for cooling them, it is desirable that several requirements are satisfied. Such requirements include firstly, that the electrical isolation assembly has the minimum effect on conduction of heat from the discrete semiconductor device to the assembly used for cooling. Secondly, that the electrical isolation assembly is not adversely affected by repeated and rapid heating and cooling applied to one surface of this assembly.

Thirdly, that the electrical isolation assembly complies with relevant electrical safety standards, particularly with regard to electrical clearances and electrical tracking distances between parts at high potential and parts at low or earth potential.

Further, that the failure of the electrical isolation assembly does not occur when the maximum recommended mounting force for the discrete semiconductor devices is applied.

Finally, it is often desirable that two or more discrete semiconductor devices be mounted in close proximity to each other to facilitate easy electrical interconnection and to reduce the size of the complete assembly.

In meeting these and other requirements it is usually the case that the ability of the electrical isolation assembly to conduct heat is adversely affected. The consequence is that the imposition of an electrical isolation assembly results in a substantial reduction in the performance of the discrete semiconductor devices, or the need to use discrete semiconductor devices having a higher rating. In addition it is often difficult to mount and apply the necessary force to the discrete semiconductor devices, and make external electrical connections.

It is therefore an object of the invention to provide, firstly, an improved electrical isolation assembly for one or more discrete semiconductor devices conforming to JEDEC outline T0200AB or similar larger or smaller outlines which generate significant levels of power. Secondly, to provide an electrical isolation assembly that permits improved techniques to be used for mounting and applying the necessary force ta the discrete semiconductor devices conforming to JEDEC outline T0200AB or similar larger or smaller outlines, and improved techniques for making external electrical connections.

According to the invention, there is provided an electrical isolation assembly for mounting one or more discrete semiconductor devices in thermal contact with, but electrically isolated from, means for cooling the device(s), comprising a metal conductor plate arranged to make electrical and thermal contact with the semiconductor device(s), the conductor plate being bonded by a fused glass and ceramic compound to a baseplate arranged to make thermal contact with the cooling means.

The fused glass and ceramic compound can be formed so as to provide a high degree of electrical isolation; it may have thermal expansion properties similar to the adjacent conductor plate and baseplate so that it is able to withstand thermal cycling. The electrical isolation assembly is formed so as to have a low thermal resistance and be able to withstand the high mounting pressures necessary with some semiconductor devices.

The baseplate may be an integral part of the cooling means, and the conductor plate directly bonded to the cooling means. However, the baseplate may be a separately-formed plate bonded to the conductor plate; the semiconductor device(s), isolation assembly and cooling means can then be clamped together. This arrangement has the advantage that it may be unclamped and the electrical isolation assembly transferred from one type of cooling means to another. The clamp may include bolts arranged to pass through holes in the conductor and baseplate.

The conductor plate is preferably provided with a terminal for making an electrical connection between the semiconductor device and an external circuit.

The conductor plate can be arranged to mount in electrical and thermal contact two semiconductor devices so as to make an electrical connection therebetween. Many circuits, e.g.

diode and thyristor circuits, require semiconductors to be electrically connected together and this provides a convenient way of connecting two devices in a safe and compact manner while maintaining electrical isolation from other components.

Where it desired to increase the amount of heat conducted from a semiconductor device or devices, it is possible to clamp two of the electrical isolation assemblies to the semiconductor device(s), one on each side of the semiconductor device(s). One of the isolation assemblies is inverted with respect to the other so that the conductor plate of each isolation assembly contacts the semiconductor device(s).

The conductor plate is preferably coated over its entire under-surface with a paste containing a fusible glass and ceramic compound, the upper surface being coated, e.g. by spraying or screen printing, over the entire surface except where the semiconductor device(s) are to be mounted. The connection terminal is also of course left free of the paste. The base plate is coated over its entire upper surface where it is to be bonded to the lower surface of the conductor plate but the lower surface which conducts heat to the cooling means is not coated. The conductor plate and baseplate may be fused together by mounting them in a jig and heating them in an oven until the paste fuses.

Viewed from another aspect, the invention provides a method of making an electrical isolation assembly for mounting a discrete semiconductor device or devices on means for cooling the device(s), comprising forming a conductor plate and coating it with a fusible glass and ceramic compound except where contact is to be made with the semiconductor device(s), providing a baseplate and coating it with fusible glass and ceramic compound where it is to face the conductor plate, positioning the conductor plate and baseplate together and heating them to fuse the glass and ceramic compound and bond together the conductor plate and baseplate.

Embodiments of the invention will now be described by way of example with reference to the accompanying drawings wherein:~ Figure 1 is a schematic perspective drawing and section of the conductor of an electrical isolation assembly according to the invention.

Figure 2 is a schematic perspective drawing and section of the baseplate of the electrical isolation assembly.

Figure 3 is a schematic perspective drawing and section of the conductor and baseplate when assembled to form the electrical isolation assembly.

Figure 4 is a schematic perspective drawing of a single electrical isolation assembly being used to conduct heat from a single surface of two discrete semiconductor devices conforming to JEDEC outline T0200AB or similar larger or smaller outlines.

Figure 5 is a schematic perspective drawing of two electrical isolation assemblies used to cool two faces of discrete semiconductor devices conforming to JEDEC outline T0200AB or similar larger or smaller outlines.

Referring to Figures 1, 2 and 3, the electrical isolation assembly 1 comprises two main parts, conductor 2 and baseplate 3. The conductor 2 comprises a high conductivity copper pressing formed as shown in Figure 1. The copper is preferably deoxygenated. It is coated with a suspended powdered glass and ceramic compound 4, comprising a mixture of powdered silicate, borate or phosphate and powdered glass, the mixture being capable of controlled crystallisation to produce a glass and ceramic compound capable of bonding to copper with a closely matched thermal expansion coefficient and possessing a high dielectric strength and volume and surface resistivities. For example, a paste containing the ground glass and ceramic compound may be screen printed onto the conductor. The shaded area 5 is not coated to enable external electrical connections to be made using fixing 6.The shaded areas 7 are also not coated to enable connection to be made between the cases of the discrete semiconductor devices conforming to JEDEC outline T0200AB or similar larger or smaller outlines. The position and size of holes 8 enable the required electrical tracking distances and electrical clearances to be maintained when the discrete semiconductor devices and associated clamps are fitted to the electrical isolation assembly. The inside surface of holes 8 are also coated with suspended powdered glass and ceramic compound. The discrete semiconductor devices are not shown here for reasons of clarity. Further, they are not part of the invention and are not required in this drawing for an understanding of the invention.

Referring to Figure 2, there is shown the general form of the baseplate 3. It comprises a high conductivity copper pressing coated with a suspended powdered glass and ceramic compound over the upper surface and sides 9 and the inside surface of holes 8'. The threaded holes 10 are used for locating the discrete semiconductor clamps on the electrical isolation assembly. Holes 8' are of sufficient size to permit the fitting of mounting bolts used to fix the discrete semiconductor devices, clamps and isolation assembly to the assembly for cooling.

The underside 11 is not coated so as not to impair the conduction of heat to the assembly used for cooling.

Referring now to Figure 3, there is shown the general form of the electrical isolation assembly.

The conductor 2 and baseplate 3 are positioned relative to each other using a suitable jig. The temperature of the assembly is raised to a level sufficient for the glass and ceramic compound coatings to melt and fuse the conductor 2 and baseplate 3 together. When cooled the resulting homogeneous coating of glass and ceramic compound covering the surfaces of the assembly provides the required electrical tracking distances and electrical clearances between parts at a high potential and parts at a low or earth potential, when the discrete semiconductor devices and associated clamps are fitted for the electrical isolation assembly, and when the complete assembly is clamped to the assembly used for cooling. The jig used for positioning the conductor and baseplate also controls the thickness of the glass and ceramic compound 12 separating these parts.The control of this thickness enables the electrical isolation assembly to withstand the application of the required voltage between the conductor 2 and baseplate 3.

Referring now to Figure 4, there is shown an electrical isolation assembly 1 , similar to that shown in Figure 3, being used to isolate discrete semiconductor device 13 and discrete semiconductor device 14 from the assembly 15 used for cooling. Heat dissipated by the discrete semiconductor devices is conducted through one surface of each device where it makes contact with the conductor 2. The conductor 2 also forms an electrical connection between discrete semiconductor 13 and discrete semiconductor 14, and facilitates the making of an external electrical connection by means of fixing 6. The remaining external electrical connections are made by means of fixing 16 and fixing 17 which are part of conductor 18 and conductor 19 respectively.The mounting force is transmitted to each discrete semiconductor device through the shaded area 20 of conductor 18 and conductor 1 9, and acts in a direction that is parallel to the axes of the discrete semiconductor devices.

For reasons of clarity and because they do not form part of the invention, and are not required to be shown in the drawing for an understanding of the invention, the fixing and clamping arrangements have not been shown.

As the amount of heat to be conducted away from the discrete semiconductor devices increases, so the use of a single electrical isolation assembly, in the way shown in Figure 4, is not sufficient to prevent the temperature of the discrete semiconductors becoming too great.

Referring now to Figure 5, by using electrical isolation assemblies 1 positioned so as to be in contact with opposite surfaces of discrete semiconductor devices 13, 14, the total amount of heat conducted to the assemblies 15 used for cooling is approximately doubled when compared with the performance of the arrangement shown in Figure 4. The upper of the two assemblies 15 used for cooling is shown cut away for reasons of clarity. Heat dissipated by the discrete semiconductor devices is conducted through opposite surfaces of each device where contact is made with conductors 2. The conductors 2 also form electrical connections between discrete semiconductor devices 13 and 14, and facilitate the making of external electrical connections by means of fixings 6.The mounting forces are transmitted to the discrete semi-conductor devices through the assemblies 15 used for cooling, the baseplates 3 and conductors 2. These forces act in a direction parallel to the axes of the discrete semiconductor devices.

Again for reasons of clarity and because they are not required to be shown in the drawing for an understanding of the invention, the fixing and clamping arrangements have not been shown.

The arrangements shown in Figure 4 and Figure 5 have the advantages that firstly, electrical isolation assemblies can be transferred from one type of assembly used for cooling to any other.

Secondly, that the electrical isolation assembly is of a convenient size for handling, storage and manufacture. By foregoing these advantages a further improvement in the ability of the electrical isolation assembly to conduct heat away from the discrete semiconductor devices is obtained.

Referring again to Figure 5, such an improvement is obtained by removing the nonintimate interface between the baseplates 3 and the assemblies 1 5 used for cooling. The assemblies 15 used for cooling are coated with the suspended powdered glass and ceramic compound on surfaces 21. The conductors 2 having also been coated with the same glass and ceramic compound as shown in Figure 1 are then positioned on the assemblies 15 used for cooling by means of a suitable jig. The temperature of the assemblies is raised to a level sufficient for the glass and ceramic compound coatings to melt and fuse together the conductors 2 and assemblies 1 5 used for cooling.When cooled the resulting homogeneous coating of glass and ceramic compound covering the surfaces provides the required electrical tracking distances and electrical clearances between parts at a high potential and parts at a low or earth potential when the complete assemblies, the discrete semiconductor devices and associated clamps are fitted together.

The jig used for positioning the conductors 2 and the assemblies 15 used for cooling also controls the thickness of the glass and ceramic compound separating these parts. The control of this thickness enables the electrical isolation assembly to withstand the application of the required voltage between conductors 2 and assemblies 15 used for cooling. The baseplates 3 are eliminated from the electrical isolation assembly. However, the assemblies used for cooling are now part of the electrical isolation assembly.

Thus it may be seen that among the advantages of the invention are that the ability of the electrical isolation assembly to conduct heat dissipated by the discrete semiconductor devices is improved by: a) increasing the area through which heat is conducted to a maximum compatible with the other requirements for this type of assembly; b) by providing an intimate contact at the interface between the electrical isolation barrier and the adjacent parts of the assembly.

Further, by using a material for the electrical isolation barrier that has a similar coefficient of thermal expansion to the adjacent parts of the assembly, the electrical isolation assembly is not adversely affected by repeated and rapid heating and cooling applied to one side of the assembly.

The coating of the relevant parts of the electrical isolation barrier provides the necessary degree of electrical safety by providing adequate electrical tracking distances and electrical clearances between parts at a high potential and parts at low or earth potential. The electrical isolation does not impose restrictions on the mounting force that can be applied to the discrete semiconductor devices due to the inherent strength of the assembly being sufficient to prevent failure of the isolation medium; and the electrical isolation assembly permits the discrete semiconductor devices to be mounted in close proximity to each other and permits easy electrical interconnection.

To mount a single discrete semiconductor device any of the arrangements described above may be used simply by providing a space for a single device. Similarly spaces may be provided in like arrangements for more than two discrete semiconductor devices.

Claims (13)

1. An electrical isolation assembly for mounting one or more discrete semiconductor devices in thermal contact with, but electrically isolated from, means for cooling the device(s), comprising a metal conductor plate arranged to make electrical and thermal contact with the semiconductor device(s), the conductor plate being bonded by a fused glass and ceramic compound to a baseplate arranged to make thermal contact with the cooling means.

2. An electrical isolation assembly as claimed in claim 1 wherein the base plate is an integral part of the cooling means and the conductor plate is bonded directly to the cooling means.

3. An electrical isolation assembly as claimed in claim 1 wherein the baseplate is a separatelyformed plate bonded to the conductor plate whereby the semiconductor device(s), isolation assembly and cooling means can be clamped together.

4. An electrical isolation assembly as claimed in claim 3 including clamping means in the form of bolts arranged to pass through holes in the conductor plate and baseplate.

5. An electrical isolation assembly as claimed in any preceding claim wherein the conductor plate is provided with a terminal for making an electrical connection between the semiconductor device(s) and an external circuit.

8. An electrical isolation assembly as claimed in any preceding claim wherein the conductor plate is arranged to mount in electrical and thermal contact two semiconductor devices so as to make an electrical connection therebetween.

7. An electrical isolation assembly comprising two isolation assemblies as claimed in any preceding claim clamped to the semiconductor device(s), one on each side of the semiconductor device(s), one of the isolation assemblies being inverted with respect to the other so that the conductor plate of each isolation assembly contacts the semiconductor device(s).

8. Electrical isolation assemblies substantially as hereinbefore described with reference to the accompanying drawings.

9. A method of making an electrical isolation assembly for mounting a discrete semiconductor device or devices on means for cooling the device(s), comprising forming a conductor plate and coating it with a fusible glass and ceramic compound except where contact is to be made with the semiconductor device(s), providing a baseplate and coating it with fusible glass and ceramic compound where it is to face the conductor plate, positioning the conductor plate and baseplate together and heating them to fuse the glass and ceramic compound and bond together the conductor plate and baseplate.

10. A method as claimed in claim 9 wherein the conductor plate is coated over its entire undersurface with a paste containing a fusible glass and ceramic compound and the upper surface is coated over the entire surface except where the semiconductor device(s) and any connection terminal are to be mounted.

11. A method as claimed in claim 9 or 10 wherein the baseplate is coated over its entire upper surface where it is to be bonded to the lower surface of the conductor plate.

12. A method as claimed in claims 10 and 1 1 wherein the conductor plate and baseplate are fused together by mounting them in a jig and heating them in an oven until the paste fuses.

13. A method of making an electrical isolation assembly, substantially as hereinbefore described with reference to the accompanying drawings.