GB2136233A

GB2136233A - Circuit for sensing the status of a voltage input over a wide range of voltage levels and waveforms

Info

Publication number: GB2136233A
Application number: GB08404130A
Authority: GB
Inventors: Kenneth Robert Pelowski; Robert Joseph Winkel
Original assignee: Westinghouse Electric Corp
Current assignee: Westinghouse Electric Corp
Priority date: 1983-02-28
Filing date: 1984-02-16
Publication date: 1984-09-12
Also published as: IT8441531A0; JPS59167709A; DE3406884A1; CA1215179A; IT1183712B; GB8404130D0

Abstract

The circuit senses the status of a voltage input over a wide range of voltage levels and waveforms over a first predetermined range by using a voltage conditioning circuit BR1, 26, OPI 30 to generate an output signal having a voltage within a second predetermined range. Bridge rectifier BR1 rectifies any AC waveform from sensing means 12 and a limiter D1 which may be a zener diode or a varistor changes the signal waveform to the first predetermined range as shown by waveform C. A zener diode D2 ensures that a minimum voltage level is present before activating an opto isolating circuit OPI. The opto isolation circuit OPI generates an output signal having a voltage within the second range, denoted by waveform D in response to an input signal having a voltage over a first predetermined range C. When photo transistor 76 conducts a capacitor C3 discharges via R6 and 76 and when the capacitor C3 voltage becomes lower than the reference voltage at the noninverting input 102 of a comparator 41, the comparator 41 will produce an output to a central processing unit 16. <IMAGE>

Description

SPECIFICATION Versatile input circuit for sensing the status of a voltage input over a wide range of voltage levels and waveforms Background of the Invention Field of the invention: The invention relates generally to electronic circuits and in particular to an input circuit for a central processing unit of a microprocessor or computer for sensing the status of an input signal voltage which varies over a range of voltages which may have different waveforms.

Description of the prior art: In prior art, the signal conditioning circuit interposed between the sensing means and the central processing unit of a microprocessor or computer system is generally referred to as the input card. The input card, which is physically mounted on the input bus interface, had to be hitherto sized separately for each expected voltage level of the output of the sensing means which generated the sensed signal. This required having to stock multiple input cards for use with the same controller in order to supply the customer with compatible signal conditioning circuitry for different expected voltage levels of the sensing means output. Similarly, users or customers had to stock multiple input cards if they desired the central processing unit to have flexibility for different applications.Accordingly, to obviate the disadvantages of prior art, it would be desirable to have an input signal conditioning circuit or input card that is compatible with a wide range of input sensed signals for both varying voltage levels and in particular to wide range of both AC and DC waveforms.

Summary of the invention The present invention in its broad form comprises an electronic signal-conditioning-circuit for adapting a wide range of sensed input voltage and frequency signals to be admitted into a central processing unit, for sensing the status of the sensed input signal voltage, comprising: a) first interface means adapted for connection to a sensing means for relaying an output of said sensing means to a voltage conditioning circuit; b) a second interface means for relaying a signal from said voltage conditioning circuit to said central processing unit; c) said voltage conditioning means being connected between said first interface means and said second interface means for responding to an input signal of said first interface means having a voltage over a first predetermined range, to generate an output signal having a voltage within a second predetermined range.

A preferred embodiment described herein comprises an electronic signal conditioning circuit for inputting a wide range of sensed voltage signals of various AC and DC waveforms to a central processing unit of a computer or microprocessor; the electronic signal conditioning circuit comprises a first interface means for replaying sensed signals of varying input voltages and waveforms from a sensing means, a second interface means for relaying a signal from the signal conditioning circuit to a central processing unit of a microprocessor or computer controller; a signal conditioning means disposed between the sensing interface means and the input bus interface means for responding to an input signal of the sensing means having AC or DC waveforms over a first predetermined voltage range by generating an output signal having a second predetermined voltage range suitable for inputting to the CPU. The conditioning circuit means preferably includes a voltage limiting means such as for example a zener diode TRANZORB (Trademark), or metal oxide varistor placed in parallel with a photodiode of an opto coupler for clamping the voltage across the photodiode transistor to a predetermined voltage range. The signal conditioning circuit constructed according to the teachings of the invention further includes minimum voltage level activating means for insuring that a minimum voltage level is present before activation of the opto coupler.The minimum voltage level activating means includes a predetermined voltage breakdown means such as a zener diode placed in series with the photodiode of the opto coupler. The signal conditioning circuit according to the teachings of the invention further includes comparator means for processing the output signal of the opto coupler and rectifying means for rectifying any AC sensing means signals input to the signal conditioning circuit.

Brief description of the drawing: A more detailed understanding of the invention may be had from the following description of a preferred embodiment, to be studied in conjunction with the accompanying drawing wherein: Figure 1 is a schematic diagram of a signal conditioning circuit constructed according to the teachings of the invention disposed between a sensing means, and the input bus interface to a central processing unit.

Description of the preferred embodiments Referring now to the drawing, Figure 1 illustrates a signal conditioning circuit 10, constructed according to the teachings of the invention, disposed between the output of a sensing means shown generally at 12 and the input of an input bus interface shown generally at 14 which input bus interface 14 is connected to or interfaces with a central processing unit shown generally at 16 of a microprocessor or computer controller. In general, signal conditioning circuit 10 includes smoothing filter circuit 22, bridge rectifier BRI, voltage conditioning circuit 26, opto isolating circuit OPI, and comparator circuit 30.

More specifically smoothing filter circuit 22 includes terminals DH, VL, and GND which are adapted for connection respectively to the high voltage side, low voltage side, and ground of a sensing means such as that shown generally at 12. Terminal VH is connected to one side of resistor R 1, with the other side of resistor R 1 being coupled over conductor 36 to one side of a capacitor C1 and input terminal 38 of bridge rectifier BRI. Terminal VL is connected to one side of resistor R2 with the other side of resistor R2 being coupled over conductor 24 to one side of capacitor C2 and input terminal 40 of bridge rectifier BRI. The other sides of capacitor C1 and C2 are coupled over lead 34 to the ground terminal GND of smoothing filter 22.Smoothing filter 22 functions as a high pass filter to smooth out the waveform of the signal produced by sensing means 12. -.

Bridge rectifier BRI includes input terminals 38 and 40, output terminals 42 and.44, and diodes 52, 54, 56 and 58. Input terminal 38 is coupled to the anode terminal of diode 58 and the cathode terminal of diode 56. Input terminal 40 is coupled to the anode terminal of diode 52 and the cathode terminal of diode 54. Output terminal 42 of bridge rectifier 24 is connected over lead 62 to the cathode terminals of diodes 52 and 58 respectively. Likewise output terminal 44 of bridge rectifier BRI is coupled over lead 64 to the anode terminals of diodes 54 and 56 respectively. Bridge rectifier BRI functions to rectify any AC waveforms exiting smoothing filter 22 as shown generally at waveform A into their DC counterpart as shown generally at waveform B.Output terminals 42 and 44 respectively of bridge rectifier 24 are coupled over leads 62 and 64 respectively to voltage conditioning circuit 26.

Voltage conditioning circuit 26 includes voltage limiting means D1 such as for example the zener diode D1 shown in Figure 1, a MOV varistor, or alternate voltage limiting device coupled in parallel between leads 62 and 64, a series circuit of threshold voltage activation means D2, such as for example the zener diode shown in Figure 1 or an MOV varistor or other threshold voltage activation means in series with an LED light emitting diode LD1, resistor R3, and the photodiode 74 of opto isolation circuit OPI. In particular lead 62 is connected to the cathode zener diode D1 and one side of resistor R3. The other side of resistor R3 is connected over lead 66 to the anode side of photodiode 74.The cathode side of photodiode 74 is coupled over lead 68 to the anode side of light emitting diode LD1 with the cathode side of light emitting diode LD1 coupled over lead 70 to the cathode terminal of zener diode D2 with the anode side of zener diode D2 coupled over lead 64 to the anode side of zener diode Di. Voltage conditioning circuit 26 functions to ciamp the voltage of the signal waveform, exiting from bridge rectifier 24, to a predetermined range of voltage as shown in general by waveform C in Figure 1. This function of the voltage conditioning circuit 26 is provided by the voltage limiting means Dl. Voltage conditioning circuit 26 also functions to ensure that a minimum voltage level is present before activating the opto isolating circuit 28.This function of voltage conditioning circuit 26 is provided by the threshold voltage activating means D2 which may be the zener diode shown in Figure 1. Voltage conditioning circuit 26 then is input to opto isolation circuit OPI and activates opto isolation circuit OPI by means of the series circuit connection of photodiode 74 which may be for example a light emitting diode or other photodiode.

Opto isolation circuit OPI includes photodiode 74 and photosensitive transistor 76.

Photosensitive transistor 76 is electrically insulated from and photo-coupled to photodiode 74. Opto isolation circuit OPI functions to electrically isolate comparator circuit 30 from voltage conditioning circuit 26 while responding to a predetermined range of voltage signals through voltage conditioning circuit 26 by generating an output signal having a voltage within a second predetermined range.

The voltage of the second predetermined range output from photosensitive transistor 76 of opto isolation circuit OPI is determined by the value of source 80 of direct current potential represented by a battery in Figure 1 but which may be a bridge rectifier connected to a source of alternating potential, if desired. The positive terminal of source 80 is coupled over lead 82 to one end of resistor R5, while the negative terminal of source of direct current potential 80 is coupled over lead 84 to ground. The other side of resistor R5 is coupled over lead 86 to one side of resistor R6 and the collector of photosensitive transistor 76.

The other side of resistor R6 is coupled over lead 88 to one side of capacitor C3 while the other side of capacitor C3 is coupled over lead 92 to the junction of the emitter of photosensitive transistor 76, one side of resistor R4 and ground. The other side of resistor R4 is coupled over lead 94 to the base of photosensitive transistor 76.

Opto isolation circuit OPI functions to generate an output signal having a voltage within a second predetermined range, denoated by waveform D, in response to an input signal having a voltage over a first predetermined range shown generally at waveform C. The RC filter of resistors R6 and capacitor C3 functions to smooth the output from opto isolation circuit 28 shown generally at waveform D to the waveform shown generally at E. Output signal shown generally by waveform E is input by lead 88 to comparator circuit 30.

In particular, lead 88 is coupled to the inverting terminal of comparator U1 while the noninverting terminal of comparator U1 is coupled over lead 102 to the junction of one side of resistors R10 and R9 respectively. The other side of resistor R10 is coupled over lead 104 to the output terminal of comparator U1, one side of resistor Tri 1 and terminal 106 of the input bus interface shown generally at 14. The other side of resistor Tri 1 is connected to the positive terminal of a source 112 of direct current potential, respresented by a battery in Figure 1 but which may be a bridge rectifier connected to a source of alternating potential if desired. The negative terminal of direct current source 112 may be connected to ground.

In operation, a proper AC or DC voltage level must be present between terminals VH and VL of signal conditioning circuit 1 0. For AC waveforms, bridge rectifier BDR1 will rectify the AC waveform to its DC equivalent. Voltate limiting means D1 as for example the zener diode shown will limit the waveform to its appropriate zener voltage level. All excess voltage will be dissipated across resistors R1 and R2. Smoothing circuit 22, bridge rectifier BRI and voltage conditioning circuit 26 then function together to ciamp a predetermined DC voltage level across zener diode Dl. This DC voltage presence produces a continuous current which flows through the photodiode 74 of opto coupler OP 1 and the light emitting diode LD1, thereby activating both.Activating the opto coupler OP 1 switches photosensitive transistor 76 into saturation. This discharges capacitor C3 through resistor R6. When capacitor C3 voltage becomes lower than the reference voltage at the noninverting terminal of comparator Ul, the comparator Ul will produce an output. Finally, the input bus interface 14 will relay this message to the CPU 16.

Note that the input voltage to the noninverting terminal of comparator Ul must be present for the duration of the RC (resistor R6 and capacitor C3) time constant. This is an added protection against any noise spikes. Voltage threshold means which for example as shown in Figure 1 zener diode D2 is used to insure that a minimum voltage level is present before activating the opto coupler OP 1 and the light emitting diode LD1. Resistor R5 is used to charge up capacitor C3 during inactive circuit operation. Resistor R10 is used to insure that feedback hysteresis will occur, i.e. if the switch point is reached, the feedback through R10 will change the reference slightly to ensure full activation of the output.

Signal conditioning circuit 10 constructed according to the teachings of the invention has advantages over conditioning circuits of the prior art due to its ability to handle a wide range of voltage levels. The voltage limiting means 72 which for example may be zener diode D1, clamps the incoming voltage level to its appropriate zener voltage and absorbs all excess current which is not needed to activate the opto coupler OP 1 and the light emitting diode LD. The absence of this voltage clamping means during a varying or switched voltage level would either fail to activate the circuit or destroy several circuit elements. In conclusion what has been disclosed is a unique signal conditioning circuit having a voltage conditioning means for responding to an input signal having a voltage over a first predetermined range by generating an output signal having a voltage within a second predetermined range. The voltage conditioning means further insures that a minimum voltage level is present before generating an input signal to the CPU.

Claims

1. An electronic signal-conditioning-circuit for adapting a wide range of sensed input voltage and frequency signals to be admitted into a central processing unit, for sensing the status of the sensed input signal voltage, comprising: a) first interface means adapted for connection to a sensing means for relaying an output of said sensing means to a voltage conditioning circuit: b) a second interface means for relaying a signal from said voltage conditioning circuit to said central processing unit; c) said voltage conditioning means being connected between said first interface means and said second interface means for responding to an input signal of said first interface means having a voltage over a first predetermined range, to generate an output signal having a voltage within a second predetermined range.

2. The electronic circuit of claim 1 wherein the voltage conditioning circuit includes a rectifying means for rectifying AC waveforms into their DC counterparts, voltage clipping means for limiting the voltage to a predetermined value and for activating said electronic circuit only when the voltage exceeds a second predetermined value, input/output isolating means for electrically isolating the output of the voltage clipping means from the remaining portion of said electronic circuit and comparator means for generating said output signal, having a voltage within said second predetermined range.

3. The electronic circuit of claim 2 wherein the input/output isolating means includes an opto coupler having a photodiode and a photosensitive transistor and the voltage conditioning means includes voltage limiting means having a predetermined voltage clamping range disposed in parallel with said photodiode of said opto coupler.

4. The electronic circuit of claim 3 wherein said voltage limiting means includes a zener diode placed in parallel with the photodiode of said opto coupler.

5. The electronic circuit of claim 4 wherein the voltage conditioning means further includes minimum voltage threshold-level-activating means for insuring that a minimum voltage level is exceeded at the photodiode of the opto coupler before said conditioning circuit is activated.

6. The electconic circuit of claim 5 wherein the threshold voltage activating means includes a zener diode disposed in series with said photodiode of said opto coupler.