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GB2139754A - A pattern examining method - Google Patents
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GB2139754A - A pattern examining method - Google Patents

A pattern examining method Download PDF

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Publication number
GB2139754A
GB2139754A GB08411625A GB8411625A GB2139754A GB 2139754 A GB2139754 A GB 2139754A GB 08411625 A GB08411625 A GB 08411625A GB 8411625 A GB8411625 A GB 8411625A GB 2139754 A GB2139754 A GB 2139754A
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GB
United Kingdom
Prior art keywords
pattern
scanning
examined
reflection
reference pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08411625A
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GB2139754B (en
GB8411625D0 (en
Inventor
Tatsunosuke Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dainippon Screen Manufacturing Co Ltd
Original Assignee
Dainippon Screen Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dainippon Screen Manufacturing Co Ltd filed Critical Dainippon Screen Manufacturing Co Ltd
Publication of GB8411625D0 publication Critical patent/GB8411625D0/en
Publication of GB2139754A publication Critical patent/GB2139754A/en
Application granted granted Critical
Publication of GB2139754B publication Critical patent/GB2139754B/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0269Marks, test patterns or identification means for visual or optical inspection
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956Inspecting patterns on the surface of objects
    • G01N21/95607Inspecting patterns on the surface of objects using a comparative method
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/161Using chemical substances, e.g. colored or fluorescent, for facilitating optical or visual inspection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/163Monitoring a manufacturing process

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  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Length Measuring Devices By Optical Means (AREA)

Abstract

To detect defects in a pattern 12 which comprises two areas 1 and 2 having different reflection or transmission coefficients (e.g. a printed circuit), picture signals obtained by photoelectrically scanning the pattern are compared with those from a reference pattern and areas 13 which have no significance to the function of the pattern are excluded from the comparison by the use of a material having a further different reflection or transmission coefficient. Thus areas 13 of the reference pattern or of an auxiliary pattern are painted with black or white paint and their picture signals are digitised using two thresholds and stored for later comparison with patterns under examination. <IMAGE>

Description

SPECIFICATION A pattern examining method The present invention relates to a method for examining a pattern whether configuration of the pattern formed on a plane coincides with that of formed on the reference pattern, and particularly, to a method for judging quality of the pattern to be examined by comparing only necessary portions of the pattern, wherein if, in the pattern, there are included some portions which need not coincide with the corresponding portions of the reference pattern, they are automatically excluded from objects to be examined.
As well-known, a printed-circuit substrate (hereinafter, refere to substrate) is widely applied to electronic instruments, mechanism etc. and is generally, as shown in Figure 1, manufactured by forming a wiring pattern 2 made of copperfoil on the surface of an insulating substrate 1.
In usual case at the periphery of the insulating substrate 1 surrounding the wiring pattern 2, frequently there is provided a grounding frame 3 comprising copper foil having been used to ground an electric circuit. Marks, characters, etc. 4 which designate such as model number, name of manufacturer, apparatus to which the printed-circuit substrate is applied, positions at which it is disposed etc.
are represented. Further, there are some cases in which desired marks, characters, etc. 4 are made same as the wiring pattern 2 by copper foil and represented onto portions in the inside of the grounding frame 3 to which electronic components such as ICs, resistors, etc. are connected.
To manufacture the above described substrate, in general, onto an insulating plate on which copper foil is stuck a photoresist is applied, and after a desired pattern having been printed and developed, the substrate is completely formed by etching. The other way to make the substrate is as follows; that is, printing a desired pattern on the surface of copper foil by a resist-agent according to the screen process printing method, and after having dried, etching process is to be applied to complete the substrate.
However, even basing upon either of the abovementioned cases, sometimes there are cases in which parts of the wiring pattern 2 are lacked by resulting from the resist on the substrate and for adjacent pattern lines may be short-circulated, because of partical lack of the resist stickings of remained excessive resist agent, inadvertency for handling the same etc. Accordingly, prior to enter into etching process, it is necessary to examine whether the wiring pattern formed on the substrate by the resist is precisely same as the original drawing or not.
However, objects needed to be examined may be limited only to portions of the electronic circuit, and connecting terminals, characters, marks etc. of the grounding frame 3 have scarecely any relation with circuits, so that even if function as electronic there are any defects in those portions, usually, these defects do not result in causes of defriciencies of the substrate. Thus, if there are such defects as give influences on electronic parts of the substrate, they can easily found the visual.
The invention seeks to provide a method for examining a pattern which is carried out, for example, in printed-circuit substrate manufacturing process, in which rejections for non-essential faults are reduced or eliminated.
According to the present invention there is provided a pattern examining method for detecting defects of a pattern to be examined by comparison with a reference pattern comprising areas each having first and second reflection or transmission coefficients characterised by covering a desired area of the reference pattern with a material having a third, different, coefficient and excluding said covered area from the examination by arranging for a detecting signal corresponding to said third reflection or transmission coefficient to prevent comparison taking place.
The invention will be described further, by way of example, with reference to the accompanying drawings, in which: Figure 1 is front view of essential parts of the conventional reference substrate.
Figure 2 is a front view of essential parts of a substrate to be examined.
Figure 3 is a principle view of the method of the present invention.
In Figure 4a is a view of waveshape of outputs of signals which scanned the essential part of the reference substrate shown in Figure 1 obtained by the examining means shown in Figure 3 and Figure 46 is a view of waveshape of outputs of signals which scanned the essential part of the substrate to be examined.
Figure 5 is a front view of the essential parts of the reference substrate concerning to the method of the present invention.
Figure 6 is a view of waveshape of outputs of signals which scanned the essential part of the reference substrate.
Figure 7 is an explanatory view of setting of a slice level for reading a wiring pattern and a high brightness area.
Referring to accompanying drawings, hereinafter the present invention will be described in detail basing on a preferred embodiment.
Figure 3 is an explanatory view of the principle of an embodiment by which a method according to the present invention is practised.
In the drawing the reference number 5 in Figure 1 is a substrate providing a fault-free reference pattern, and the number 6 designates a substrate to be examined. Each of images on respective scanning lines (18 and 18') on each of the substrates is projected and focused onto respective line image sensors (for example, such a CCD array sensor etc.) by each of lenses 15 and 15'.
In the case of there being any defects on the scanning line 18' for the substrate 6 to be examined, for example, to the reference substrate shown in Figure 1 when there are defects 9, 10 and 11 on a scanning line A of the pattern of the substrate to be examined shown in Figure 2, each of the outputs of the line image sensors 16 and 17 as shown in Figure 4, and if there are any portions 9a, 10a, 11a at which any defects exist both signals do not coincide with each otherthereat.
Accordingly, those defective portions can be easily detected by comparing each of the outputs of calls arranged on the line image sensor 16 with that of the respective corresponding ones arranged on the line image sensor 17.
All defects on the whole surface of the substrate 6 to be examined can be detected by moving the substrates 5 and 6 in the direction shown by an arrow synchronously and by comparing an output signal of the line image per each constant pitch with that of the corresponding line image sensor 17, quite same manner as mentioned above.
Further, in Figure 4a level B designates an output level of a portion of the resist (hereinafter, refer to picture image part), and a level C represents an output level of a portion at which copperfoil is exposed (hereinafter, refer to non-picture image part). By setting up a slice level L between those levels B and C. the picture image part and the non-picture image part can be output in binary coded form.
Next, descriptions will be made in detail regarding the chief object of the method of the present invention, that is, to eliminate those portions which are unnecessary to be examined because of their having no relation therewith from the objects.
In Figure 5 there is shown a reference substrate 12 which is to be used substituting for the substrate 15 shown in Figure 1 of the present invention, in which, for example, white paint is painted to make a high brightness area 13 having remarkably higher reflection coefficient than any of those of the picture image part and the non-picture image part.
In Figure 6, there are shown levels of output signals which are obtained when the reference substrate 12 having the high brightness area 13 is scanned, and the level of the high brightness area 13 is obtained as the highest output level D.
Accordingly, as shown in Figure 6, at the latter stage of output of the line image sensor 16 shown in Figure 3 a comparator (not shown) is provided. The threshold level of the comparator is set up as a level S which is between the output level B of the picture image part and that of D of the non-picture image part. Basing upon output signals obtained from the comparator, a signal regarding only the high brightness area 13 is generated. The signal is utilized to judge whether the slice level S, i.e., the threshold level, is larger or smaller than the output of the line image sensor 16.When it is detected that the output of the line image sensor 16 is larger than the slice level S, even if there is difference between the output levels of two line image sensor 16 and 17, if a logic circuit is composed so that it may not judge the result as there being something wrong therein, the high brightness area 13 can be excluded from the objects to be examined. As described the above, according to the method of the present invention, it is possible to exclude inconvenience caused by regarding products having defects at the portions which have no relation with the function of the printed-circuit substrate and giving no influence on the function thereof as to be defective ones by a extremely simple method.
According to the above-described embodiment, two sets of photoelectrically scanning means of identical construction are required, but as described hereunder, with one set of scanning means the method of the present invention can be practised.
Portions to be examined of a faultless substrate are painted with a white apinting to make a high brightness area(s), as described above. Thus manufactured reference substrate is scanned to output two dimensional picture image signals comprised of wiring pattern sliced by the level Land the high brightness area which is also sliced by the level S in binary systems, and thereby are stored in memories such as an IC memory or the like in bit image from itself or in suitably coded form.
Next, the substrate to be examined is scanned by the same scanning means, and sequently output signal from each of cells of the line image sensor is compared with respective signals of the corresponding portions of the reference substrate stored in the memory to detect faults. Thus, by only one scanning means the method of the present invention can be corrected out.
According to the present invention only one scanning means is required, so that in comparison with the case in which two sets of scanning means are used, no adjusting operation for coinciding characteristics of two photoelectric scanning means is required. Accordingly, facilitation of handling the means is achieved, and thus it is possible to improve stability of the method and precision of detecting deficities of substrate.
In addition when the method ofthe present invention is performed by one scanning means as described the above, if both of the wiring pattern and the high brightness area are read out by one photoelectrical scanning of the substrate, as shown in Figure 6, two slice levels S and L must be set up in dynamic range of the line image sensor 16. Accordingly, in dynamic range of linear characteristics of the line sensor 16, portion (noise margin) used for reading out the wiring pattern is reduced, and precision of reading out lowers to that extent.
To eliminate the afore-mentioned disadvantages there are some ways as desceribed hereinafter, that is, one of them is that when photoelectrical scanning is carried out onto the reference substrate, the wiring pattern and the high brightness area are read separately by twice scanning operations, respectively, and as shwon Figure 7, intensity of light emitting the substrate in each of scannings is varied; and other way is to enlarge a desired level non-linearly by using an optical filter etc. or by setting up the slice level on the optimum position in dynamic range by compressing disused level, the noise margin is enlarged. Further, the same operation can be performed by a non-linear analog amplifier.
To separately carry out reading out the wiring pattern and the high brightness area has, in partical working other advantages. That is, instead of painting white paint to the reference substrate, a sheet in a desired area of which a paint of different brightness from that of the sheet itself is prepared, and by photoelectrically scanning it instead of the reference substrate, substantially equal to that of the high brightness area can be output.
According to the method, painting the reference substrate with a paint is not required, therefore, it is advantageous points of the method that the reference substrate can be used as a product, and failure in painting can be easily amended.
Heretofore, regarding concrete embodiment of the present invention and some modifications thereof have been described, further, we would like to disclose several applications of the present invention.
In the foregoings it has been explained that a portion not to be examined, that is, the portion at which nothing interfere with it is covered with the paint having higher reflection coefficient that any of those used in the picture image part and the non-picture image part. However, by using other paint having lower reflection coefficient (for example, black paint), the method according to the present invention can be practised. Further, instead of painting the paint to the portions not to be examined, a level having approximate reflection coefficient may be stuck and/or covered with a mask.
In the above described embodiment are given that reflection coefficient of the picture image part is larger than that of the non-picture image part, however, according to differences in kind of resists to be used, means for illumination etc., there may be an inverse relation between them, and in even such a case the method according to the present invention can be applied.
An example in which the line image sensor is used as a photoelectrical scanning means is described in the above, but instead of this, it may be also practised that well-known laser light beam is used to scan the surface of the substrate by using a polygon mirror (rotary polyhedral mirror) or galvanic mirror (vibratory mirror), and reflected by photoelectrical elements.
Comparing the light beam scanning method with that of using the above described line image sensor, it can be found that a reason of laser light being a single color light degree of freedom for selecting a color of the optimum wavelength to the color of the resist film is small. This is a disadvantage of the light beam scanning method. With the above reason the scanning method by the line image sensor is deemed to be more preferable one.
Heretofore, descriptions have been given to the pattern examination which is carried out after painting the resist on the substrate and drying it during manufacturing process (in the case of painting photo-resist, after exposed and developed), but prior to etching process. But even examinations after etching and film stripping processes may be also applied to the method of the present invention.
However, though in this case even there is an advantage that defects resulted from etching and/or stripping processes can be detected, usually it is impossible to use the substrate having been amended defect thereof, and on the surface of the substrate there are unevenness, so that disadvantage of lowering precision in examination can not be avoided.
As described the above in detail, the method of the present invention is to provide an improved method for rising efficiency of examining pattern by excluding those portions which give no influence on the function of the substrate, even if they do not coincide with those of the reference pattern from objects to be examined in the method for judging quality of an irregular pattern such as a printed-circuit substrate by comparing differences between the irregular pattern and the reference pattern. Accordingly, the method of the present invention can be widely applied not only to the method of examination of wiring pattern of the embodiment of the printedcircuit substrate as described above, but also applied to usual pattern examining methods, for example, such as a method for examining an opaque pattern on a transparent substrate etc.

Claims (6)

1. A pattern examining method for detecting defects of a pattern to be examined by comparison with a reference pattern comprising areas each having first and second reflection or transmission coefficients, characterised by covering a desired area of the reference pattern with a material having a third, different, coefficient; and excluding said covered area from the examination by arranging for a detecting signal corresponding to said third reflection or transmission coefficient to prevent comparison taking place
2. A pattern examining method according to claim 1, wherein the material having the third reflection coefficient is a white or black paint by which said desired area in the reference pattern is painted.
3. A pattern examining method according to claim 1,wherein an area corresponding to the desired area in the reference pattern of a transparent sheet and a mask painted with a paint having the third reflection coefficient are alignedly overlapped on the reference pattern to be scanned.
4. A pattern examining method according to any of claims 1 to 3, wherein a picture image signal obtained by scanning the reference pattern photoelectrically is stored in a memory means, the pattern to be examined is photoelectrically scanned by the same scanning means, then by reading out the picture image signal stored in said memory means in synchronism with scanning of the pattern to be examined, said picture image signal is compared with the pattern to be examined.
5. A pattern examining method for detecting defects of a pattern comprising two areas having two kinds of different reflection coefficients or transmission coefficients by comparing picture signal obtained by scanning said pattern photoelectrically with that obtained by scanning a reference pattern comprising two areas having two kinds of different reflection coefficients or transmission coefficients characterized in that; ; an auxiliary pattern formed from an area cores ponding to a desired area of the reference pattern so that it may have reflection or transmission coefficient different from that of auxiliary pattern itself is scanned separately with the photoelectrical scanning of said reference pattern and the pattern to be examined, and said desired area is excluded basing on the scanning signal obtained from the area corresponding to the desired area of said reference pattern.
6. A pattern examing method substantially as hereinbefore described with reference to and as illustrated in Figures 3 to 7 of the accompanying drawings.
GB08411625A 1983-05-11 1984-04-08 A pattern examining method Expired GB2139754B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8095483A JPS59206705A (en) 1983-05-11 1983-05-11 Inspection of pattern

Publications (3)

Publication Number Publication Date
GB8411625D0 GB8411625D0 (en) 1984-06-13
GB2139754A true GB2139754A (en) 1984-11-14
GB2139754B GB2139754B (en) 1986-10-15

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GB08411625A Expired GB2139754B (en) 1983-05-11 1984-04-08 A pattern examining method

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JP (1) JPS59206705A (en)
DE (1) DE3416919A1 (en)
FR (1) FR2551210A1 (en)
GB (1) GB2139754B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0231941A3 (en) * 1986-02-05 1988-03-02 Omron Tateisi Electronics Co. Method for inspection of printed circuit board assembly method for inspection of printed circuit board assembly by arithmetic comparison of several pictures in differenby arithmetic comparison of several pictures in different colours t colours
GB2258039A (en) * 1991-05-04 1993-01-27 Heidelberger Druckmasch Ag Controlling the print quality of printed products
GB2485337A (en) * 2010-11-01 2012-05-16 Plastic Logic Ltd Method for providing device-specific markings on devices

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61228302A (en) * 1985-04-01 1986-10-11 Yanmar Diesel Engine Co Ltd Detection device
JPS63191041A (en) * 1987-02-03 1988-08-08 Komori Printing Mach Co Ltd Concentration measurement positioning method
US6529621B1 (en) * 1998-12-17 2003-03-04 Kla-Tencor Mechanisms for making and inspecting reticles

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1327523A (en) * 1970-06-15 1973-08-22 Ibm Apparatus for detecting defects by optical scanning

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3969577A (en) * 1974-10-15 1976-07-13 Westinghouse Electric Corporation System for evaluating similar objects
JPS5413750A (en) * 1977-07-02 1979-02-01 Hokuriku Elect Ind Function voltage divider using resistors

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1327523A (en) * 1970-06-15 1973-08-22 Ibm Apparatus for detecting defects by optical scanning

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0231941A3 (en) * 1986-02-05 1988-03-02 Omron Tateisi Electronics Co. Method for inspection of printed circuit board assembly method for inspection of printed circuit board assembly by arithmetic comparison of several pictures in differenby arithmetic comparison of several pictures in different colours t colours
GB2258039A (en) * 1991-05-04 1993-01-27 Heidelberger Druckmasch Ag Controlling the print quality of printed products
GB2485337A (en) * 2010-11-01 2012-05-16 Plastic Logic Ltd Method for providing device-specific markings on devices

Also Published As

Publication number Publication date
JPS59206705A (en) 1984-11-22
FR2551210A1 (en) 1985-03-01
DE3416919C2 (en) 1987-07-02
DE3416919A1 (en) 1984-11-29
GB2139754B (en) 1986-10-15
JPH033884B2 (en) 1991-01-21
GB8411625D0 (en) 1984-06-13

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 19950408