GB2147159A

GB2147159A - Power converter

Info

Publication number: GB2147159A
Application number: GB08423475A
Authority: GB
Inventors: Mohammed Abdelmoneim Helal
Original assignee: Minitronics Pty Ltd
Current assignee: Minitronics Pty Ltd
Priority date: 1983-09-19
Filing date: 1984-09-17
Publication date: 1985-05-01
Also published as: WO1985001400A1; AU3430584A; ZA847317B; GB8423475D0; FI852011A7; DK220985D0; NZ209570A; DK220985A; EP0156846A4; JPS61500045A; FI852011L; GB2147159B; IT8448872A0; BR8407088A; EP0156846A1; FI852011A0; IT8448872A1; IT1179431B; AU567769B2; IN162395B

Abstract

A converter which converts mains frequency electrical power into a higher frequency power, which is more desirable for driving gas discharge lamps. The converter comprises a half-bridge inverter (Q1 and Q2) connected across a filter capacitor (C3) of a filtered, rectified supply, which is effectively isolated from the rectifier (D1-D4) at mains frequency by isolating diodes (D5, D6) which are reverse biased for the majority of the mains frequency cycle, when the filter capacitor (C3) is fully charged. The isolation diodes (D5, D6) are bypassed by capacitors (C4, C5) at the switching frequency of the inverter such that a proportion of the inverter output current is drawn directly from the supply rather than from the filter capacitor (C3). The return path for the inverter output current is via the AC divider network (C1, C2). An inductance L1 is provided to limit current to the lamp (P), while a capacitor (C6) is provided in series with the heaters of the lamp (P) to provide a heating current during starting. According to another feature of the invention, a switching regulator is provided wherein a switching regulator control circuit (SRCC) drives the Switching element (Q2) of a switching regulator circuit and the frequency of the output of the Switching Regulator Control Circuit (SRCC) is controlled to maintain the output voltage (M) of the switching regulator at a substantially constant level, while the pulse width of the output from the Switching Regulator Control Circuit (SRCC) is controlled in response to the instantaneous rectified supply voltage (N) such that the current (I) drawn by the regulator is substantially sinusoidal.

Description

SPECIFICATION Minimization of harmonic contents for mains operated solid state inverters driving gas discharge lamps The present invention reiates to solid state ballasts for flourescent and gas discharge lamps, and in particular the invention provides a ballast wherein the current drawn from the mains has a reduced harmonic component when compared to prior art ballasts.

It is a common practice to use transformers to provide power for electronic circuits from the mains supply. This method provides isolation, good regulation, protection from sudden mains fluctuations, and small harmonic distortion in the voltage waveform associated with the waveform of current drawn from the supply. The disadvantages of using transformers in high power application is reflected in their size, weight and winding losses, and for these reasons users often elect to operate directly from the mains supply without employing a transformer.

Where the peak mains potential is adequate for the required application, it is not unusual to obtain a D.C. supply by full wave rectification of the mains with a filter capacitor connected across the rectified supply to reduce ripple. With this arrangement the capacitor charges only when the peak mains voltage exceeds the capacitor voltage, resulting in a large current surge into the capacitor at each peak of the mains voltage. The resulting mains current is a series of pulses separated by equal intervals, and these sudden surges in current tend to distort the sinusoidal shape of the mains voltage, increasing the harmonic content of the supply, and resulting in a poor power-factor.A large magnetic choke placed before the full wave bridge can be used to filter out the higher harmonics of the current pulses while passing the fundamental component, however, such a choke introduces losses and is bulky.

A more practical approach is to use the full portion of the fully rectified mains voltage, for charging the capacitor. This can be achieved by using a switching regulator, in which case the current is distributed over a full cycle and is sinusoidal, and with this type of circuit it is possible to produce an output voltage which is higher than the peak input voltage.

The circuit of the present invention combines the function of a switching regulator with a half-bridge inverter to form a solid state ballast for fluorescent and HID lamps.

The disadvantage of each of the circuits described above is that the voltage across the load is essentially D.C., whereas the efficiency of fluorescent and gas discharge lamps increase with higher supply voltage frequencies and therefore an advantage can be gained by using an inverter to drive such lamps.

According to a first aspect, the present invention consists in a power converter, including rectification means to convert an alternating supply potential into a rectified supply potential, and inverter means connected across said rectified supply potential, said inverter means comprising an a.c. divider network having an output which substantially remains at a potential proportional to the rectified supply potential, a half-bridge switching circuit having an output from which alternating potential is produced, said alternating potential having a frequency substantially higher than that of the supply potential, said switching circuit being coupled across the rectified supply potential at the frequency of said alternating potential but substantially isolated from the rectified supply potential at the frequency of the supply potential, storage means being connected across the switching circuit to maintain a substantially d.c. potential across the switching circuit thereby ensuring that said alternating potential is substantially constant in amplitude, the switching circuit output and the a.c. divider output defining respective sides of the output of said inverter means.

The present invention also provides a solid state ballast which incorporates the power converter defined above.

According to a second aspect, the present invention consists in a switching regulator comprising rectification means to convert an alternating potential of an electrical supply into a rectified supply potential, an inductor and switching element connected in series across the rectified potential, a diode, the anode of which is connected to the junction of the inductor and the switching element and the cathode of which defines the output of the regulator, and storage means being connected across the regulator output, the switching element being controlled by a pulsed switching signal provided by a switching control circuit, the pulsed signal having a frequency which is controlled to increase with decreasing voltage at the regulator output, said regulator being characterised in that a parameter of the pulse signal is varied in response to the instantaneous rectified supply potential to control the waveform of the current flowing from the supply.

In one embodiment of the invention the pulse width is controlled to be inversely proportional to the input voltage and the frequency is proportional to the error in the output voltage, while in another embodiment the pulse width is constant and the frequency is proportional to both the input voltage and the output error voltage.

Embodiments of the invention will now be described by way of example with reference to the accompanying drawings in which: Figure 1 illustrates the circuit schematic of a first embodiment of the invention; Figure 2 graphically illustrates the current drawn by the circuit of Fig. 1 when capacitor C3, is chosen to be too large; Figure 3 graphically illustrates the current drawn by the circuit of Fig. 1 when capacitor C3, is correctly chosen; Figure 4 schematically illustrates a switching regulator according to a second form of the invention; Figure 5 illustrates several waveforms representing signal levels in the circuit of Fig. 3 for (a) high and (b) reduced load conditions when both the pulse width and frequency are controlled; Figure 6 illustrates similar waveforms to those of Fig. 5 (a) and (b) for a system where only the pulse frequency is controlled;; Figure 7 schematically illustrates the regulator of Fig. 4 in greater detail; and Figure 8 schematically illustrates another embodiment of a regulator made in accordance with the present invention.

Referring to Fig. 1, a solid state ballast of the present invention includes a bridge rectifier D1-D4 connected to the mains supply to produce a full-wave rectified voltage waveform between the points B and C. A capacitor C3, is connected between the points B and C via a pair of diodes D5 and D5, such that the capacitor C3, is isolated from the points B and C except when the voltage VBC across these points exceeds the voltage across C3. The voltage VDF across C3, is substantially constant with a small ripple due to the discharging of the capacitor C3 between the peaks in VBC and the recharging of the capacitor C3 when VBC approaches its peak value.

A half bridge inverter circuit is connected between the points B, C, D and F and comprises a pair of capactiors C1 and C2 which form an AC voltage divider, and a pair of transistor switches Q, and Q3 which alternately switch on to apply either the potential at point D or that at point F to point A. The AC divider is arranged to produce a voltage VEC between points E and C which is substantially equal to 1/2 VBC, and as a result, the voltage VAE which forms the output of the inverter is a square wave having a peak to peak voltage swing equal to VDF and the average value of said square wave being modulated by the voltage-Vc.

Each of capacitors C4 and C5, which are connected respectively across diodes D5 and D6 provides a high frequency bypass around its respective diode such that points D and F are isolated from points B and C by the diodes D5 and D6 at the ripple frequency of VBC but are connected via C4 and C5 at the switching frequency of the transistors Q1 and Q2. In the preferred embodiment, the switching frequency is 25 KHz, however, the value of this frequency is not essential to the operation of the circuit.

The inverter circuit also includes diodes D7 and D8 which prevent the voltage VBE between points B and E and the voltage VEC between points E and C from becoming negative in value by more than one diode voltage drop, while diodes Dg and D10 serve to protect Q, and Q2 from voltage polarity reversals between points D and A, and A and F respectively.

In operation the inverter output current flowing between points A and E is drawn, predominantly, from the mains via C4 and C5 each of which have a low impedance at the inverter switching frequency. Capacitor C3, which is an electrolyte capacitor, serves to maintain a substantially constant potential between the points D and F. The values of capacitors C3, C4 and C5 are chosen to suit the output load connected to the circuit and are selected such that the current drawn from the supply approaches a sinosoidal waveform.

Referring to Fig. 2, when C3 is chosen to be too large the current drawn from the mains supply will have a sharp peak 10 during the period when capacitor C3 is charging. When C3 is chosen to be too large, the fall in capacitor voltage due to discharge through the inverter load is so small that the diodes D5 and D5 are only forward biased for a brief period at each peak of the full-wave rectified voltage VBC. As a result, the capacitor C3 must fully charge during this brief period, and as a larger capacitor will have a lower impedance the capacitor will be capable of charging at a sufficiently high rate to create a large peak in the current drawn from the supply.

During the period when C3 is not charging, inverter output current is drawn from both the mains supply and from C3 such that the current drawn from the mains has a substantially sinusoidal waveform 11 and, referring to Fig. 3, when C3 is correctly chosen the capacitor charging current 10 will not seriously affect the sinusoidal shape of the current waveform.

When C3 is chosen to be too small the voltage VDF will have excessive ripple, resulting in unacceptable variations in the peak to peak value of the square wave component of inverter output voltage VAE which in turn causes flicker in the light output at the lamp.

Returning to Fig. 1, the inverter load comprises inductor L1, capacitor C6 and a fluorescent lamp P. Capacitor C6 and inductor L1, have values which are chosen to allow the combination to resonate at the inverter switching frequency. During the period before the lamp strikes, current flows through the capacitor C6 via both heater elements of the lamp and the voltage across C6 will reach a peak value which allows the tube to strike. After the striking of the tube, the capacitor C6 is bypassed by the tube and the inductor L1, serves to limit the current through the tube.

When the circuit of the present invention is employed to drive fluorescent or gas dis charge lamps, dimming of the lamp is readily achieved by reducing the supply voltage to the rectifier D1-D4.

Fig. 4 illustrates a circuit operated directly from the mains to produce a constant output d.c. voltage, and which can be used to supply the inverter for fluorescent lamps. The circuit of Fig. 4 draws a substantially sinusoidal current from the mains supply.

With reference to Fig. 4, the mains voltage is fully rectified via diode bridge D21-24. A switching regulator current control (SRCC) circuit produces pulses with period inversely proportional to the amplitudes of the full wave voltage and the frequency proportional to the output current drawn by the load 26.

Transistor Q21 is driven as a switch via the oscillator (SRCC and resistor R2,) so that when it is "ON", diode D25 is reverse biased, and current in the inductor L10 rises linearly storing energy that is equal to 1/2 Ll2 where L = inductance of L2, I = peak current in the inductor L2, As Q2, switches "off", this stored energy is released via diode D25 charging capacitor C2,.

A series of such pulses will maintain the capacitor charge, hence the load voltage across the capacitor to a value that is above the peak full wave voltage Vp, hence diode D26 is always non-conductive when Q21 is in the "ON" state.

The driving oscillator circuit (SRCC) monitors the D.C. voltage across the load via feedback line M, and adjusts its frequency accordingly to regulate the voltage, according to the load requirements. Delivered output is proportional to the regulator frequency.

Stored energy in coil L21 is proportional to the duration of the driver pulse and the amplitude of the applied voltage. Since amplitude of the input voltage varies as a full-wave, the switching pulse width is chosen to be larger during the initial portion of the full-wave and is reduced with increasing input voltage, throughout the full cycle, see (Fig. 5.). It should be noted that changing the number of pulse trains within a cycle does not affect the relationship of pulse width to the amplitude of the input voltage.

An alternative choice in switching may be adopted whereby the pulse width is kept constant and only the pulse frequency varied, the number of pulses delivered during the initial portion of the full wave being large, but decreasing in inverse porportion to the amplitude of the full wave. This is illustrated in Fig.

6. The power delivered to the load can be altered by altering the total number of pulses within each cycle.

Referring now to Fig. 7, the design of a pulse width modulated switching regulator will be discussed in greater detail. IC, is used as an astable multi vibrator where the duration of each output pulse is determined by the time taken for capacitor C33 to charge, this charging time being controlled by the series resistor combination R43, R44 and transistor Q33 which is driven directly from the fully rectified wave at node G, via resistor R38. To correct for the phase shifting effect of the signal at node J, due to base-emitter junction capacitance of Q33, a series network consisting of R37, C3, is put in parallel with R3s.

Thus, as the voltage at node K approaches the 2/3 Vcc value, the voltage at node L stays near Vcc. When the threshold voltage is reached at node K, it is detected by the internal comparator of the 555 I.C., which in turn forces voltages on pins 3 and 7 to zero.

Diode D37, prevents capacitor C33 from discharging through pin 7, while currents through resistors R43 and R44 are returned to the supply ground via the pin 7. Transistors Q3, and Q32 determine discharge rate of the capacitor C33, which determines the time interval between each of the output pulses on pin 3. Two feed back networks monitor the d.c.

voltage at node M.

One such network consists of R31, R33 and D36 providing a "fast" response, while the other consists of R32, R34, R35 and C36 providing a "slow" response. Slow variations of the d.c. voltage on node M are monitored by the latter network consisting of C36, R32 R34 and R36, so that an increase in Vdc effectively drives Q31 further into the "ON" state. At the same time, transistor Q32 is driven into the "off" state, increasing the discharge rate of capacitor C33, which reduces the frequency of the inverter, and Vdc is reduced accordingly to a steady value.

Sudden variations in Vdc can be expected such as when the load is removed. The network consisting of R31, R33 and D35 monitors such disturbances and regulates Vdc accordingly.

R46 and D36 ensure that Q32 is "OFF" while signal on pin 3 is "high", thus the charging period of C33 is made totally independent of the discharge period.

Q34, L31 and D36 step up the full-wave at node G into the required dc voltage according to the signal on node L of the system described.

The need for a "slow" feed back network arises from the ripples present on Vdc Such ripples are caused by variations in the intensity of energy delivered to the capacitor C36 during each cycle, and would be considered as small variations in Vdc by the feedback sensor transistors, Q31 and Q32, resulting in distortion of the mains current. To avoid this condition capacitor C36 smoothes out the ripple content of the feed back signal, therefore allowing a uniformly symmetrical mains current to be drawn.

Turning now to Fig. 8, the hard wired Switching Regulator Current Control Circuit is replaced by a Microprocessor based SRCC circuit wherein the modulation voltage VN and the feedback voltage VM are connected to the inputs-of an analog to digital convertion (ADC) 101 which allows these signals to be monitored by the Micoprocessor P) 1 02. The microprocessor 102 calculates the required pulse width and frequency parameters and uses these to control the Pulse Width Modulator (PWM) 103 in order to produce the SRCC output signal V, which drives transistor Q55 via resistor R66.

The processor is also provided with a serial I/O communications port D6 which can be used to remotely control the SRCC while various other control voltage inputs and control I/O circuits are provided to enable flexible usage of the regulator.

As the input current of the circuit of Fig. 8 is determined by the program contained in the microprocessor 102, this circuit lends itself to applications where "shaping" of the input current is required. Under these circumstances the system can be programmed to "consume" only the desired portions of the mains cycle, hence any current shape can be produced over a part or all of the mains cycle.

It will be recognised by persons skilled in the art that numerous variations and modifications may be made to the invention as described above without departing from the spirit or scope of the invention as broadly described.

Claims

1. A power converter, including rectification means to convert an alternating supply potential into a rectified supply potential, and inverter means connected across said rectified supply potential, said inverter means comprising an a.c. divider network having an output which substantially remains at a potential proportional to the rectified supply potential, a half-bridge switching circuit having an output from which an alternating potential is produced, said alternating potential having a frequency substantially higher than that of the supply potential, said switching circuit being coupled across the rectified supply potential at the frequency of said alternating potential but substantially isolated from the rectified supply potential at the frequency of the supply potential, storage means being connected across the switching circuit to maintain a substantially d.c. potential across the switching circuit thereby ensuring that said alternating potential is substantially constant in amplitude, the switching circuit output and the a.c. divider output defining respective sides of the output of said inverter means.

2. The power converter of claim 1 wherein the storage means is a capacitor which is charged from the rectified supply potential via a pair of diodes, said diodes being predominantly reverse biased once the capacitor has been charged to a value equal to a peak of the rectified supply potential.

3. The power converter of claim 2 wherein said high frequency coupling for the switching circuit comprises a capacitor connected across each of said diodes.

4. The power converter of claim 3 wherein the a.c. divider network comprises a pair of capacitors of equal valve connected in series, the point of connection between the capacitor being the divider output.

5. The power converter of claim 4 wherein the switching circuit comprises a pair of NPN transistors connected in series, the collector of a first of the transistors being connected to the positive side of the storage means, the emitter of the second transistor being connected to the negative side of the storage means and the emitter of the first transistor being connected to the collector of the second transistor to form the switching circuit output.

6. The power converter of claim 5 wherein a diode is connected in series with the emitter of each transistor.

7. A solid state ballast comprising a power converter as claimed in any one of claims 1 to 6 and current limiting means connected to the ouput of said converter to limit current flowing through a gas discharge lamp, when it is connected across said converter output.

8. A solid state ballast as claimed in claim 7 wherein the current limiting means comprises an inductance connected in series with said lamp.

9. A solid state ballast as claimed in claim 8 wherein starter means are provided to heat the electrodes of said lamp.

10. A solid state ballast as claimed in claim 9 wherein the starter means comprises a capacitor connected between the heaters of said lamp such that the heaters and said capacitor are connected in series across the converter output.

11. A switching regulator comprising rectification means to convert an alternating potential of an electrical supply into a rectified supply potential, an inductor and switching element connected in series across the rectified potential, a diode, the anode of which is connected to the junction of the inductor and the switching element and the cathode of which defines the output of the regulator, and storage means being connected across the regulator output, the switching element being controlled by a pulsed switching signal provided by a switching control circuit, the pulsed signal having a frequency which is controlled to increase with decreasing voltage at the regulator output, said regulator being characterised in that a parameter of the pulse signal is varied in response to the instantaneous rectified supply potential to control the waveform of the current flowing from the supply.

1 2. The regulator of claim 11 wherein the frequency of said pulsed signal is decreased with increasing instantaneous rectified supply potential.

1 3. The regulator of claim 11 wherein the pulse width of said pulse signal is decreased with increasing instantaneous rectified supply potential.

14. The regulator of claim 11, 12 or 1 3 wherein the switching control of circuit is a voltage controlled oscillator.

15. The regulator of claim 11, 12 or 13 wherein the switching control circuit comprises a microprocessor, a pulse generating circuit controlled by said microprocessor circuit and an analog to digital converter connected to the microprocessor to convert signals representing the regulator output voltage and the rectified supply potential into digital signals which are then used by the microprocessor to determine the required output of pulse generating circuit.

16. A power converter constructed and arranged to operate substantially as herein described with reference to and as illustrated in the accompanying drawings.