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GB2178683A - Improved semiconductor die-attach method and product - Google Patents
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GB2178683A - Improved semiconductor die-attach method and product - Google Patents

Improved semiconductor die-attach method and product Download PDF

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Publication number
GB2178683A
GB2178683A GB08614592A GB8614592A GB2178683A GB 2178683 A GB2178683 A GB 2178683A GB 08614592 A GB08614592 A GB 08614592A GB 8614592 A GB8614592 A GB 8614592A GB 2178683 A GB2178683 A GB 2178683A
Authority
GB
United Kingdom
Prior art keywords
alloy
tin
soft solder
antimony
preform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB08614592A
Other versions
GB8614592D0 (en
Inventor
David A Solomon
Subbarao Pinamaneni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of GB8614592D0 publication Critical patent/GB8614592D0/en
Publication of GB2178683A publication Critical patent/GB2178683A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/20Conductive package substrates serving as an interconnection, e.g. metal plates
    • H10W70/24Conductive package substrates serving as an interconnection, e.g. metal plates characterised by materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07336Soldering or alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/352Materials of die-attach connectors comprising metals or metalloids, e.g. solders

Landscapes

  • Die Bonding (AREA)

Abstract

A method for attaching semiconductor dies to metal package supports is characterised by the use of a homogeneous soft solder preform. The soft solder preform has a uniform microstructure which is free from contaminants, such as organic materials, as well as from intermetallics, and has a particule size below about 10 microns. Such homogeneous preforms provide a bonding layer between the semiconductor device and a metal support frame which is initially free from voids and which resists deformation and cracking during subsequent power cycling of the device. The reduction in voids and cracking, in turn, allows for uniform head dissipation in the device, eliminating hot spots and extending the life of the device.

Description

SPECIFICATION Improved semiconductor die-attach method and product BACKGROUND OF THE INVENTION Field of the Invention The present invention relates generally to the attachment of semiconductor dies to metal support frames, and more particularly to a method which employs an improved soft solder preform which is employed in such attachment.
Semiconductor devices, typically referred to as dies or chips, are conventionally mounted on metal frames which provide both mechanical support and electrical contact for the device.
Moreover, in power packages, such as voltage regulators, rectifiers, and certain transistors, the metal support frame also act to dissipate heat generated in the device through the metal or ceramic encapsulation package.
In attaching the semiconductor die to the underlying metal support frame, a number of requirements must be met, particularly in high power applications. First, the bonding material must have high thermal and electrical conductivity in order to provide the necessary electrical contact and enhance the desired heat dissipation. Moreover, the material must be somewhat resilient in order to withstand the differential thermal expansion between the semiconductor device and the metal support frame. As power is repeatedly cycled to the device, the bond between the die and the metal support frame will be repeatedly stressed which can cause failure of the device. Finally, the bonding material must be free from voids in order to assured uniform heat dissipation across the die-frame interface and prevent localized heat build-up in the die ("hot spots") which can cause premature device failure.
Soft solders have been widely utilized in die attach systems to reduce the stresses induced by differential expansion, typically encountered in gold-silicon die attach systems. Typically, the soft solder is applied between the semiconductor die and the metal support frame. The solder material is melted on a metal support frame and the die is applied to the melted preform resulting in a metallurgical bond. Soft solder preforms of the prior art have generally been manufactured from cast solder ingots and because of the slow cooling rate in a conventionally cast ingot, non-homogeneous phases form which are undesirable for use as preforms, for the reasons described below.
Although generally suitable for high power applications, such soft solder die attach systems do not meet all the requirements set forth above. Often, voids or cracks are formed in the solder layer, which inhibit heat dissipation from the semiconductor die. In particular, hot spots in the die form in the region of such voids, often resulting in premature failure of the semiconductor die. A typical life expectancy for a power package employing a tin-lead solder connection is approximately 1,000 cycles. Even with improved solder alloys, the lifetime of the power package is typically limited to the range from 5,000 to 10,000 cycles.
Moreover, soft solders presently in use do not melt uniformly because they possess broad melting ranges. Non-homogeneous phases, a result of conventional casting, melt at higher temperatures than homogeneous alloys. Therefore, excessively high temperatures are necessary to fully melt present preforms. Such higher temperatures, however, can be deleterious to the device and it would be beneficial to lower the bonding temperatures.
Therefore, it would be highly desirable to provide improved power packages capable of withstanding repeated cycling of 10,000 cycles or greater without failure. In particular, it would be desirable to provide improved high power semiconductor packages having a metallurgical bonding layer which is substantially free from voids, has a homogeneous composition resulting in uniform thermal conductivity, and which does not crack over an extended number of cycles.
Description of the Prior Art Yerman et al. (1983) IEEE:Proc. 33rd Elec. Components Conf., pp. 578-582, describe the failure of semiconductor power packages caused by voids in the bonding medium which attaches the semiconductor die to an underlying lead frame. No method for remedying the described failure mode is provided.
A soft solder alloy useful for bonding power transistors and comprising tin, antimony and silver (designated J alloy) is described in U.S. Patent No. 4,170,472. A second soft solder alloy useful for semiconductor die-attach is described in U.S. Reissue Patent RE. 29,563 to Manko. A method for die attachment utilizing an aluminum-zinc alloy bonding medium is described in patent no. 3,956,821 to Martin. Other solder systems not necessarily intended for semiconductor bonding are described in patent nos. 4,480,016; 4,182,628; and 2,210,593, as well as Manko, "Solders and Soldering" McGraw-Hill Book Company, New York, 1980, p. 116, and "Soldering Manual", American Welding Society, Inc., Miami, Florida, 1977, p. 7.
SUMMARY OF THE INVENTION According to the present invention, a method for attaching a semiconductor die to a metal support frame relies on the placement of a soft solder preform between the semiconductor die and the support frame. The soft solder preform consists of a homogeneous metal alloy which is substantially free from contaminants, particularly organic materials, and which has a microstructure free from intermetallics and having constituent particle sizes below about 15 microns, more usually below about 10 microns. It has been found that the use of such homogeneous preforms results in solder joints which are initially free from voids and which resist non-uniform heat buildup and cracking during subsequent power cycling of the packaged device.In particular, semiconductor power devices which are mounted in this manner may enjoy an extended life of up to 10 fold the number of power cycles achieved by the same device mounted by conventional dieattach techniques.
The soft solder preform of the present invention may be any type of soft solder alloy which is suitable for attaching a semiconductor die to a metal lead frame. Useful solder alloys include lead-tin alloys, lead-tin-indium alloys, lead-silver-indium alloys, lead-tin-antimony alloys, tin-antimony-silver alloys, and the like. Particularly preferred is the tin-antimony-silver alloy designated J alloy. Preforms meeting the purity and homogeneity requirements of the present invention may be fabricated by rapid solidification techniques, characterized by cooling rates of at least 104 C/ second, preferably at least about 105 C/second. Alloys produced by such rapid solidification techniques will be free from contaminants and will have a homogeneous microstructure with each constituent metal being uniformly dispersed in the alloy.
DESCRIPTION OF THE PREFERRED EMBODIMENT The present invention provides a semiconductor die-attach method which results in a solder joint between the semiconductor die and a metal support frame which is free from voids, and which enjoys a substantially uniform thermal conductivity. It has been found that the use of such solder joints results in an extended life for semiconductor packages, particularly power packages with power dissipation of 15 watts/hour and over. Where a typical power package might have an expected life of from 5,000 to 10,000 power cycles when mounted by the techniques of the prior art, the same device when mounted by the method of the present invention might enjoy a life of from 30,000 to 50,000 cycles, or longer.
The semiconductor die is attached to the metal support frame by a solder preform. The present invention employs soft solder preforms which are fabricated from metal alloys having relatively low melting point and which are capable of bonding the semiconductor die to the metal support frame. In order to provide electrical connection of the die and enhance heat dissipation, it is desirable that the metal alloys have both a high thermal and electrical conductivity. Suitable metal alloys include those which have heretofore found use in semiconductor die-attach processes, and a representative list of such alloys is presented in Table 1.
Table 1 Alloy Components Wt. Percent Lead 63-95% Tim 37-5% Lead 90-95% Tin 2.5-5.0% Indium 2.5-5.0% Lead 30-50% Tin 50-60% Antimony 1-5% Lead 90-95% Silver 2.5-5.0% Indium 2.5-5.0% Tin 61-69% Antimony 8- 11 % Silver 23-28% Particularly preferred is the tin-antimony-silver alloy, designated J alloy, and described in U.S.
Patent No. 4,170,472, the disclosure of which is incorporated herein by reference.
Homogeneous soft solder preforms useful in the present invention may be fabricated by various techniques, such as rapid solidification and powder metallurgy, which provide for alloys having uniform microstructures free from non-homogeneous phases. Powder metallurgy produces uniform alloys by subjecting constituent metal powders to very high pressures, which elevates the temperature and inhibits the formation of intermetallics. Rapid solidification techniques involve cooling the molten alloy at cooling rates of at least 104 C/second, usually at least 1050C/second.
Suitable rapid solidification techniques include inert gas atomization, centrifugal atomization. self quenching, and melt spinning, as described in: Mehrabian et al., eds. "Rapid Solidification Processing:Principles and Technologies II," Proc. Sec. Int. Conf. on Rapid Solidification Processing, March 22-26, 1980, Reston, VA. Particularly suitable is melt spinning where molten solder alloy is sprayed onto a flat surface which comprises a heat sink capable of rapidly cooling a thin film of the metal. Typically, the molten alloy will be sprayed onto a rotating wheel or cylinder to form a ribbon of the alloy. The thickness of the alloy ribbon will typically be in the range from 0.001 to 0.003 inches, more typically in the range from 0.0015 to 0.0025 inches. The initial temperature of the molten alloy will depend on the nature of the alloy.
The rapid solidification techniques provide alloys having a highly uniform microstructure free from intermetallics with each of the constituent metals uniformly dispersed with particle sizes below about 15 microns, usually about 10 microns. The uniform microstructure, in turn, provides for uniform heat dissipation and a well-defined melting point at a temperature lower than for corresponding non-homogenous alloys.
When fabricating the soft solder preforms of the present invention, it is also necessary to keep the alloy free from contaminants of any sort, particularly organic contaminants, such as oils, greases and other lubricants which may be employed in the fabricating process. It has been found that the presence of such contaminants in the alloy can cause voids and other irregularities in the structure of the bonding layer in the device package. Such voids and irregularities, in turn, can inhibit heat dissipation in the package and cause hot spots which are responsible for premature device failure.
The soft solder alloys are cut into preforms, which are typically dimensioned to correspond with the size of the die to be attached. The preforms are then laminated between the die-attach pad of the metal support frame and the semiconductor die to form a metallurgical bond which is free from voids, has a homogeneous composition, and which does not fail over an extended number of cycles.
The lamination operation is preferably carried out by placing the preform on the die-attach pad which has been preheated to a preselected temperature, typically in the range from 2750C to 3000C for J alloy, more typically about 285 C, in a non-oxidizing atmosphere, typically 5-15% by volume hydrogen in nitrogen. Heating may be achieved by any conventional means, typically by placement in a heated chamber. Placement of the preform on the heated die-attach pad results in substantially instantaneous melting of the preform. The semiconductor die is then placed on top of the melted preform, typically within about 2 seconds of the placement of the preform. The laminated structure of the support frame, preform, and semiconductor die is then transferred to a cooling environment (typically a cooled chamber) where the melted preform may be cooled at a rate of about 4-16 C/sec, more usually about 10-12 C/sec. It has been found that slower cooling rates result in a loss of homogeneity in the metallurgial bond, while faster cooling rates can induce stress in the bond Although the foregoing invention has been described in some detail by way of illustration and example for purposes of clarity of understanding, it will be obvious that certain changes and modifications may be practiced within the scope of the appended claims.

Claims (20)

1. A method for attaching a semiconductor die to a metal support frame, said method comprising: placing the semiconductor die over the metal support frame with a soft solder preform therebetween to form a layered structure, said soft solder preform being a homogeneous metal alloy substantially free from organic material with constituent particles well dispersed and having sizes below fifteen microns; and heating the preform to laminate the semiconductor die to the metal support frame.
2. A method according to claim 1, wherein the soft solder preform is an alloy selected from the group consisting of a lead-tin-alloy, a lead-tin-indium aloy, a lead-silver-indium alloy, a leadtin-antimony alloy, and a tin-antimony-silver alloy.
3. A method according to claim 2, wherein the soft solder preform is a tin-antimony-silver alloy having from 61 to 69% tin, from 8 to 11% antimony, and from 23 to 28% silver by weight.
4. A method according to any foregoing claim, wherein the soft solder preform has been fabricated by rapid solidification.
5. A method according to any foregoing claim, wherein the heating is performed at a temperature in the range from 2750C to 300 C.
6. A method for attaching a semiconductor die to a metal support frame, said method comprising: placing the semiconductor die over the metal support frame with a soft solder preform therebetween to form a layered structure, said soft solder preform being a homogeneous metal alloy formed by rapid solidification of a ribbon of the alloy at a cooling rate of at least 104 C/second; and heating the layered structure to melt the preform and laminate the semiconductor die to the metal support frame.
7. A method according to claim 6, wherein the soft solder preform is an alloy selected from the group consisting of a lead-tin alloy, a lead-tin-indium alloy, a lead-silver-indium alloy, a leadtin-antimony alloy, and a tin-antimony-silver alloy.
8. A method according to claim 7, wherein the soft solder preform is a tin-antimony-silver alloying having from 61 to 69% tin, from 8 to 11% antimony, and from 23 to 28% silver by weight.
9. A method for attaching a semiconductor die to a metal support frame, said method comprising: heating the metal support frame to a preselected temperature; placing a soft solder preform on the metal support frame, said preform being a homogeneous metal alloy substantially free from organic material with constituent particles well dispersed and having sizes below fifteen microns, whereby said preform melts substantially instantaneously at said preselected temperature; placing the semiconductor die over the melted preform while the metal frame is maintained at the preselected temperature to form a layered structure; and cooling the layered structure at a cooling rate in the range from 2 to 20 C/second to form a laminated metallurgical bond between the semiconductor die and the metal support frame.
10. A method according to claim 9, wherein the soft solder preform is a tin-antimony-silver alloy having from 61 to 69% tin, from 8 to 11% antimony, and from 23 to 28% silver by weight.
11. A method according to claim 10, wherein the preselected temperature is in the range from 2750C to 300 C.
12. A method according to any of claims 9 to 11, wherein the preform is heated in a nonoxidizing atmosphere.
13. A method according to any of claims 9 to 12, wherein the metal support frame is heated by placement in a heated chamber.
14. A method according to any of claims 9 to 13, wherein the soft solder preform has been fabricated by rapid soldification.
15. A semiconductor package when made by a method according to any foregoing claim.
16. A semiconductor package comprising a semiconductor die laminated to a metal support frame by means of a soft solder preform being a homogeneous metal alloy substantially free from organic material with constituent particles well dispersed throughout the alloy and having sizes below fifteen microns so that the resulting laminated structure is free from voids and displays uniform thermal conductivity across the preform.
17. A semiconductor package according to claim 16, wherein the soft solder preform is an alloy selected from the group consisting of a lead-tin alloy, a lead-tin-indium alloy, a lead-silverindium aloy, a lead-tin-antimony alloy, and a tin-antimony-silver alloy.
18. A semiconductor package according to claim 17, wherein the soft solder preform is a tin-antimony-silver alloy having from 61 to 69% tin, from 8 to 11% antimony, and from 23 to 28% silver by weight.
19. A semiconductor package according to any of claims 16 to 18, wherein the soft solder preform has been fabricated by rapid solidification to produce an alloy which is substantially free from organic material and has constituent particle sizes below ten microns.
20. A semiconductor package according to any of claims 16 to 19 and capable of dissipating over 15 watts per hour.
GB08614592A 1985-07-11 1986-06-16 Improved semiconductor die-attach method and product Withdrawn GB2178683A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US75404485A 1985-07-11 1985-07-11

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Publication Number Publication Date
GB8614592D0 GB8614592D0 (en) 1986-07-23
GB2178683A true GB2178683A (en) 1987-02-18

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GB08614592A Withdrawn GB2178683A (en) 1985-07-11 1986-06-16 Improved semiconductor die-attach method and product

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JP (1) JPS6214432A (en)
DE (1) DE3622979A1 (en)
FR (1) FR2584861A1 (en)
GB (1) GB2178683A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2285004A (en) * 1993-10-13 1995-06-28 Mecanismos Aux Ind Improved process for the production of service boxes and their components

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3736671C1 (en) * 1987-10-29 1989-06-08 Semikron Elektronik Gmbh Method for producing semiconductor components
JPH03208355A (en) * 1990-01-10 1991-09-11 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
US7821130B2 (en) * 2008-03-31 2010-10-26 Infineon Technologies Ag Module including a rough solder joint

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1556627A (en) * 1976-12-15 1979-11-28 Allied Chem Brazing process and ductile brazing foils
GB2036794A (en) * 1978-11-28 1980-07-02 Semi Alloys Inc Solder Preform
EP0144998A2 (en) * 1983-12-13 1985-06-19 Allied Corporation Rapid solidified soldering filler metals

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4170472A (en) * 1977-04-19 1979-10-09 Motorola, Inc. Solder system
GB2031223A (en) * 1978-09-22 1980-04-16 Gen Instrument Corp Method for bonding a refractory metal contact member to a semiconductor body
JPS5844961A (en) * 1981-09-09 1983-03-16 Mitsubishi Electric Corp Assembling method by brazing
JPS58215289A (en) * 1982-06-09 1983-12-14 Toshiba Corp Solder for die bonding
EP0106598B1 (en) * 1982-10-08 1988-12-14 Western Electric Company, Incorporated Fluxless bonding of microelectronic chips
JPS59220298A (en) * 1983-05-30 1984-12-11 Furukawa Electric Co Ltd:The Extremely thin solder tape

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1556627A (en) * 1976-12-15 1979-11-28 Allied Chem Brazing process and ductile brazing foils
GB2036794A (en) * 1978-11-28 1980-07-02 Semi Alloys Inc Solder Preform
EP0144998A2 (en) * 1983-12-13 1985-06-19 Allied Corporation Rapid solidified soldering filler metals

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2285004A (en) * 1993-10-13 1995-06-28 Mecanismos Aux Ind Improved process for the production of service boxes and their components
GB2285004B (en) * 1993-10-13 1997-01-08 Mecanismos Aux Ind Improved process for the production of service boxes and their components

Also Published As

Publication number Publication date
GB8614592D0 (en) 1986-07-23
FR2584861A1 (en) 1987-01-16
JPS6214432A (en) 1987-01-23
DE3622979A1 (en) 1987-01-22

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