GB2197126A

GB2197126A - A light emitting semi- conductor device having current overload protection

Info

Publication number: GB2197126A
Application number: GB08725476A
Authority: GB
Inventors: Bun-Joong Kim; Ki-Joon Kim; Choon-Woo Nahm
Original assignee: Samsung Semiconductor and Telecomunications Co Ltd
Current assignee: Samsung Semiconductor and Telecomunications Co Ltd
Priority date: 1986-11-04
Filing date: 1987-10-30
Publication date: 1988-05-11
Also published as: FR2606211B1; GB8725476D0; JPS63122293A; FR2606211A1; KR880006772A; KR890002811B1; DE3735818A1

Abstract

This housing contains a radiator 17 integrated with a main base 40, a first pin 21, a second pin 20 insulated from the first and which projects inside the volume of the housing 19, and a cover 16 provided with a transparent glass window 24. According to the invention, this housing comprises: a second insulator-forming conduction region separated from a region for mounting the electroluminescent component on the substrate; a first resistor-forming conduction region made in the second region; a thin insulating film deposited on the insulator-forming region and the resistor-forming region; first and second openings for contact with the protective resistor, which are made by removing the insulating film only within a contact region of the resistor-forming region; a metal-plated reverse face 7 of an auxiliary silicon chip, connected to the radiator material 17; an electroluminescent component 15 fixed on the region for mounting the auxiliary silicon chip; and first and second pins connected respectively, by a soldered wire, to the first and second contact openings of the protection resistor. <IMAGE>

Description

1 GB2197126A 1

SPECIFICATION

A light emitting semi-conductor device having current overload protection This invention relates to a light emitting semi conductor device having current overload pro tection and is particularly applicable for use with fiber-optic communications.

Light emitting devices as a source for fiber- 75 optic communication can be fabricated from compound semiconductors consisting of group III and group V elements of the periodic table.

In particular, laser diodes have been used for both short and long distance optical communi- 80 cations operating as a source of short and long wavelength signals, respectively.

To drive these laser diodes an operating voltage above a threshold voltage must be ap plied to these devices. However, because the 85 thermal conductivities of these compound semi-conductors is poor resulting in variation of the threshold voltage, stable light intensity cannot be obtain without heat sink materials.

Accordingly, a protection circuit is included to 90 prevent these diodes from burning out by overloading current induced by an abrupt change in applied voltage.

It is desirable therefore to provide a protec tion circuit which will provide a stable thresh old voltage for use in controlling a light emitt ing diode.

A conventional resistive overload protection circuit including a light emitting diode and pro tection resistor is shown in Fig. 1. An elec trode 1 is connected to a resistor 4 which is in turn connected to the anode of a laser type light emitting diode (L.E.D.) 3. The cathode electrode of the diode 3 is connected to ground potential 2. The resistor 4 has a greater value than the forward resistance of the L.E.D. 3 and can considerably reduce overload current induced by a voltage applied to electrode 1 having a value above the L.E.D.

maximum rating. Thus resistor 4 is an over load protection resistor.

Fig. 2 illustrates the construction of a con ventional semi-conductor package in which a light emitting diode in the form of a silicon integrated semi-conductor chip 15 is mounted 115 on a heat-sink 17 via a conductive paste 16. The heat-sink 17 is Au-plated Cu or diamond so as to provide high thermal conductivity. The heat-sink 17 is part of a main frame 40 on which is mounted a package cover 19. In 120 one alternative construction the heat-sink 17 is bonded on the surface of the main metal frame 40 by electrical welding or any other mechanical method. Electrode 18 of the semi- conductor chip 15 is connected by Au-wire 23 to a stem 20 for external connection and is electrically isolated from the main frame and a stem 21 connected to the frame by an insulator 22 which is mounted on the main frame.

When current is arranged to flow through stem 20, Au-wire 23, semi-conductor chip 15, conductive paste 16, heat- sink 17 and stem 21, the light generated at the relevant p-n junction of the semi-conductor chip 15 radi- ates through a transparent glass window 24 located in the package cover 19. Heat is extracted through heat sink 17 through the main frame 40 and cover 19 to the external area.

Fig. 3 illustrates a physical representation of the electrical circuit of Fig. 1 utilising the L.E.D. and heat-sink package of Fig. 2. A wire 13 is provided by a copper coating on a printed circuit board 6 and is electrically connected to one end of an overload protector resistor 9, and the other end of resistor 9 is connected to an anode lead 8 of the L. E.D. within cover 19. Cathode lead 10 of the light emitting diode is electrically connected to ground by a copper coated wire 14 on the printed circuit board 6. The resistor 9 and L.E.D. 15 located on the heat sink 17 are spaced apart on the printed circuit board 6 as illustrated in Fig. 3. A copper coated wire 11 on the printed circuit board 6 connects the resistor 9 and anode electrode 8.

However, with the need to space the light emitting diode and protection resistor apart the above mentioned construction results in a bulky construction and the present invention seek to overcome this disadvantage.

According to the present invention there is provided a light a light emitting semi-conductor device having current overload protection is formed as an integrated package comprising a light emitting device mounted on a semiconductor element arranged to act as a heat transfer member and connected to the light emitting device to act as a protection resistor, said semi-conductor device being in thermal contact with a heat-sink.

An embodiment of the present invention will now be described by way of example with reference to the accompanying drawings, in which:- Fig. 4 is a cross-sectional view of a light emitting semi-conductor device hving current overload protection in accordance with the present invention; and Fig. 5 is a cross-sectional view similar to Fig. 2 but including an auxiliary silicon chip provided in the present invention.

In Fig. 4 there is shown a single crystal substrate 25 having a high resistivity. A conductive isolation region 31, of a conduction type which is opposed to that of the substrate is initially formed. Then a resistive region 32 of the same conductivity as the substrate is formed in the isolation region 31 by diffusion techniques. The entire working sur- face of the substrate 25 is then coated with a layer 29 of SiO, (silicon dioxide) or S'3N, (silicon nitride). Various regions of the SiO, layer are etched by conventional photolithography techniques where the protection resistor and mounting area for the light emitting device are 2 GB2197126A 2 to be located.

The next step is to vacuum Al or Au deposit upon the Si02-etched areas. With the exception of contact openings 30,30' for the protection resistor of resistive region 32 and mounting area 50 of light emitting device, the S'02 layer is entirely etched away. Then metal layer 7 is vacuumevaporated on the back of the substrate 25 followed by a layer of A] or Au. Care is taken to ensure that the mounting area 50 of the light emitting device is larger than the size of the device itself.

In Fig. 5 there is illustrated a cross-sectional view of a semi-conductor package including the auxiliary slicon chip in accordance with the present invention. The semi-conductor package is of the same structure as a conventional TO 5 or TO 18 type semi-conductor package in that the heat sink 17 and stem 21 are parts of a main package frame 40. Stem 20 is isolated electrically from stem 21 by insulating material 22. Stem 20 extends internally into the package and cover 19 has a transparent glass window 24 through which light radiates outwardly and a removable cap 60.

After manufacturing the auxiliary Si chip shown in Fig. 4, with cap 60 being removed, metal-plated opposed side 7 of the Si chip is bonded to the side of the heat sink 17 by ultrasonic bonding or Au-In eutetic preforming. To effect such bonding the main frame is preheated and the cathode of the light emitting device 15 is then attached to the mounting area 50 in Fig. 4 by a high thermal and electrical conductive paste 51. An Au preform can be utilised just above the conductive paste. A wire bonded process is effected after the die attachement of the light-emitting diode on the auxiliary Si chip.

The innermost end portion 62 of step 20 is 105 The auxiliary silicon chip used in the package of the present invention is used as a heat sink for the light emitting device in addition to defining the protection resistor so that the use of a discrete resistor is avoided as is the bonding process on a printed circuit board; assembly working time is thus reduced.

Claims

1. A light emitting semi-conductor device having current overload protection is formed as an integrated package comprising a light emitting device mounted on a semi-conductor element arranged to act as a heat transfer member and connected to the light emitting device to act as a protection resistor, said semi-conductor device being in thermal contact with a heat- sink.

2. A device as claimed in claim 1 wherein there is provided a main frame to form said package, first and second electrodes extending outwardly from said package, one electrode being electrically connected with the main frame and the other electrode being elec- trically insulated from said main frame and connected to one electrode of said protection resistor, said semi-conductor element having one planar surface thereof connected to said heat-sink and an opposing planar surface thereof being thermally and electrically con- nected to said light emitting device, an elec trode of said light emitting device being con nected to the other terminal of said protection resistor.

3. A device as claimed in claim 2 wherein the semi-conductor element has regions of al ternating conductivity types defining said pro tection resistor connected with the light emitt ing device.

4. A device as claimed in claim 3 wherein bonded by Au-wire 28 to a first contact said substrate comprises first and second indi opening 30 of the protection resistor 26 as vidual regions with one region being deposited shown in Fig. 4. The anode electrode of the on the other, an insulating thin film deposited light emitting diode 15 is bonded by Au wire on the first and second regions, first and sec 27 to a second contact opening 30'. The 110 ond contact openings of the protection resis bonding processes are then completed. The tor being formed by removing insulating film in package is encapsulated by fitting cap 60 in only the first region, a metal plated electrode nitrogen at ambient temperature so that the on the side of the substrate opposite that bondent N, gasis sealed in the package and having the first and second regions deposited therein, a mounting region to which the first and second electrodes are bonded with the first and second contact openings respectively.

5. A light emitting semi-conductor device substantially as herein described with reference to and as illustrated in Figs. 4 and 5 of the accompanying drawings.

can prevent metal wire from oxidation.

The package shown in Fig. 5 operates such that when an operating voltage is applied to stem 20 and stem 21 is grounded light is generated at the pn junction of the light em- itting device 15 and radiates through transparent glass window 24.

The thermal conductivities of GaAs and InP, for light emitting material, is 0.46 W/ cm'C and 0.68 W/ cm'C at room temperature re- spectively, whilst that of silicon is that of 1.5W/cm'C. Therefore, the use of Si as the heat sink material is more advantageous than using the materials of GaAs or InP. Lapping of the silicon substrate to 200-300 um thickness is sufficient for use as an auxiliary chip.

Published 1988 at The Patent Office, State House, 66/71 High Holborn, London WC 1 R 4TP Further copies may be obtained from The Patent Office, Sales Branch, St Mary Cray, Orpington, Kent BR5 3RD. Printed by Burgess & Son (Abingdon) Ltd. Con. 1/87.