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JP2007013208A - Method for manufacturing printed wiring board - Google Patents
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JP2007013208A - Method for manufacturing printed wiring board - Google Patents

Method for manufacturing printed wiring board Download PDF

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JP2007013208A
JP2007013208A JP2006253034A JP2006253034A JP2007013208A JP 2007013208 A JP2007013208 A JP 2007013208A JP 2006253034 A JP2006253034 A JP 2006253034A JP 2006253034 A JP2006253034 A JP 2006253034A JP 2007013208 A JP2007013208 A JP 2007013208A
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substrate
insulating material
conductor
plate
bumps
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JP4417938B2 (en
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Tomohisa Motomura
知久 本村
Yoshitaka Fukuoka
義孝 福岡
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing printed wiring boards by which no migration is caused. <P>SOLUTION: With regard to a so-called piercing method for manufacturing multilayer boards, almost conical conductor bumps 2 are placed by a press in a prepreg of a substrate of insulating material, and then are hardened for obtaining an electrical conduction in the direction of thickness of the substrate. Wiring patterns are provided on one side of a substrate 3 of non-hardened insulating material, an electrical conduction is obtained in the direction of thickness of the substrate with conductor bumps in the substrate, then a plurality of such substrate units are layered, and the prepregs of the substrates are hardened by heat at a time. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明はプリント配線基板の製造方法に係り、更に詳細にはいわゆる多層板を構成するプリント配線基板の製造方法に関する。   The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board constituting a so-called multilayer board.

従来より多層板を形成する方法のひとつとして、プリプレグ、即ちエポキシ樹脂などのシート状熱硬化性樹脂からなる未硬化の絶縁材料基板に、金属粉などの導電性材料を樹脂中に分散させたものを略円錐型に成形した導体バンプを配設した導体層を押圧して前記プリプレグに前記導体バンプを貫通させ、これにより絶縁材料基板の厚さ方向での電気的導通を形成する方法がある。   Conventionally, as a method of forming a multilayer board, a prepreg, that is, an uncured insulating material substrate made of a sheet-like thermosetting resin such as an epoxy resin, and a conductive material such as metal powder dispersed in the resin There is a method in which a conductor layer in which conductor bumps are formed in a substantially conical shape is pressed to allow the conductor bumps to penetrate through the prepreg, thereby forming electrical conduction in the thickness direction of the insulating material substrate.

図10は導体バンプを貫通させて絶縁材料基板の電気的導通を形成する方法(以下、この方法を単に「貫通法」という。)を模式的に示した図である。   FIG. 10 is a diagram schematically showing a method of forming an electrical continuity of an insulating material substrate by penetrating a conductor bump (hereinafter, this method is simply referred to as “penetration method”).

図10に示したように、この貫通法では、第1の導体層101上に複数個の略円錐型の導体バンプ102,102,…を形成し、この導体バンプ102,102,…の上側に絶縁材料基板のプリプレグ103を配置する(図10(a))。しかる後に前記第1の導体層101とプリプレグ103とを押圧し、前記導体バンプ102,102…をしてプリプレグ103を貫通せしめる。この状態で加熱等によりプリプレグ103を硬化させる。   As shown in FIG. 10, in this penetration method, a plurality of substantially conical conductor bumps 102, 102,... Are formed on the first conductor layer 101, and above the conductor bumps 102, 102,. An insulating material substrate prepreg 103 is disposed (FIG. 10A). After that, the first conductor layer 101 and the prepreg 103 are pressed, and the conductor bumps 102, 102,... In this state, the prepreg 103 is cured by heating or the like.

次いで、プリプレグ103の図中上面上に第2の導体層104を形成し、「コア材」と呼ばれる、絶縁材料基板の両面に導体層が形成されたプリント配線基板の基本的な要素が形成される。   Next, a second conductor layer 104 is formed on the upper surface of the prepreg 103 in the drawing, and a basic element of a printed wiring board called a “core material” in which a conductor layer is formed on both sides of an insulating material substrate is formed. The

ところで、多層板を形成するにはこのようなコア材の導体層にパターン形成したのち、上記と同様にして1.導体バンプの形成、2.絶縁材料基板プリプレグの配置、3.加熱硬化、4.導体層の形成、5.パターン形成、更に、導体バンプの形成………という一連の操作を繰り返して一層ずつ積層する。即ち、一層積層する毎に上記1〜5の操作を繰り返す。   By the way, in order to form a multilayer board, a pattern is formed on the conductor layer of such a core material, and then 1. 1. Formation of conductor bumps 2. Arrangement of insulating material substrate prepreg; 3. heat curing; 4. Formation of conductor layer A series of operations such as pattern formation and further formation of conductor bumps are repeated to stack one layer at a time. That is, the above operations 1 to 5 are repeated every time one layer is stacked.

しかし、コア材やその周辺の内側の層は繰り返し加熱を施されるため、外側に多層化してゆく間に内側の層の絶縁材料が繰り返しの加熱により劣化して、絶縁層にクラックが生じやすいという問題がある。絶縁層にクラックが生じると、マイグレーションなどのトラブルの原因となるため、致命的な欠陥となる。   However, since the core material and the inner layer around the core material are repeatedly heated, the insulating material of the inner layer deteriorates due to repeated heating during the multilayering of the outer layer, and the insulating layer is likely to crack. There is a problem. If a crack occurs in the insulating layer, it causes a trouble such as migration, which is a fatal defect.

本発明は上記問題を解決するためになされたものである。即ち、本発明はマイグレーションを生じることの無いプリント配線基板の製造方法を提供することを目的とする。   The present invention has been made to solve the above problems. That is, an object of the present invention is to provide a method of manufacturing a printed wiring board that does not cause migration.

上記の課題を解決するため、本発明は、導体板上に複数の略円錐状の導体バンプを形成する工程と、前記導体バンプ上に未硬化の絶縁材料基板を配設する工程と、前記絶縁材料基板が硬化しない温度において前記導体板及び前記絶縁材料基板を加圧し、前記導体バンプを貫通させる工程と、前記導体板をパターニングして所定の配線パターンを備えた、前記導体バンプが前記絶縁基板に貫通した基板ユニットを形成する工程と、前記未硬化の絶縁材料基板を有する基板ユニットを複数枚積層配置して多層板前駆体を形成する工程と、前記多層板前駆体を加圧下に加熱して前記多層前駆体を硬化させる工程とを具備する。   In order to solve the above problems, the present invention includes a step of forming a plurality of substantially conical conductor bumps on a conductor plate, a step of disposing an uncured insulating material substrate on the conductor bumps, and the insulation. A step of pressurizing the conductive plate and the insulating material substrate at a temperature at which the material substrate does not harden and penetrating the conductive bump; and patterning the conductive plate to provide a predetermined wiring pattern, wherein the conductive bump is the insulating substrate Forming a substrate unit penetrating through the substrate, forming a multilayer plate precursor by stacking a plurality of substrate units each having the uncured insulating material substrate, and heating the multilayer plate precursor under pressure. Curing the multilayer precursor.

上記発明において、前記絶縁材料基板が硬化しない温度は、前記絶縁材料の種類によって定まるが、例えば、115〜150℃が挙げられる。   In the said invention, although the temperature which the said insulating material board | substrate does not harden | determine depends on the kind of the said insulating material, 115-150 degreeC is mentioned, for example.

また、前記導体板及び絶縁材料基板の緩衝材を介して加圧は、前記導体バンプの先端を平らにして、上面径が平均で底面径の50%以上になるように変形させるのが望ましい。   In addition, it is desirable that the pressurization through the conductor plate and the buffer material of the insulating material substrate is performed so that the tip end of the conductor bump is flat and the top surface diameter is on average 50% or more of the bottom surface diameter.

更に、前記導体板のパターンニングは、前記導体板及び絶縁材料基板をフィルムでラッピングした状態でパターンニングする工程であることが望ましい。   Furthermore, it is desirable that the patterning of the conductor plate is a step of patterning the conductor plate and the insulating material substrate in a state of being wrapped with a film.

また、本発明の別のプリント配線基板の製造方法は、硬化した絶縁材料基板の第1の面と第2の面とにそれぞれ配線パターンを備え、前記第1の面と第2の面とに形成された配線パターンどうしを電気的に導通させる導体バンプを内蔵するコア材を形成する工程と、導体板上に複数の略円錐型の導体バンプを形成する工程と、前記導体バンプ上に未硬化の絶縁材料基板を配設する工程と、前記絶縁材料基板が硬化しない温度において前記導体板及び前記絶縁材料基板を加圧し、前記導体バンプを貫通させる工程と、前記導体板をパターンニングして所定の配線パターンを備えた、前記導体バンプが前記絶縁基板に貫通した基板ユニットを形成する工程と、前記未硬化の絶縁材料基板を有する基板ユニットを少なくとも1枚ずつ、前記コア材の両面に積層配置して多層板前駆体を形成する工程と、前記多層板前駆体を加圧下に加熱して前記多層板前駆体を硬化させる工程とを具備する。   In another printed wiring board manufacturing method of the present invention, a wiring pattern is provided on each of the first surface and the second surface of the cured insulating material substrate, and the first surface and the second surface are provided. A step of forming a core material containing a conductor bump for electrically connecting the formed wiring patterns; a step of forming a plurality of substantially conical conductor bumps on the conductor plate; and an uncured portion on the conductor bump. A step of disposing the insulating material substrate, a step of pressurizing the conductive plate and the insulating material substrate at a temperature at which the insulating material substrate is not cured, and penetrating the conductive bump, and patterning the conductive plate to obtain a predetermined value. A step of forming a substrate unit including the wiring pattern, wherein the conductive bump penetrates the insulating substrate, and at least one substrate unit having the uncured insulating material substrate, Comprising forming a multi-layer plate precursor was stacked on the surface, and curing said multi-layer plate precursor by heating the multilayer plate precursor under pressure.

この発明において、前記コア材を形成する工程としては、第1の導体板の上に略円錐形の導体バンプを形成する工程と、前記導体バンプの先端側に未硬化の絶縁材料基板を配設する工程と、前記第1の導体板と前記絶縁材料基板とを加圧して前記導体バンプを前記絶縁材料基板に貫通させる工程と、前記導体バンプの先端が貫通した前記絶縁材料基板表面に第2の導体板を配設する工程と、前記第1の導体板と第2の導体板とを加圧下に加熱して前記絶縁材料基板を硬化させる工程と、前記第1の導体板にパターン形成する工程と、前記第2の導体板にパターン形成する工程と、を具備する工程が挙げられる。   In the present invention, as the step of forming the core material, a step of forming a substantially conical conductor bump on the first conductor plate, and an uncured insulating material substrate are disposed on the leading end side of the conductor bump. A step of pressurizing the first conductive plate and the insulating material substrate to penetrate the conductive bumps through the insulating material substrate; and a second surface of the insulating material substrate through which the tip of the conductive bumps penetrates. A step of disposing a conductive plate, a step of heating the first conductive plate and the second conductive plate under pressure to cure the insulating material substrate, and patterning the first conductive plate. And a step of forming a pattern on the second conductive plate.

また、前記コア材に用いる絶縁材料基板としては、2回の加熱により完全に硬化する樹脂組成物から構成されているものを用いることが好ましい。   Moreover, as an insulating material board | substrate used for the said core material, it is preferable to use what is comprised from the resin composition hardened | cured completely by two times of heating.

本発明のプリント配線基板の製造方法では、未硬化の絶縁材料基板上にパターン形成した基板ユニットを複数枚積層した後に、一括して加熱して硬化させるので、各基板ユニットの絶縁材料基板に繰り返し加熱が施されることがない。そのため、この繰り返し加熱による劣化がなくなり、クラックの発生やそれが惹起するマイグレーションの発生が未然に防止される。   In the method for manufacturing a printed wiring board according to the present invention, a plurality of patterned substrate units are stacked on an uncured insulating material substrate, and then heated and cured at a time. No heating is applied. Therefore, the deterioration due to repeated heating is eliminated, and the occurrence of cracks and the migration caused by the cracks can be prevented.

また、加熱工程が一回で済むので、製造工程が簡略化でき、製造コストを抑えることもできる。   Further, since the heating process is only required once, the manufacturing process can be simplified and the manufacturing cost can be reduced.

本発明によれば、マイグレーションを生じることのないプリント配線基板の製造方法を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the printed wiring board which does not produce a migration can be provided.

(第1の実施形態)以下、本発明の実施の形態に係るプリント配線基板の製造方法について説明する。図1〜図4は本実施形態に係るプリント配線基板の製造手順を模式的に示した垂直断面図であり、図5は同手順を図示したフローチャートである。   (First Embodiment) A method for manufacturing a printed wiring board according to an embodiment of the present invention will be described below. 1 to 4 are vertical sectional views schematically showing the procedure for manufacturing the printed wiring board according to this embodiment, and FIG. 5 is a flowchart showing the procedure.

まず図1に示すようにして基板ユニット、即ち1枚の未硬化の絶縁材料基板の片面に配線パターンを形成し、絶縁材料基板の厚さ方向の電気的導通を形成する導体バンプを内蔵したものを形成する。   First, as shown in FIG. 1, a substrate unit, that is, one in which a wiring pattern is formed on one surface of an uncured insulating material substrate, and a conductor bump for forming electrical conduction in the thickness direction of the insulating material substrate is built in. Form.

図1(a)に示すように薄板状の導体、例えば銅箔のような導体板1を用意し(STEP1)、この導体板1上に所定の回路パターンに沿って複数個の略円錐型の導体バンプ2,2,…を印刷技術などを用いて形成する(図1(a)/STEP2)。しかる後に前記導体バンプ2,2,…の上に未硬化の絶縁材料基板(プリプレグ)3を配置する(図1(b)/STEP3)。ここで用いる絶縁材料基板3は汎用されているエポキシ樹脂をガラス繊維シートに含浸したものや、ガラス転移温度が170℃以上の材料、例えばビスマレイドトリアジンレジンなどが挙げられる。   As shown in FIG. 1A, a thin plate-like conductor, for example, a conductor plate 1 such as a copper foil is prepared (STEP 1), and a plurality of substantially conical shapes are formed on the conductor plate 1 along a predetermined circuit pattern. Conductor bumps 2, 2,... Are formed using a printing technique or the like (FIG. 1 (a) / STEP2). Thereafter, an uncured insulating material substrate (prepreg) 3 is placed on the conductor bumps 2, 2,... (FIG. 1B / STEP3). As the insulating material substrate 3 used here, a glass fiber sheet impregnated with a widely used epoxy resin, or a material having a glass transition temperature of 170 ° C. or higher, for example, a bismaleide triazine resin or the like can be used.

ここで、ガラス転移温度が170℃以上の材料を採用した理由は、一般にガラス転移温度と熱膨張係数との間にはガラス転移温度が大きい材料ほど材料熱膨張係数が小さい、という関係があり、ガラス転移温度の高い材料ほど耐熱性に優れているためである。   Here, the reason for adopting a material having a glass transition temperature of 170 ° C. or higher is that, generally, a material having a higher glass transition temperature has a smaller material thermal expansion coefficient between the glass transition temperature and the thermal expansion coefficient. This is because the higher the glass transition temperature, the better the heat resistance.

また、ガラス転移温度の値を170℃以上としたのは、ガラス転移温度が170℃未満であると、その材料の熱膨張係数はある限界を超えて大きくなり、導体バンプと絶縁材料基板との間にミスマッチが起き、ハンダ耐熱性試験(288℃で10秒間放置)で導体バンプにクラックが生じ、電気的接続が破壊される、という弊害を生じるからである。   Moreover, the value of the glass transition temperature is set to 170 ° C. or more. If the glass transition temperature is less than 170 ° C., the thermal expansion coefficient of the material becomes larger than a certain limit, and the conductive bump and the insulating material substrate This is because a mismatch occurs between the conductor bumps and a crack is generated in the conductor bump in the solder heat resistance test (left at 288 ° C. for 10 seconds), resulting in an adverse effect that the electrical connection is broken.

次いでこれら導体板1と絶縁材料基板3とを弾性材(図示省略)を介してプレスすることにより導体板1と絶縁材料基板3とを押圧し、この絶縁材料基板3に前記導体バンプ2,2,…を貫通させる(図1(c)/STEP4)。   Next, the conductor plate 1 and the insulating material substrate 3 are pressed through an elastic material (not shown) to press the conductor plate 1 and the insulating material substrate 3, and the conductor bumps 2, 2 are applied to the insulating material substrate 3. ,... Are penetrated (FIG. 1 (c) / STEP4).

このときのプレスを所定の条件下で行うことにより導体バンプ2,2,…の先端側を平坦にする。その結果、図1(c)の丸で囲った部分を部分的に拡大した図のように、導体バンプ2,2,…は変形され、略台形の垂直断面を備えた形状となる。このときの変形後の導体バンプ2の形は上面の径R2が平均で底面の径R1の50%以上となるのが好ましい。   The tip side of the conductor bumps 2, 2,... Is flattened by performing pressing at this time under predetermined conditions. As a result, the conductor bumps 2, 2,... Are deformed into a shape having a substantially trapezoidal vertical cross section, as shown in a partially enlarged view of the circled portion in FIG. The shape of the conductor bump 2 after deformation is preferably such that the upper surface diameter R2 is 50% or more of the lower surface diameter R1 on average.

ここで変形後の導体バンプ2の好ましい断面形状について、上面径R2が平均で底面径R1の50%以上としたのは、R2がR1の50%未満であると、図2、図3のようにバンプ貫通後に積層プレスした時のバンプ上面の接触面積が非常に小さくなるために、許容できる電気容量(流せる電流値)に制限が生じ、また、導通抵抗値がバンプ上面の径が小さくなるに連れて大きくなり、電気接続信頼性が低下する、という弊害を生じるからである。   Here, with respect to the preferable cross-sectional shape of the conductor bump 2 after deformation, the top surface diameter R2 is 50% or more of the bottom surface diameter R1 on average, and when R2 is less than 50% of R1, as shown in FIGS. Since the contact area of the bump upper surface when it is laminated and pressed after passing through the bump is very small, an allowable electric capacity (current value that can be passed) is limited, and the conduction resistance value is reduced in the diameter of the bump upper surface. This is because it causes an adverse effect that the electrical connection reliability decreases with the increase.

次にこの基板ユニットの導体板1上に図示しないフォトレジスト材層を形成したのち、光透過性の保護フィルム4で覆って保護する(STEP5)。   Next, after forming a photoresist material layer (not shown) on the conductor plate 1 of this substrate unit, it is covered and protected by a light-transmitting protective film 4 (STEP 5).

ここで保護フィルム4で基板ユニットを覆うのは、露光時の光から絶縁材料基板1や導体バンプ2,2,…を保護するためである。この保護フィルム4で覆った状態の基板ユニットの導体板1にパターン形成する(STEP6)。即ち、所定のマスクパターンを備えたマスク(図示省略)を介して導体板1上のフォトレジスト材層を露光し、しかる後にエッチングして不要な導体部分を除去することにより所定の配線パターンを形成する。   The reason why the substrate unit is covered with the protective film 4 is to protect the insulating material substrate 1 and the conductor bumps 2, 2,. A pattern is formed on the conductor plate 1 of the substrate unit covered with the protective film 4 (STEP 6). That is, a predetermined wiring pattern is formed by exposing a photoresist material layer on the conductor plate 1 through a mask (not shown) having a predetermined mask pattern, and then etching to remove unnecessary conductor portions. To do.

図1(e)はこうして形成された基板ユニット5の垂直断面図である。図1(e)に示すように、この基板ユニット5では未硬化の絶縁材料基板3の図中下面側に配線パターン1a,1a,…が形成され、この配線パターン1a,1a,…は導体バンプ2,2,…と電気的に接続され、この導体バンプ2,2,…の先端は絶縁材料基板3の図中上面側に僅かだけ突出した状態に形成されている。   FIG. 1E is a vertical sectional view of the substrate unit 5 thus formed. As shown in FIG. 1 (e), in this substrate unit 5, wiring patterns 1a, 1a,... Are formed on the lower surface side of the uncured insulating material substrate 3 in the figure, and these wiring patterns 1a, 1a,. Are electrically connected to 2, 2,..., And the ends of the conductor bumps 2, 2,.

同様の方法により基板ユニットを所定数、例えば5枚作成する。図2は多層板を構成する基板ユニット5〜9の垂直断面を示した図である。図2に示したように、これらの基板ユニット5〜9にはそれぞれ所定の配線パターンが形成されており、各配線パターンは導体バンプにより多層板の厚さ方向での電気的導通が形成されるようになっている。これらの基板ユニット5〜9と導体板10とを図2に示すように互いの位置関係を適正な位置に配置した状態で積層する(STEP7)。   A predetermined number of substrate units, for example, five, are created by the same method. FIG. 2 is a view showing a vertical section of the substrate units 5 to 9 constituting the multilayer board. As shown in FIG. 2, a predetermined wiring pattern is formed on each of these substrate units 5 to 9, and each wiring pattern is electrically connected in the thickness direction of the multilayer board by a conductor bump. It is like that. These substrate units 5 to 9 and the conductor plate 10 are laminated in a state where their positional relationships are arranged at appropriate positions as shown in FIG. 2 (STEP 7).

この状態で基板ユニット5〜9及び導体板10を基板の厚さ方向にプレスして(STEP8)多層構造を形成すると共に、加熱などにより基板ユニット5〜9の絶縁材料基板を硬化する(図3/STEP9)。   In this state, the substrate units 5 to 9 and the conductor plate 10 are pressed in the thickness direction of the substrate (STEP 8) to form a multilayer structure, and the insulating material substrate of the substrate units 5 to 9 is cured by heating or the like (FIG. 3). / STEP 9).

次いで、最上部の導体板10及び最下部の導体板9aのそれぞれについて、エッチング等を施してパターン形成し(STEP10)、図4に示すような多層板を得る。   Next, each of the uppermost conductor plate 10 and the lowermost conductor plate 9a is subjected to etching or the like to form a pattern (STEP 10), thereby obtaining a multilayer board as shown in FIG.

以上詳述したように、本実施形態のプリント配線基板の製造方法では、絶縁材料基板のプリプレグに配線パターンと、この配線パターンと電気的に接続されて絶縁材料基板の厚さ方向の電気的導通を形成する導体バンプとを内蔵した基板ユニットを予め形成し、複数の基板ユニットを積層して加圧下に加熱して前記プリプレグを硬化する手順を採用しているので、多層板の中心付近に配設される絶縁材料基板が繰り返し加熱されて過剰に加熱されることがないので、この過剰な加熱によるクラックの発生や、このクラックが惹起するマイグレーションの発生が未然に防止される。 また、本発明のプリント配線基板の製造方法では、複数の基板ユニットを積層した後で一括して加熱硬化を施すので、加熱硬化させる工程が一回で済み、製造工程を短縮化できると共に製造コストを安価に抑えることが出来る。   As described above in detail, in the printed wiring board manufacturing method of the present embodiment, the wiring pattern is electrically connected to the wiring pattern on the prepreg of the insulating material board, and the thickness of the insulating material board is electrically connected. The substrate unit including the conductor bumps for forming the substrate is formed in advance, and a plurality of substrate units are stacked and heated under pressure to cure the prepreg. Since the insulating material substrate to be provided is not repeatedly heated by being repeatedly heated, generation of cracks due to the excessive heating and occurrence of migration caused by the cracks can be prevented in advance. Further, in the printed wiring board manufacturing method of the present invention, since a plurality of board units are stacked and then heat-cured at once, the heat-curing process can be performed only once, the manufacturing process can be shortened and the manufacturing cost can be shortened. Can be kept inexpensive.

なお、本実施形態及び以下の実施形態は本発明の範囲を限定するものではない。   Note that this embodiment and the following embodiments do not limit the scope of the present invention.

(実施例)上記第1の実施形態の図1(a)のように厚さ18μmの銅箔1上に銀ペーストを印刷技術により直径0.2mmの略円錐形の導体バンプ2を形成した。次いで、図1(b)のように絶縁材料としてBTレジン材(登録商標/三菱瓦斯化学製、型名:GHPL830,厚さ0.06mm)を重ね、115℃で加熱・加圧を行い、導体バンプ2を絶縁材料の厚さ方向に貫通させて基板ユニット(絶縁材料付きの銅箔)を形成した。この基板ユニットを加圧して図1(c)のように略円錐形の導体バンプ2の先端を平らな形状にした。この時点では上記絶縁材料は硬化していない、いわゆるBステージの状態である。この基板ユニットをレジストフィルム4でラミネートし、これに所定のマスクパターンを介して露光、現像を施し、銅箔をエッチングして配線パターンが形成された基板ユニットを得た。同様に4枚の基板ユニットを作成し、図2のように銅箔10とともに積層配置し、導体バンプの一つを位置決め用の金属物ターゲットとしてX線で認識して各基板ユニットの位置決めを行い、190℃で約2時間積層プレスを行って絶縁材の樹脂を硬化させることにより本発明の6層構造の多層板が得られた。   Example As shown in FIG. 1A of the first embodiment, a substantially conical conductor bump 2 having a diameter of 0.2 mm was formed on a copper foil 1 having a thickness of 18 μm by a printing technique. Next, as shown in FIG. 1 (b), a BT resin material (registered trademark / manufactured by Mitsubishi Gas Chemical Co., Ltd., model name: GHPL830, thickness 0.06 mm) is stacked as shown in FIG. A substrate unit (copper foil with an insulating material) was formed by penetrating the bumps 2 in the thickness direction of the insulating material. The substrate unit was pressurized to make the tip of the substantially conical conductor bump 2 flat as shown in FIG. At this time, the insulating material is not cured and is in a so-called B stage state. This substrate unit was laminated with a resist film 4, exposed and developed through a predetermined mask pattern, and the copper foil was etched to obtain a substrate unit on which a wiring pattern was formed. Similarly, four board units are prepared and laminated together with the copper foil 10 as shown in FIG. 2, and each board unit is positioned by recognizing one of the conductor bumps as a metal target for positioning with X-rays. A multilayer board having a six-layer structure according to the present invention was obtained by curing the resin of the insulating material by performing a lamination press at 190 ° C. for about 2 hours.

このようにして作成した多層板のガラス転移温度を測定したところ、約200℃となり、材料本来の特性が得られた。また、多層板内部の材料間もプレス回数が1回になったので基板の劣化がなく、材料間の密着も大きく、落下試験での強度も良好な値が得られた。更に、高温高湿で電圧を印加する試験の耐マイグレーション性も向上した。また、積層回数が一回なのでリードタイムの削減ができ、しかも、各基板ユニット間のずれも解消することができた。   When the glass transition temperature of the multilayer board thus prepared was measured, it was about 200 ° C., and the original characteristics of the material were obtained. Moreover, since the number of presses between the materials in the multilayer board was one, there was no deterioration of the substrate, the adhesion between the materials was large, and a good value in the drop test was obtained. Furthermore, the migration resistance of the test in which a voltage was applied at high temperature and high humidity was also improved. In addition, since the number of laminations is one, the lead time can be reduced, and the deviation between the substrate units can be eliminated.

(第2の実施形態)以下に本発明の第2の実施形態に係るプリント配線基板の製造方法について説明する。なお、本実施形態のうち、上記第1の実施形態と重複する部分については説明を省略する。   (Second Embodiment) A method for manufacturing a printed wiring board according to a second embodiment of the present invention will be described below. In the present embodiment, the description of the same parts as those in the first embodiment is omitted.

本実施形態に係るプリント配線基板の製造方法では、多層板の中心に配設される、いわゆるコア材にのみ硬化後の基板ユニットを用い、その両側に積層される複数枚の基板ユニットとしては上記第1の実施形態と同じく未硬化の基板ユニットを用いる。   In the method for manufacturing a printed wiring board according to the present embodiment, a cured substrate unit is used only for a so-called core material disposed at the center of a multilayer board, and the plurality of substrate units stacked on both sides thereof are the above As in the first embodiment, an uncured substrate unit is used.

図6〜8は本実施形態に係るプリント敗戦基板製造方法の手順を示す垂直断面図であり、図9は同手順を示すフローチャートである。   6 to 8 are vertical sectional views showing the procedure of the printed defeat board manufacturing method according to this embodiment, and FIG. 9 is a flowchart showing the procedure.

まず図6に示すようにしてコア材、即ち絶縁材料基板の両面に導体層を設けたものを作成する。図6(a)に示すように薄板状の導体、例えば銅箔のような薄板状の導体板11を用意し(STEP1)、この導体板1上に所定の回路パターンに沿って複数個の略円錐型の導体バンプ(第1の導体バンプ)12,12,…を印刷技術などを用いて形成する(図6(a)/STEP2)。しかる後に前記導体バンプ12,12,…の上に未硬化の絶縁材料基板(プリプレグ)13を配置する(図6(b)/STEP3)。   First, as shown in FIG. 6, a core material, that is, a substrate provided with a conductor layer on both surfaces of an insulating material substrate is prepared. As shown in FIG. 6A, a thin plate-like conductor, for example, a thin plate-like conductor plate 11 such as a copper foil, is prepared (STEP 1), and a plurality of approximate shapes are formed on the conductor plate 1 along a predetermined circuit pattern. The conical conductor bumps (first conductor bumps) 12, 12,... Are formed using a printing technique or the like (FIG. 6A / STEP2). Thereafter, an uncured insulating material substrate (prepreg) 13 is disposed on the conductor bumps 12, 12,... (FIG. 6B / STEP3).

次いでこれら導体板11と絶縁材料基板13とを弾性体(図示省略)を介して押圧してこの絶縁材料基板13に前記導体バンプ12,12,…を貫通させる(図6(c)/STEP4)。   Next, the conductor plate 11 and the insulating material substrate 13 are pressed through an elastic body (not shown) to allow the conductor bumps 12, 12,... To penetrate the insulating material substrate 13 (FIG. 6C / STEP4). .

更に絶縁材料基板13の前記導体バンプ12,12,…の先端が貫通した面、即ち図中13a面上に第2の導体板としての金属板、例えば銅箔14をプレスして取り付ける(図6(d)/STEP5)。このプレスと同時或いはプレス後に加熱するなどして絶縁材料基板13を硬化することによりコア材15が完成する(図6(e)/STEP6)。   Further, a metal plate, for example, a copper foil 14 as a second conductor plate is pressed and attached to the surface of the insulating material substrate 13 through which the tips of the conductor bumps 12, 12,... Penetrate, that is, the surface 13a in FIG. (D) / STEP5). The core material 15 is completed by curing the insulating material substrate 13 by heating at the same time as or after the pressing (FIG. 6 (e) / STEP 6).

次いで、このコア材15の第1の面(図中上面)、第2の面(図中下面)にそれぞれ配線パターンを形成して両面に配線パターンを備えたコア材を得る。(図6(f)/STEP7)。   Next, a wiring pattern is formed on each of the first surface (upper surface in the drawing) and the second surface (lower surface in the drawing) of the core material 15 to obtain a core material having wiring patterns on both surfaces. (FIG. 6 (f) / STEP7).

一方、図7に示したように、前記第1の実施形態で説明したのと同様にして未硬化の絶縁材料基板の片面に配線パターンを備え、内蔵した導体バンプにより前記配線パターンとは反対側の基板表面との間での電気的導通が形成された基板ユニットを複数枚、例えば4枚作成した。   On the other hand, as shown in FIG. 7, a wiring pattern is provided on one side of an uncured insulating material substrate in the same manner as described in the first embodiment, and the side opposite to the wiring pattern is provided by a built-in conductor bump. A plurality of, for example, four substrate units formed with electrical continuity with the substrate surface.

図7は多層板を構成する基板ユニット16〜19の垂直断面を示した図である。図7に示したように、これらの基板ユニット15〜19にはそれぞれ所定の配線パターンが形成されており、各配線パターンは導体バンプにより多層板の厚さ方向での電気的導通が形成されるようになっている。これらの基板ユニット15〜19を図7に示すように互いの位置関係を適正な位置に配置した状態で積層する(STEP8)。   FIG. 7 is a view showing a vertical section of the substrate units 16 to 19 constituting the multilayer board. As shown in FIG. 7, a predetermined wiring pattern is formed in each of these substrate units 15 to 19, and each wiring pattern is electrically connected in the thickness direction of the multilayer board by a conductor bump. It is like that. These substrate units 15 to 19 are stacked in a state where their positional relationships are arranged at appropriate positions as shown in FIG. 7 (STEP 8).

この状態で基板ユニット15〜19を基板の厚さ方向にプレスして(STEP9)多層構造を形成すると共に、加熱などにより基板ユニット16〜19の絶縁材料基板を硬化する(図8/STEP10)。   In this state, the substrate units 15 to 19 are pressed in the thickness direction of the substrate (STEP 9) to form a multilayer structure, and the insulating material substrates of the substrate units 16 to 19 are cured by heating or the like (FIG. 8 / STEP 10).

次いで、最上部の導体板17a及び最下部の導体板19aのそれぞれについて、エッチング等を施してパターン形成し(STEP11)、最終的な多層板を得る。 本実施形態に係るプリント配線基板の製造方法では、多層板の中心に配設されるコア材15のみ硬化後の基板ユニットを用い、その両面に未硬化の基板ユニット16〜19を積層した後に基板ユニット16〜19のプリプレグを硬化する構成としたので、図8のように、コア材15の両面に積層配置する導体バンプの向きが全てコア材15の方向(基板の中心方向)を向いているため、多層基板内部のバンプ形状が中心に対して対称となっているので、加熱処理後の基板の反りや捩れが発生しにくい、という特有の効果が得られる。   Next, each of the uppermost conductor plate 17a and the lowermost conductor plate 19a is subjected to etching or the like to form a pattern (STEP 11), thereby obtaining a final multilayer board. In the printed wiring board manufacturing method according to the present embodiment, only the core material 15 disposed in the center of the multilayer board is used as a cured substrate unit, and the uncured substrate units 16 to 19 are stacked on both sides of the substrate unit. Since the prepregs of the units 16 to 19 are cured, as shown in FIG. 8, all the conductor bumps stacked on both surfaces of the core material 15 are directed in the direction of the core material 15 (the center direction of the substrate). Therefore, since the bump shape inside the multilayer substrate is symmetric with respect to the center, a specific effect is obtained that the substrate is not easily warped or twisted after the heat treatment.

また、本実施形態に係るプリント配線基板製造方法において、上記コア材に用いる絶縁性材料としては、コア材の両側に配設するプリプレグより硬化性が低く、ちょうど2回の加熱により完全に硬化する組成配合の絶縁性材料を用いることが好ましい。このような組成配合の絶縁性材料を用いてコア材を形成することにより、このコア材の両側に未硬化の絶縁性材料を用いた基板ユニットを複数枚積層し、しかる後に加熱すると、コア材及びその両側に配設した未硬化の基板ユニットの絶縁性材料の硬化度が同じ程度にまで硬化するので、2度の加熱によりコア材の絶縁性材料が劣化することがなく、この劣化によるクラックやマイグレーションが未然に防止できるという特有の効果が得られる。   In the printed wiring board manufacturing method according to the present embodiment, the insulating material used for the core material is lower in curability than the prepreg disposed on both sides of the core material, and is completely cured by heating twice. It is preferable to use an insulating material having a composition. By forming a core material using an insulating material having such a composition, a plurality of substrate units using an uncured insulating material are laminated on both sides of the core material, and then heated to obtain a core material. Since the degree of cure of the insulating material of the uncured substrate unit disposed on both sides of the core material is cured to the same level, the insulating material of the core material is not deteriorated by heating twice, and cracks caused by this deterioration And a special effect that migration can be prevented.

(第3の実施形態)本実施形態では、積層する5層の基板ユニットのうち、中心側の3層のみに高ガラス転移型の絶縁性材料、例えばビスマレイドトリアジンレジンを用いたプリプレグを用いる一方、最上部側と最下部側の最外層の2層については高ピール強度型樹脂を用いたプリプレグを使用いた以外は前記第1の実施形態と同様の方法で多層板を形成した。   (Third Embodiment) In this embodiment, a prepreg using a high glass transition type insulating material, for example, a bismaleide triazine resin, is used for only the three layers on the center side among the five-layer substrate units to be laminated. For the two outermost layers on the uppermost side and the lowermost side, a multilayer board was formed by the same method as in the first embodiment except that a prepreg using a high peel strength resin was used.

本実施形態に係るプリント配線基板製造方法では、2種の異なるプリプレグを用いた基板ユニットを積層後に加熱して硬化する構成としたので、力学的強度、耐熱性、及び配線パターンとのピール強度が共に優れた多層板を得ることが出来た。   In the printed wiring board manufacturing method according to the present embodiment, since the board unit using two different prepregs is heated and cured after lamination, the mechanical strength, heat resistance, and peel strength with the wiring pattern are high. Both were able to obtain an excellent multilayer board.

なお、ここで最外層に用いる高ピール強度型絶縁材料基板としては配線パターンとのピール強度が1.2N/mm以上のものが好ましく、例えばガラス繊維強化エポキシ樹脂基板プリプレグなどが挙げられる。   Here, as the high peel strength type insulating material substrate used for the outermost layer, one having a peel strength of 1.2 N / mm or more with respect to the wiring pattern is preferable, and examples thereof include a glass fiber reinforced epoxy resin substrate prepreg.

この外層に用いる絶縁材料基板の配線パターンに対するピール強度を1.2N/mm以上に限定したのは、配線パターンに対するピール強度が1.2N/mmを下回ると、出来あがった本配線基板に電子部品を実装後、落下試験を行うと、前記部品が剥離してしまうためである。これは絶縁層と配線パターンとの密着強度が小さいことにより起こる。   The reason why the peel strength with respect to the wiring pattern of the insulating material substrate used for the outer layer is limited to 1.2 N / mm or more is that when the peel strength with respect to the wiring pattern is less than 1.2 N / mm, the printed wiring board has an electronic component. This is because, when a drop test is performed after mounting, the parts are peeled off. This occurs because the adhesion strength between the insulating layer and the wiring pattern is small.

本発明の第1の実施形態に係るプリント配線基板製造方法の手順を示した垂直断面図。FIG. 3 is a vertical sectional view showing the procedure of the printed wiring board manufacturing method according to the first embodiment of the present invention. 本発明の第1の実施形態に係るプリント配線基板製造方法の手順を示した垂直断面図。FIG. 3 is a vertical sectional view showing the procedure of the printed wiring board manufacturing method according to the first embodiment of the present invention. 本発明の第1の実施形態に係るプリント配線基板製造方法の手順を示した垂直断面図。FIG. 3 is a vertical sectional view showing the procedure of the printed wiring board manufacturing method according to the first embodiment of the present invention. 本発明の第1の実施形態に係るプリント配線基板製造方法の手順を示した垂直断面図。FIG. 3 is a vertical sectional view showing the procedure of the printed wiring board manufacturing method according to the first embodiment of the present invention. 本発明の第1の実施形態に係るプリント配線基板製造方法のフローチャート。The flowchart of the printed wiring board manufacturing method which concerns on the 1st Embodiment of this invention. 本発明の第2の実施形態に係るプリント配線基板製造方法の手順を示した垂直断面図。The vertical sectional view showing the procedure of the printed wiring board manufacturing method concerning a 2nd embodiment of the present invention. 本発明の第2の実施形態に係るプリント配線基板製造方法の手順を示した垂直断面図。The vertical sectional view showing the procedure of the printed wiring board manufacturing method concerning a 2nd embodiment of the present invention. 本発明の第2の実施形態に係るプリント配線基板製造方法の手順を示した垂直断面図。The vertical sectional view showing the procedure of the printed wiring board manufacturing method concerning a 2nd embodiment of the present invention. 本発明の第2の実施形態に係るプリント配線基板製造方法のフローチャート。The flowchart of the printed wiring board manufacturing method which concerns on the 2nd Embodiment of this invention. 従来の多層板の製造手順を図示した垂直断面図。The vertical sectional view which illustrated the manufacture procedure of the conventional multilayer board.

符号の説明Explanation of symbols

1…導体板、2…導体バンプ、3…絶縁材料基板、1a…配線パターン、4…フィルム、5…コア材。   DESCRIPTION OF SYMBOLS 1 ... Conductor board, 2 ... Conductor bump, 3 ... Insulation material board | substrate, 1a ... Wiring pattern, 4 ... Film, 5 ... Core material.

Claims (2)

導体板上に複数の略円錐状の導体バンプを形成する工程と、
前記導体バンプ上に未硬化の絶縁材料基板を配設する工程と、
前記絶縁材料基板が硬化しない温度において前記導体板及び前記絶縁材料基板を加圧し、前記導体バンプを貫通させる工程と、
前記導体板をパターニングして所定の配線パターンを備えた、前記導体バンプが前記絶縁基板に貫通した基板ユニットを形成する工程と、
前記未硬化の絶縁材料基板を有する基板ユニットを複数枚積層配置して多層板前駆体を形成する工程と、
前記多層板前駆体を加圧下に加熱して前記多層前駆体を硬化させる工程と
を具備することを特徴とするプリント配線基板の製造方法。
Forming a plurality of substantially conical conductor bumps on the conductor plate;
Disposing an uncured insulating material substrate on the conductor bump;
Pressurizing the conductive plate and the insulating material substrate at a temperature at which the insulating material substrate is not cured, and penetrating the conductive bumps; and
Patterning the conductor plate to provide a predetermined wiring pattern, and forming a substrate unit in which the conductor bumps penetrate the insulating substrate;
A step of forming a multilayer plate precursor by laminating a plurality of substrate units having the uncured insulating material substrate; and
Heating the multilayer board precursor under pressure to cure the multilayer precursor. A method for producing a printed wiring board, comprising:
硬化した絶縁材料基板の第1の面と第2の面とにそれぞれ配線パターンを備え、前記第1の面と第2の面とに形成された配線パターンどうしを電気的に導通させる導体バンプを内蔵するコア材を形成する工程と、
導体板上に複数の略円錐型の導体バンプを形成する工程と、
前記導体バンプ上に未硬化の絶縁材料基板を配設する工程と、
前記絶縁材料基板が硬化しない温度において前記導体板及び前記絶縁材料基板を加圧し、前記導体バンプを貫通させる工程と、
前記導体板をパターンニングして所定の配線パターンを備えた、前記導体バンプが前記絶縁基板に貫通した基板ユニットを形成する工程と、
前記未硬化の絶縁材料基板を有する基板ユニットを少なくとも1枚ずつ、前記コア材の両面に積層配置して多層板前駆体を形成する工程と、
前記多層板前駆体を加圧下に加熱して前記多層板前駆体を硬化させる工程と
を具備するプリント配線板の製造方法。
Conductive bumps are provided on the first surface and the second surface of the cured insulating material substrate, each having a wiring pattern, and electrically connecting the wiring patterns formed on the first surface and the second surface. Forming a core material to be embedded;
Forming a plurality of substantially conical conductor bumps on the conductor plate;
Disposing an uncured insulating material substrate on the conductor bump;
Pressurizing the conductive plate and the insulating material substrate at a temperature at which the insulating material substrate is not cured, and penetrating the conductive bumps; and
Patterning the conductor plate to provide a predetermined wiring pattern, and forming a substrate unit in which the conductor bumps penetrate the insulating substrate;
Forming a multilayer plate precursor by laminating and arranging at least one substrate unit having the uncured insulating material substrate on both surfaces of the core material;
Heating the multilayer board precursor under pressure to cure the multilayer board precursor.
JP2006253034A 2006-09-19 2006-09-19 Method for manufacturing printed wiring board Expired - Fee Related JP4417938B2 (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009004377A (en) * 2007-06-22 2009-01-08 Samsung Electro Mech Co Ltd Conductive paste, printed circuit board using the same, and its manufacturing method
JP2010056499A (en) * 2008-07-28 2010-03-11 Panasonic Electric Works Co Ltd Method of manufacturing multilayer circuit board, and multilayer circuit board
JP2010080543A (en) * 2008-09-24 2010-04-08 Dainippon Printing Co Ltd Method and apparatus for manufacturing printed wiring board and printed wiring board
US9082438B2 (en) 2008-12-02 2015-07-14 Panasonic Corporation Three-dimensional structure for wiring formation
US9332650B2 (en) 2008-04-30 2016-05-03 Panasonic Corporation Method of producing multilayer circuit board
JP2022026189A (en) * 2020-07-30 2022-02-10 大日本印刷株式会社 Sheet with conductive material, laminated plate, mobile object, and manufacturing method of sheet with conductive material

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009004377A (en) * 2007-06-22 2009-01-08 Samsung Electro Mech Co Ltd Conductive paste, printed circuit board using the same, and its manufacturing method
US8298447B2 (en) 2007-06-22 2012-10-30 Samsung Electro-Mechanics Co., Ltd. Conductive paste, printed circuit board, and manufacturing method thereof
US9332650B2 (en) 2008-04-30 2016-05-03 Panasonic Corporation Method of producing multilayer circuit board
JP2010056499A (en) * 2008-07-28 2010-03-11 Panasonic Electric Works Co Ltd Method of manufacturing multilayer circuit board, and multilayer circuit board
JP2010080543A (en) * 2008-09-24 2010-04-08 Dainippon Printing Co Ltd Method and apparatus for manufacturing printed wiring board and printed wiring board
US9082438B2 (en) 2008-12-02 2015-07-14 Panasonic Corporation Three-dimensional structure for wiring formation
JP2022026189A (en) * 2020-07-30 2022-02-10 大日本印刷株式会社 Sheet with conductive material, laminated plate, mobile object, and manufacturing method of sheet with conductive material
JP7494633B2 (en) 2020-07-30 2024-06-04 大日本印刷株式会社 Conductor-attached sheet, laminated plate, movable body, and method for manufacturing conductor-attached sheet

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