JP2012109320A - Power amplifier - Google Patents

Abstract

A plurality of transistors are operated uniformly to achieve low power consumption and good distortion characteristics.
A power amplifier for amplifying a high-frequency signal, which includes an upper electrode and a lower electrode, and a matching capacitor to which a high-frequency signal is input and a high-frequency signal output from the lower electrode of the matching capacitor. A plurality of transistors 110 that amplify signals are arranged in a predetermined direction, and in a region adjacent to the transistor columns, grounded via holes 170 are provided at substantially equal distances from both ends of the transistor columns. The formed lower electrode 120b is a microstrip line arranged so that a high-frequency signal is evenly distributed across the via hole 170, and is connected to the base terminals of the plurality of transistors 110.
[Selection] Figure 2

Description

  The present invention relates to a power amplifier that amplifies a high-frequency signal, and particularly to a power amplifier having a plurality of bipolar transistors.

  In recent years, the power consumption of wireless terminals has been increasing with the expansion of the market of wireless terminals that enable more advanced applications such as smart phones as well as mobile phones mainly intended for voice calls. For this reason, there is an increasing demand for lower power consumption of a transmission power amplifier that consumes the maximum current in the radio unit used in the radio terminal.

  For example, a power amplifier using a bipolar transistor, particularly, a heterojunction transistor (hereinafter referred to as HBT) using a compound semiconductor is generally used in a transmitter of a wireless terminal. In particular, the present invention relates to a layout method of a plurality of HBTs (multi-finger HBTs) that greatly affects the power consumption characteristics of a power amplifier.

  Since the HBT is a heating element, the thermal uniform operation of the plurality of HBTs and the power consumption characteristics have a correlation. Accordingly, various HBT layouts have been devised in order to realize a thermal uniform operation. Among them, the layout that is most commonly used is a layout in which a plurality of transistor columns, generally even-numbered columns, are formed by forming a transistor column composed of a plurality of HBTs.

  In such a layout, a high frequency signal is input in units of transistor arrays, and output signals that are amplified and output for each transistor array are synthesized. Then, an output signal is drawn out from an output pad connected outside the semiconductor chip.

  FIG. 1 is a diagram showing a layout of a conventional power amplifier 10 described in Patent Document 1. In FIG.

  The power amplifier 10 has two transistor rows in which a plurality of HBTs are arranged. That is, a plurality of HBTs are arranged in one row between the common base terminal 11 and the two common emitter terminals 12 (lateral direction in FIG. 1). In the power amplifier 10 shown in FIG. 1, the high-frequency signal input to the common base terminal 11 is distributed to the upper and lower transistor rows and output from the common collector terminal 13.

US Pat. No. 5,321,279

  However, the above-described conventional techniques have a problem in that a plurality of transistors cannot be operated uniformly, causing an increase in power consumption and a deterioration in distortion characteristics.

  In the case of the layout as shown in FIG. 1, a plurality of HBTs constitute a column, and an input signal and an output signal advance in parallel to the column direction. For this reason, the input signal is not input equally to each HBT (the input signal is attenuated in the HBT far from the input side). Also, the output signal is not uniform because the distance from the output pad is different (the HBT far from the output pad causes attenuation of the output signal).

  As a result, each HBT does not have a uniform heat distribution. In general, it is known that the temperature near the center of the row is high. Since the heat distribution is non-uniform, the operation of each HBT is also non-uniform, causing an increase in power consumption and a deterioration in distortion characteristics.

  Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a power amplifier that can operate a plurality of transistors uniformly and has low power consumption and good distortion characteristics. To do.

  In order to solve the above problems, a power amplifier according to an aspect of the present invention is a power amplifier that amplifies a high-frequency signal, and includes an upper electrode and a lower electrode, and a matching capacitor to which the high-frequency signal is input; A plurality of bipolar transistors for amplifying a high-frequency signal output from the lower electrode of a matching capacitor, arranged in a predetermined direction, and at both ends of the transistor row in a region adjacent to the transistor row A grounded first via hole is formed at a substantially equal distance from the lower electrode, and the lower electrode is a microstrip line arranged so that the high-frequency signal is evenly distributed across the first via hole; Connected to base terminals of the plurality of transistors.

  According to this configuration, since the microstrip line distributed in two is formed so as to sandwich the grounded first via hole at the center portion, the electric lines of force of the signal passing through the microstrip line are grounded. Concentrate on the via hole. Therefore, interference through the via hole can be greatly reduced, and a uniform signal can be input to each of the plurality of transistors. Accordingly, since the inputs of the plurality of transistors can be made uniform, the plurality of transistors can be operated uniformly. Thereby, an increase in power consumption and deterioration of distortion characteristics can be suppressed.

  The power amplifier may further include a grounded emitter wiring connected to the grounded first via hole and the emitters of the plurality of bipolar transistors.

  According to this configuration, the first via hole also serves as the emitter ground of the plurality of transistors. Thereby, since one via hole serves two functions, it is possible to reduce the area.

  Further, a second via hole may be further formed outside the lower electrode sandwiching the first via hole in the center, and the emitter grounding wiring may be further connected to the second via hole.

  Thereby, emitter grounding can be strengthened by a plurality of via holes.

  The emitter grounding wiring may be the uppermost wiring.

  According to the power amplifier of the present invention, a plurality of transistors can be operated uniformly, and low power consumption and good distortion characteristics can be realized.

It is a figure which shows the layout of the conventional power amplifier. It is a figure which shows an example of the layout of the power amplifier which concerns on embodiment of this invention. It is a figure which shows another example of the layout of the power amplifier which concerns on embodiment of this invention.

  Hereinafter, embodiments of a power amplifier according to the present invention will be described in detail with reference to the drawings.

  A power amplifier according to an embodiment of the present invention is a power amplifier that amplifies a high-frequency signal and has an upper electrode and a lower electrode, and is output from a matching capacitor to which a high-frequency signal is input and a lower electrode of the matching capacitor. And a transistor array in which a plurality of bipolar transistors that amplify the high-frequency signal are arranged in a predetermined direction. In a region adjacent to the transistor row, a grounded via hole is formed at a substantially equal distance from both ends of the transistor row. The lower electrode is a microstrip line arranged so that a high-frequency signal is evenly distributed across the via hole, and is connected to the base terminals of a plurality of transistors.

  FIG. 2 is a diagram showing an example of the layout of the power amplifier 100 according to the embodiment of the present invention. The power amplifier 100 according to the embodiment of the present invention includes a plurality of bipolar transistors and amplifies a high frequency signal.

  As shown in FIG. 2, the power amplifier 100 includes a plurality of transistors 110, a matching capacitor 120, a collector row 130, a collector pad 140, a bias wiring 150, and an emitter wiring 160. The power amplifier 100 has a via hole 170 formed therein.

  The plurality of transistors 110 are arranged in one column along a predetermined direction, and constitute a transistor column. The bases of the plurality of transistors 110 are connected to the matching capacitor 120, the emitters are connected to the emitter wiring 160, and the collectors are connected to the collector row 130. An input signal is input to the base of a transistor array including a plurality of transistors 110 via a matching capacitor 120.

  The matching capacitor 120 is a matching capacitor and includes an upper electrode 120a and a lower electrode 120b. As shown in FIG. 2, the matching capacitor 120 is formed so as to sandwich the via hole 170 in a region adjacent to the transistor row and in which the via hole 170 is formed in the central portion.

  In addition, an insulating film is formed between the upper electrode 120a and the lower electrode 120b (not shown). The lower electrode 120b is a microstrip line arranged so that a high-frequency signal is evenly distributed across the via hole 170, and is connected to the base terminals of the plurality of transistors 110. For example, the lower electrode 120b has a line-symmetric shape with the middle line at both ends of the transistor array as an axis. The upper electrode 120a is formed above the lower electrode 120b with the via hole 170 interposed therebetween.

  Note that the opposing ground surface of the microstrip line is the back surface (not shown) of the chip on which the power amplifier is formed. In addition, the via hole 170 is etched through the semiconductor substrate, embedded with a conductor, and electrically connected to the back surface of the chip.

  A high frequency signal is input to the upper electrode 120a as an input signal. This input signal reaches the lower electrode 120b through the insulating film. The lower electrode 120b is also a microstrip line, and the line is distributed into two. This is because the progress of the signal through the microstrip line needs to progress uniformly to all the bases of the plurality of transistors 110 arranged in one row. The lower electrode 120b distributed in two is further expanded in the base direction of the plurality of transistors 110 as shown in FIG.

  The collector row 130 is disposed in parallel between the collectors of the plurality of transistors 110 and the collector pad 140. The collector column 130 outputs a signal amplified by each of the plurality of transistors 110 to the collector pad 140.

  The collector pad 140 is an example of an output terminal, and outputs a signal amplified to the outside by wire bonding, for example.

  The bias wiring 150 is a wiring for applying a base voltage, and is connected to the lower electrode 120b. For example, an output voltage from a bias circuit configured in the same chip is applied to the bases of the plurality of transistors 110 via the bias wiring 150 and the lower electrode 120b.

  The emitter wiring 160 is a wiring for grounding the emitters of the plurality of transistors 110. The emitter wiring 160 is connected to the grounded via hole 170 and the emitters of the plurality of transistors 110. The emitter wiring 160 is, for example, the uppermost layer wiring.

  The via hole 170 is grounded, and is formed at a substantially equal distance from both ends of the transistor array in a region adjacent to the transistor array including the plurality of transistors 110. The via hole 170 is filled with a conductor, or the inner wall is covered with the conductor. The lower electrode 120b is a microstrip line that is symmetrically divided in the vertical direction with the via hole 170 interposed therebetween.

  The embodiment of the present invention is characterized in that a grounded via hole 170 is provided between the distributed microstrip lines.

  Even if the signals traveling on the microstrip line are physically distributed, the electric lines of force of the signals are three-dimensional and thus usually interfere with each other. However, as shown in FIG. 2, when the via hole 170 grounded at the center is formed, the electric lines of force concentrate on the via hole 170, so that the interference with the line through the via hole 170 can be greatly reduced. . That is, the via hole 170 has a role of signal separation (isolation). As a result, the uniformly distributed signals are spread and input in the base direction of the plurality of transistors 110 arranged in one column.

  In the embodiment of the present invention, the emitter wiring 160 further connects the grounded via hole 170 and the emitters of the plurality of transistors 110. That is, the via hole 170 also serves as a grounded emitter for the plurality of transistors 110. Therefore, one via hole can have two functions, and the area can be reduced, which is advantageous in terms of cost.

  Hereinafter, another example of the power amplifier according to the embodiment of the present invention will be described.

  FIG. 3 is a diagram showing another example of the layout of the power amplifier 200 according to the embodiment of the present invention. A power amplifier 200 according to another example of the embodiment of the present invention includes a plurality of bipolar transistors and amplifies a high frequency signal.

  As shown in FIG. 3, the power amplifier 200 includes a plurality of transistors 210, a matching capacitor 220, a collector row 230, a collector pad 240, a bias wiring 250, and an emitter wiring 260. In addition, via holes 270a and 270b are formed in the power amplifier 200.

  For example, the power amplifier 200 according to another example of the embodiment of the present invention is formed on a semiconductor substrate. An example of the semiconductor substrate used at this time is a GaAs substrate. A plurality of transistors 210 and the like are formed by epitaxially growing each functional layer on a GaAs substrate.

  The plurality of transistors 210 are arranged in one column along a predetermined direction, and constitute a transistor column. For example, the emitter layer of the plurality of transistors 210 is a layer made of InGaP, the base layer is a p-type doped GaAs layer, and the collector layer is an N-type doped GaAs layer. That is, the plurality of transistors 210 are HBTs in which the emitter layer and the base layer are heterojunctions of layers having different materials.

  The number of transistors of the power amplifier 200 formed on the semiconductor substrate varies depending on the required output level. In the present embodiment, as an example, UMTS (Universal Mobile Telecommunications System) modulation, which is currently called 3G, which has the widest application field, is an example. In case of about 28 dBm. In this case, the power amplifier 200 is a two-stage amplifier circuit, with the first stage having about 5 cells and the final stage having about 18 cells. FIG. 3 shows the final stage of the power amplifier 200, in which 18-cell transistors 210 are arranged in one row.

  In FIG. 3, the left side of the transistor array is the base side, and the right side is the collector. A collector row 230 is formed on the right side. As shown in FIG. 3, the collector row 230 is arranged in parallel with the collector pad 240. That is, the collector output of each of the plurality of transistors 210 is output to the collector pad 240 without being collected once in the collector row as in the prior art.

  The collector pad 240 is an example of an output terminal, and outputs a signal amplified to the outside by wire bonding, for example. For example, the amplified signal can be taken out by a wire bond made of Au having a diameter of about 25 microns.

  The matching capacitor 220 is a matching capacitor and includes an upper electrode 220a and a lower electrode 220b. As shown in FIG. 3, the matching capacitor 220 is formed so as to sandwich the via hole 270a in a region adjacent to the transistor row and in which the via hole 270a is formed in the central portion.

  The upper electrode 220a receives, as an input signal for the column of the plurality of transistors 210, an amplification signal of a pre-stage amplifier composed of about five HBTs. The upper electrode 220a is formed of, for example, a material having a thickness of about 3 μm whose main material is Au. The upper electrode 220a also serves as a line through which an input signal passes.

  An insulating film made of, for example, 100 nm SiN is deposited under the upper electrode 220a (not shown). Further, a lower electrode 220b is formed under the insulating film.

  The lower electrode 220b is made of Au of about 1 μm. The amplification signal in the previous stage is transmitted to the lower electrode 220b through the insulating film, and the signal passes through the microstrip line formed by the lower electrode 220b and is input to the base terminals of the plurality of transistors 210.

  The lower electrode 220b is a microstrip line arranged so that a high-frequency signal is evenly distributed across the via hole 270a, and is connected to the base terminals of the plurality of transistors 210. The lower electrode 220b is divided up to the input to the base terminal, and a circular, grounded via hole 270a having a diameter of about 50 μm is provided at the center thereof.

  Since the lower electrode 220b is divided into two, the upper electrode 220a is also distributed in the same manner. Since the upper and lower overlapping portions of the lower electrode 220b and the upper electrode 220a serve as capacitance, for example, when the matching capacitance 220 requires 10 pF in total, it is divided into 5 pF.

  The collector row 230, collector pad 240, and bias wiring 250 are the same as the collector row 130, collector pad 140, and bias wiring 150 described above.

  The emitter wiring 260 is a wiring for grounding the emitters of the plurality of transistors 210. The emitter wiring 260 is connected to the via holes 270 a and 270 b and the emitters of the plurality of transistors 210.

  The via hole 270a is grounded, and is formed at a substantially equal distance from both ends of the transistor row in a region adjacent to the transistor row composed of the plurality of transistors 210. The lower electrode 220b is a microstrip line that is symmetrically divided in the vertical direction across the via hole 270a. Note that the opposing ground surface of the microstrip line is the back surface (not shown) of the chip on which the power amplifier is formed.

  The via holes 270a and 270b are penetrated by etching the semiconductor substrate and connected to the ground plane on the back surface. The two signals of the microstrip line of the lower electrode 220b are isolated from each other by the via hole 270a. Therefore, they are evenly distributed without interfering with each other. The via hole 270a is connected to the emitter of the transistor array by the emitter wiring 260, and also serves as a grounded emitter.

  Furthermore, in the power amplifier 200 according to another example of the embodiment of the present invention, a via hole 270b is further formed outside the matching capacitor 220 sandwiching the via hole 270a in the center. Specifically, as shown in FIG. 3, two via holes 270b for grounding are provided on both outer sides of the matching capacitor 220 to strengthen the grounding.

  This grounding enhancement is connected to the grounding surface on the back surface of the semiconductor substrate through the via hole 270b, and since there is an inductance of the wiring between them, it is performed in order to reduce the inductance. By reducing the inductance, the high frequency gain performance is improved, and as a result, low power consumption can be realized.

  As described above, the power amplifiers 100 and 200 according to the embodiment of the present invention amplify the high-frequency signal output from the matching capacitors 120 and 220 to which the high-frequency signal is input and the lower electrodes 120b and 220b of the matching capacitor. And a transistor array in which a plurality of transistors 110 are arranged in a predetermined direction. The lower electrodes 120b and 220b are microstrip lines arranged so as to be evenly separated with the grounded via holes 170 and 270a interposed therebetween, and are connected to the base terminals of the plurality of transistors 110 and 210.

  As a result, the microstrip line distributed in two is formed so that the grounded via holes 170 and 270a are sandwiched between the central portions. Concentrate on 270a. Therefore, interference through the via holes 170 and 270a can be greatly reduced, and a uniform signal can be input to each of the plurality of transistors 110 and 210.

  The plurality of transistors 110 and 210 are arranged in a line in parallel with the collector pads 140 and 240 that function as output terminals. For this reason, the amplified signal is uniformly output from each of the plurality of transistors 110 and 210.

  Thus, according to the power amplifier according to the embodiment of the present invention, since the input / output of the plurality of transistors can be made uniform, the plurality of transistors can be operated uniformly. Therefore, an increase in power consumption and deterioration of distortion characteristics can be suppressed.

  As mentioned above, although the power amplifier which concerns on this invention was demonstrated based on embodiment, this invention is not limited to these embodiment. Unless it deviates from the meaning of this invention, what made the various deformation | transformation which those skilled in the art can consider to the said embodiment is also contained in the scope of the present invention.

  For example, the emitter wirings 160 and 260, which are wirings for grounding the emitter, may be formed in the same layer as the upper electrodes 120a and 220a of the matching capacitors 120 and 220.

  2 and 3, the corners and sides of each component are linearly described. However, for the reasons of manufacturing, those in which the corners and sides are rounded are also included in the present invention. .

  In FIG. 2, the lower electrode 120b and the emitter wiring 160 may be separated or overlapped when viewed from above. In consideration of heat dissipation, it is advantageous that the emitter wirings overlap each other because the electrode surface connected to the via hole can be made larger. The arrangement relationship between the lower electrode 220b and the emitter wiring 260 in FIG. 3 is the same.

  Moreover, all the numbers used above are illustrated for specifically explaining the present invention, and the present invention is not limited to the illustrated numbers. Further, the materials of the constituent elements shown above are all exemplified for specifically explaining the present invention, and the present invention is not limited to the exemplified materials.

  The configuration of the power amplifier is for illustrating the present invention in detail, and the power amplifier according to the present invention is not necessarily provided with all of the above configurations. In other words, the power amplifier according to the present invention only needs to have a minimum configuration capable of realizing the effects of the present invention.

  According to the present invention, there is an effect that low power consumption and good distortion characteristics can be realized, and it can be used as, for example, a power amplifier provided in a wireless terminal or the like.

10, 100, 200 Power amplifier 11 Common base terminal 12 Common emitter terminal 13 Common collector terminal 110, 210 Transistor 120, 220 Matching capacitance 120a, 220a Upper electrode 120b, 220b Lower electrode 130, 230 Collector row 140, 240 Collector pad 150, 250 Bias wiring 160, 260 Emitter wiring 170, 270a, 270b Via hole

Claims (4)

A power amplifier for amplifying a high-frequency signal,
A matching capacitor having an upper electrode and a lower electrode, to which the high-frequency signal is input;
A plurality of bipolar transistors for amplifying a high-frequency signal output from the lower electrode of the matching capacitor, and a transistor row arranged in a predetermined direction,
In a region adjacent to the transistor row, a grounded first via hole is formed at a substantially equal distance from both ends of the transistor row,
The lower electrode is
A power amplifier, which is a microstrip line arranged so that the high-frequency signal is evenly distributed across the first via hole, and is connected to base terminals of the plurality of transistors. The power amplifier according to claim 1, further comprising a grounded emitter wiring connected to the grounded first via hole and the emitters of the plurality of bipolar transistors. A second via hole is further formed outside the lower electrode sandwiching the first via hole in the center,
The power amplifier according to claim 2, wherein the grounded emitter wiring is further connected to the second via hole. The power amplifier according to claim 2, wherein the emitter grounding wiring is an uppermost wiring.

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