JP2500664B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a pin grid array (P) in which lead pins are arranged in a grid pattern.
The present invention relates to a semiconductor device having a GA) type package structure.

[0002]

2. Description of the Related Art As a semiconductor device having a PGA package structure, for example, as shown in FIG. 5, an IC chip 22 is mounted on a cavity 21a of a ceramic substrate 21, and then an IC chip 22 is mounted on a wiring circuit 23 provided on the ceramic substrate 21.
Are connected by wires 24 to electrically connect to the lead pins 25 arranged in a grid on the ceramic substrate 21 via the wiring circuit 23, and the IC chip 22 is capped by the cap 26.
A structure sealed by is proposed. This ceramic PGA has high reliability and good heat dissipation and is suitable for increasing the number of pins. However, when the wiring circuit to be formed on the ceramic substrate is formed in multiple layers, the manufacturing process is complicated, resulting in high cost. There is a problem that becomes.

Therefore, a package in which the formation of a wiring circuit is simplified has been proposed, one of which is Japanese Patent Laid-Open No. 3-45.
There is one described in Japanese Patent No. 649. FIG. 6 is a sectional view thereof, which is configured as a plastic PGA (hereinafter referred to as PPGA). In this PPGA, a wiring circuit 32 of one layer is formed on an insulating substrate 31, and then an insulating tape 33 having a wiring circuit 34 formed on the upper surface is adhered with an insulating resin 35 to form a multilayer wiring circuit. Then, the lead pin 37 is inserted into the through hole 36 formed so as to penetrate the insulating substrate 31, the insulating tape 33, etc., and the brazing material 38 such as solder is used for electrical and mechanical connection.
Further, the IC chip 39 is mounted in the cavity 31a provided in the insulating substrate 31, and the wire 40 is attached to the wiring circuit 34 and the like.
Connect with. Then, a PPGA package is constructed by sealing with a cap (not shown).

[0004]

In this known PPGA, since the insulating tape 33 is adhered to the insulating substrate 31 with the insulating resin 35 to form a multilayer wiring circuit on the insulating substrate 31, the wiring circuit of the wiring circuit is formed. The manufacturing process can be simplified and the cost can be reduced as compared with the ceramic PGA. However, since the IC chip 39 is connected to the wiring circuit by the wire 40 as in the case of the ceramic PGA, there is a problem that the number of steps for that is increased. In addition, when wire bonding is performed on the wiring circuit 34 provided on the insulating tape 33, the insulating tape 33 and the insulating resin 35 are easily deformed due to pressure during bonding to be dented, and highly reliable wire connection cannot be performed. There is also. An object of the present invention is to provide a semiconductor device that reduces the number of manufacturing steps and enables highly reliable electrical connection.

[0005]

According to the present invention, there is provided a semiconductor device comprising:
A film circuit board is mounted on a base substrate on which a plurality of lead pins are supported in a penetrating state, an IC chip is mounted on the film circuit board, and the film circuit board is sealed with a cap. In this configuration, the IC chip is electrically connected to the IC chip and the back surface thereof is electrically connected to the lead pin. That is, the film circuit board
Wiring circuits are formed on the front and back surfaces of the insulating film with conductor foils, respectively, and the wiring circuits on each surface are electrically connected to each other through the through-holes.
A pad connection portion corresponding to the electrode pad of the chip is formed, and a pin connection portion corresponding to the lead pin is formed in a part of the wiring circuit on the back surface thereof. In this case, bumps are formed on the pad connection portions on the surface of the film circuit board, and the bumps are directly connected to the electrode pads of the IC chip. Further, the pin connection portion on the back surface of the film circuit board is in contact with the end portion of the lead pin protruding on the upper surface of the base board and is soldered. The base substrate is formed of a glass epoxy substrate, a lead pin is inserted into a through hole formed in the base substrate and bonded with an adhesive material, and the cap is bonded to the base substrate around it. Alternatively, the base substrate is formed of a metal substrate, a lead pin is inserted into a through hole formed in the base substrate and glass-bonded, and the cap is welded to the base substrate around the periphery.

[0006]

Since the IC chip is mounted on the film circuit board by the flip chip method and electrically connected, the electric connection by wire bonding becomes unnecessary. Further, the film circuit board has a multilayered wiring circuit, and a part of the wiring circuit is connected to the lead pins respectively, so that the IC chip and the lead pins can be connected.

[0007]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a partially cutaway plan view of one embodiment of the present invention,
2 is a sectional view thereof, and FIG. 3 is an enlarged sectional view of a main part. In these figures, a large number of holes 2 are formed in a grid pattern in a base substrate 1 made of glass epoxy resin, one end of a lead pin 3 is inserted into each hole 3 and fixed to the base substrate 1 with an adhesive 4. To be done. At this time, one end of each lead pin 3 is formed so as to slightly project above the surface of the base substrate 1. A film circuit board 5 is mounted on the base board 1. This film circuit board 5
For example, wiring circuits 7a, 7 made of Cu foil are formed on the front surface and the back surface of the polyimide tape 6 having a thickness of about 25 μm.
b is formed, and 0.1 is provided at the required position of this tape.
A through hole 8 of about mφ is provided, and Cu is formed on the inner surface of the through hole 8.
The through holes 9 are formed by forming the plating to a thickness of 30 to 40 μm, and the wiring circuits 7a and 7b on the front and back surfaces are formed.
Electrically connect to each other.

A part of the through hole 8 has a size of 0.3 × 0.5 m.
The size of the bumps 10 is formed to a size of m, Cu plating is formed sufficiently thick on the inner surface thereof, and bumps 10 projecting from about 5 to 15 μm on the surface of the tape are formed as pad connection portions connected to the electrode pads of the IC chip. On the surface of this bump 10,
After Ni plating 2-3 μm, Au plating 10-
It is formed to a thickness of 20 μm. Alternatively, instead of Au plating, solder plating is formed to a thickness of 20 to 30 μm. The bumps 10 formed on the surface of the film circuit board 5 are formed at positions corresponding to the electrode pads of the IC chip to be mounted. Also, the film circuit board 5
On the back surface of the wiring board 7b, there are formed pin connection portions 11 arranged in a grid pattern so as to correspond to the large number of lead pins 3 supported by the base substrate 1.

Then, an IC chip (four IC chips in this embodiment) 1 is provided on the surface of the film circuit board 5.
After the second electrode pad 13 is aligned with the bump 10, the electrode pad 13 is placed downward on the film circuit board 5 and is heated under pressure in a nitrogen atmosphere, so that each electrode pad 13 Are respectively connected to the corresponding bumps 10 by a brazing material 14 such as solder, whereby the IC chip 12 is mechanically and electrically mounted on the film circuit board 5. Further, the film circuit board 5 on which the IC chip 12 is mounted is mounted on the base substrate 1, and the pin connection portion 11 formed by the wiring circuit provided on the back surface of the lead circuit board 3 supported by the base substrate 1. It is abutted against one end and connected by a brazing material 15 such as solder. This connection can be made similarly to the connection between the electrode pad 13 and the bump 10. Then, a cap 16 made of aluminum whose surface is anodized or having a coefficient of thermal expansion close to that of the film circuit board is covered on the base substrate 1 so as to cover the IC chip 12, and the periphery of the cap 16 is covered by the base substrate. By adhering in the peripheral portion of 1, the inside is sealed and the PPGA is completed.

Therefore, in the PPGA having this configuration, I
Since the C chip 12 is mounted on the film circuit board 5 by the flip chip method, the step of wire bonding the IC chip 12 is not necessary, and the manufacturing steps can be reduced. Further, no bonding pressure is applied to the film circuit board 5 when the IC chip 12 is mounted, and the reliability of wire bonding is not deteriorated. Further, since the IC chip 12 and the wiring circuit 7a are not connected by wire bonding, the capacitance and the inductance in the film circuit board 5 are reduced, the semiconductor device can operate at high speed, and the wire loop is accommodated. It is not necessary to secure a space for making the inside of the package, and the package can be thinned.

Here, the electrode pad 13 of the IC chip 12
If the bumps are formed on the film circuit board 5, it is not necessary to provide the bumps on the film circuit board 5, and only the bonding portion may be formed on a part of the wiring circuit 7a. Further, since the lead pins 3 and the pin connecting portions 11 are directly connected to each other, there is no need to form a wiring circuit on the base substrate 1, and the structure of the base substrate can be simplified and the manufacturing can be facilitated.

FIG. 4 is an enlarged sectional view of the essential parts of the second embodiment of the present invention. In this embodiment, the base substrate 1A is formed of a metal plate, the holes 2 are formed in a lattice shape of the base substrate, the lead pins 3 are inserted therein, and the glass 4A is heat-sealed. Then, the IC chip 12 is mounted on the film circuit board 5, and the pin connection portion 11 formed on the back surface of the film circuit board 5 is positioned with respect to one end portion of each lead pin 3 and then heat-connected. In this embodiment, bumps are not formed on the film circuit board 5, electrode pads are formed on a part of the wiring circuit 7a, and the bumps 10A provided on the IC chip 12 are connected by the brazing material 14. . Then, a material formed of a Cu plate or having a coefficient of thermal expansion close to that of a film circuit board is used as the cap 16 to cover the base substrate 1A so as to cover the IC chip, and the periphery of the cap 16 is covered with the periphery of the base substrate 1A. It is sealed by projection welding.

Also in the structure of this embodiment, the same effect as that of the first embodiment can be obtained. In addition to this, in this embodiment, since the base substrate 1A is made of metal, the heat generated in the IC chip 12 is also radiated from the back surface side of the base substrate 1A via the film circuit board 5. , PPGA can be improved in heat dissipation.

Although each of the above embodiments shows the case where four IC chips are mounted on one film circuit board, the present invention can be applied to the case where a different number of IC chips are mounted. Needless to say. Further, in the first embodiment, since the base substrate is formed of an insulating material, a wiring circuit connected to the lead pins is provided on the surface thereof, and the pin connection portion on the back surface of the film circuit substrate is connected to this wiring circuit. With this configuration, the pin connection part can be installed at any position without being restricted by the arrangement of the lead pins,
It is also possible to increase the degree of freedom in the pattern design of the wiring circuit.

[0015]

As described above, according to the present invention, an IC chip is mounted via a film circuit board on a base substrate on which a plurality of lead pins are supported in a penetrating state, and the film circuit board has a surface thereof. Since it is electrically connected directly to the IC chip and is electrically connected to the lead pin on the back surface thereof, it is not necessary to connect the IC chip by wire bonding, the manufacturing process can be simplified, and the cost can be reduced. Further, by mounting the IC chip on the film circuit board by the flip chip method, it is possible to realize a highly reliable connection without deterioration in reliability caused by wire bonding. Furthermore, by electrically connecting the film circuit board directly to the leads of the base board,
Since it is not necessary to form a wiring circuit on the base substrate, the structure of the base substrate can be simplified and the number of manufacturing steps can be reduced. In addition, the base substrate can be made of metal, so that the heat dissipation from the base substrate can be improved. Furthermore, by bump-connecting the IC chip, the capacitance and the inductance in the filter circuit board can be reduced, so that the semiconductor device can operate at high speed.

[Brief description of drawings]

FIG. 1 is a partially cutaway plan view of a first embodiment of the present invention.

FIG. 2 is a longitudinal sectional view of FIG.

3 is an enlarged cross-sectional view of a main part of FIG.

FIG. 4 is an enlarged sectional view of a main part of the second embodiment of the present invention.

FIG. 5 is a sectional view of an example of a conventional ceramic PGA.

FIG. 6 is a sectional view of an example of a conventional PPGA.

[Explanation of symbols]

 1, 1A Base substrate 3 Lead pin 5 Film circuit board 7a, 7b Wiring circuit 10 Bump 11 Pin connection part 12 IC chip 13 Electrode pad 14, 15 Brazing material 16 Cap

Claims (6)

(57) [Claims] 1. A base substrate on which a plurality of lead pins are supported in a penetrating state, a film circuit substrate mounted on the base substrate, and an I mounted on the film circuit substrate.
A C chip and a cap that is attached to the base substrate and seals the film circuit board or the IC chip. The film circuit board has the IC on the surface thereof.
A semiconductor device, which is directly electrically connected to a chip and electrically connected to the lead pin on the back surface thereof. 2. The film circuit board has wiring circuits formed on the front and back surfaces of an insulating film with conductor foils, respectively, and the wiring circuits on each surface are electrically connected to each other by through holes, and the wiring circuits on the surface are 2. The semiconductor device according to claim 1, wherein a pad connection portion corresponding to an electrode pad of the IC chip is partially formed, and a pin connection portion corresponding to the lead pin is formed in a part of a wiring circuit on the back surface thereof. 3. The semiconductor device according to claim 2, wherein bumps are formed on the pad connection portions on the surface of the film circuit board, and the bumps are directly connected to the electrode pads of the IC chip. 4. The semiconductor device according to claim 2, wherein the pin connection portion on the back surface of the film circuit board is abutted against and soldered to the end portion of the lead pin protruding on the upper surface of the base substrate. 5. The base substrate is formed of a glass epoxy substrate, a lead pin is inserted into a through hole formed in the base substrate and bonded with an adhesive material, and the cap is bonded to the base substrate around the periphery. The semiconductor device according to any one of 1 to 4. 6. The base substrate is formed of a metal substrate, a lead pin is inserted into a through hole formed in the base substrate and is glass-bonded, and the cap is welded to the base substrate at the periphery thereof. Any semiconductor device.