JP2513253B2 - PWM inverter control circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a control circuit for a pulse width modulation type (hereinafter referred to as PWM type) inverter.

[Conventional technology]

The output voltage of the PWM inverter is proportional to the product of the DC voltage of the inverter main circuit and the ON / OFF time ratio of the switching elements that make up the inverter main circuit. Therefore, if the DC voltage changes, the output voltage also changes. To do. This DC voltage is usually obtained by converting the received voltage (commercial power supply voltage) to DC by a rectifier, so there is a ripple fluctuation and the received voltage is not constant. However, conventionally, some correction or correction means is provided to suppress the fluctuation of the AC output voltage.

FIG. 3 shows an example of a conventional PWM single-phase inverter provided with this type of correction means. In the figure, 1 is a commercial power supply, 2 is a full-wave rectifier, 3 is a smoothing capacitor (electrolytic capacitor), 4 is a sinusoidal modulation PWM type single-phase transistor inverter (hereinafter referred to as PWM inverter), and 5 is an inverter load. , For example, a drive coil of an electromagnetic vibrator.

6 is a DC voltage detector for detecting the voltage of the DC circuit of the PWM inverter 4, which is the DC voltage across the capacitor 3.
Detect E _D. 7 is a gain setter (however, in this example,
Gain K = 1), 7A is a gain selection circuit of the gain setting unit 7, 8 is a multiplier, and 9 is a triangular wave signal generator. The triangular wave signal generator 9 generates a triangular wave signal V _CO having a constant amplitude,
From the multiplier 8, a variable-amplitude triangular wave signal (which serves as a carrier wave) v _C having an amplitude of E _D is taken out. 10 is the voltage command V
A voltage commander that creates ^* , a frequency commander 11 that creates a frequency command F ^* , a sine wave signal generator 12 and a multiplier 13. The sine wave signal generator 12 creates a sine wave signal v _S having a frequency corresponding to the frequency command F ^* , and the multiplier 13 outputs a voltage signal (modulation wave) whose amplitude is proportional to the magnitude of the voltage command V ^*.
v ^* is retrieved. Reference numeral 14 is a comparator for creating a PWM signal, which compares the voltage signal v ^* with the triangular wave signal v _C, and outputs PW.
Create an M signal. Upon receiving this PWM signal, the transistor driver 15 turns on each transistor of the PWM inverter 4.
Drive off. Note that K ₁ and K ₂ are gains selected by the gain selection circuit 7A and set in the gain setter 7. The gain K ₁ is, for example, a gain for 100-volt system power reception, a gain K ₂ (= K ₁ / 2) is the gain for 200 V grid power reception.

[Problems to be solved by the invention]

In this configuration, by following the amplitude of the triangular wave signal v _C into a DC voltage E _D, variation and the inverter output voltage due to voltage Ritsupuru of the DC voltage E _D, to prevent the fluctuation of the inverter output voltage due to fluctuation of the receiving voltage .

When the amplitude of the triangular wave signal v _C is 100 V system power reception, for example, assuming that it is 4 V, even if 200 V system power reception is attempted to obtain an output voltage twice as high as that at 100 V system power reception. Since it must be set to 4 volts, the gain of the gain setter 7 is switched from the gain K ₁ at the time of receiving power to the 100 volt system to the gain K ₂ .

However, since the operator conventionally manually operates the gain selection circuit (switching switch) 7A for switching the gain, there is a risk of erroneous operation.

The present invention has been made to solve the above problem, and can automatically switch the gain of the gain setting device that gives the amplitude of the carrier wave to the gain corresponding to the power receiving system.
An object is to provide a control circuit for a PWM inverter.

As a known inverter control circuit for achieving such an object, for example, "a rectifier circuit connected to an AC power supply,
A smoothing capacitor connected to the output end of this rectifier circuit,
A series connection circuit of first and second switch elements connected in parallel to the smoothing capacitor, a series connection circuit of third and fourth switch elements connected in parallel to the series connection circuit, and the first and second A load that is interveningly connected between the connection points of the switch elements and the connection points of the third and fourth switch elements in a state in which the first and third switch elements are connected in parallel, A state in which a fourth switch element is turned on and the second and third switch elements are turned off, and a state in which the first and fourth switch elements are turned off and the second and third switch elements are turned on And a state in which the first and fourth switch elements are turned on and the second and third switch elements are turned off, and all the switch elements from the first to the fourth are repeated. A control circuit for selectively controlling two control operations of a second control operation in which an off state is alternately repeated, and this control circuit
A power supply circuit having a changeover switch for selecting one of the control operations "(Shokaisho 60-92312) is known.

However, in this known power supply circuit, as described in the embodiment, the relay switch SW1 is turned on or off by the DC voltage proportional to the AC power supply voltage E. When the power supply is AC100V, the relay coil Ry is not excited, the relay switch SW1 is turned on, and the output waveform is as shown in FIG. 5 (A). When AC200V, the relay coil
Ry is excited, the relay switch is turned off, and the output waveform is as shown in Fig. 5 (B).

Further, the constant voltage circuit G, the oscillator circuit H, the flip-flop FF, and the NAND circuits N1 to N4 shown in FIG.
Not involved in off. That is, the operation of the relay switch SW1 is determined only by the size of the power source E.

Therefore, if the power source E changes during operation, the state of the relay switch SW1 may change. For example, the power source is 200
At V, the power supply voltage drops during operation and relay switch SW1
May be turned on. At this time, the output waveform has an amplitude of 211 V or more in FIG. 5 (A), and a voltage of 1.5 times or more the rated voltage is applied to the load.

(141 + 282) /2=211.5V As described above, in the above-described known inverter control circuit, the load may be damaged by the voltage stress (overvoltage) applied to the load.

Therefore, another object of the present invention is a PWM method capable of automatically switching the gain of the gain setting device that gives the amplitude of the carrier wave to the gain corresponding to the power receiving system without being affected by the fluctuation of the power supply voltage during operation. It is to provide an inverter control circuit.

[Means for solving problems]

In order to achieve the above object, the present invention compares a DC voltage detection value of an inverter main circuit with a set value, discriminates an inverter power reception system by a gain selection signal creation command, and outputs a gain selection signal, and a power reception system determination circuit, A detection circuit that detects the completion of charging of the smoothing capacitor of the inverter DC circuit only when the inverter main circuit starts up and creates a gain selection signal creation command to the power receiving system determination circuit, and a gain selection from the power receiving system determination circuit. A gain selection circuit of a gain setter that receives a signal and selects a gain corresponding to the signal is provided.

[Action]

According to the present invention, the power receiving system determining circuit automatically determines the power receiving system by waiting for completion of charging of the smoothing capacitor only when the inverter main circuit starts up, and selects the gain selection signal or the voltage for the power receiving system on the low voltage side. A gain selection signal for the power receiving system on the higher side is created, and the gain selection circuit selects a gain preset for the power receiving system based on the selection signal and sets it in the gain setter.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, reference numeral 16 is a power supply circuit (constant voltage power supply circuit, DC / DC converter) for the control circuit, which takes in the voltage of the DC circuit of the PWM inverter 4 as an input. Reference numeral 17 is a timer, which is a timer set signal (pulse) from the power supply circuit 16.
Is given. This timer set signal is a signal synchronized with the rising edge of the output of the power supply circuit 16, and is generated in the power supply circuit 16. The timer 17 is an off timer having a set time T,
Together with the power supply circuit 16, a detection circuit for detecting the completion of charging of the capacitor 3 in the DC circuit of the PWM inverter 4 is configured. 18 is a latch circuit, 19 is a comparison circuit,
A power receiving system discrimination circuit is configured by both. Latch circuit
The timer output of the timer 17 is supplied to 18 as a latch signal R (corresponding to a gain selection signal creation command). Comparison circuit 19
Takes in the DC voltage E _D (more precisely, the DC voltage detection value) and compares the _DC voltage E _D with the set value E _DC . Set value E
_DC is the value of the DC voltage E _D after the charging of the capacitor 3 is completed when the PWM inverter 4 receives power from the 100-volt power receiving system (this is referred to as E _D100 ) and the PWM inverter 4 receives 200-volt power, for example. This is an intermediate value with the value of the DC voltage E _D after the completion of charging of the capacitor 3 when receiving power from the grid (this is referred to as E _D200 ). When E _D <E _DC , the comparison circuit 19 determines that the commercial power source 1 is a 100-volt system and sends an H-level determination signal Z. When E _D > E _DC , the comparison circuit 19 uses a 200-volt system. When it is determined that there is, an L level determination signal Z is transmitted. The output Z of the comparison circuit 19 is a latch circuit.
It is latched by 18. When the latch circuit 18 latches the H-level output Z, it sends the selection command signal S (H level) (corresponding to the gain selection signal) for selecting the gain K ₁ , and the L-level output Z is latched. In this case, the selection command signal S (L level) (corresponding to the gain selection signal) for selecting the gain K ₂ is transmitted. The above timer 17
Is set to a value not smaller than the time required to complete the charging of the capacitor 3 after the timer set signal is generated. Since other configurations are the same as those in FIG. 3, the same components are designated by the same reference numerals.

Next, the operation of this apparatus will be described with reference to the waveform time chart shown in FIG.

In this configuration, it is now assumed that the commercial power supply 1 is a 200-volt system. When the power switch Sw is turned on, the capacitor 3 is charged by the rectified voltage of the rectifier 2, the output of the control power circuit 16 rises, and the timer 17 starts the clock operation. When the charging of the capacitor 3 is completed, the timer 17 counts up and sends the latch signal R to the latch circuit 18.
The output Z of 19 is latched. At this time, since E _D > E _DC , the comparison circuit 19 sends the L level determination signal Z. The latch circuit 18 sends the L level selection command signal S by latching the L level signal Z. Therefore, the gain selection circuit 7A selects the gain K ₂ and sets it in the gain setter 7.

If the commercial power supply 1 is a 100-volt system, the timer 1
When the count-up of 7 is completed, since E _D <E _DC , the output of the comparison circuit 19 becomes the H level and the output S of the latch circuit 18 becomes the H level. Therefore, the gain selection circuit 7A selects the gain K _1. The gain K ₁ is set in the gain setter 7.

When the rectified voltage of the inverter DC circuit fluctuates greatly, for example, when 200 V is received, and when the rectified voltage fluctuates significantly, E _D may drop below E _DC , and in such a case, , As shown by the symbol N ₁ in FIG.
The output Z of the comparison circuit 19 is inverted, and the gain is switched to K ₁ even though the power is being received at 200 V. Also, as indicated by the reference symbol N ₂ in FIG. So
In order to prevent this, in this embodiment, the power receiving system discrimination circuit is provided with a latch circuit 18 that latches the output of the comparison circuit 19 to improve reliability.

When the series of operations for determining the power receiving system and selecting the gain in this embodiment is executed by the software of the microcomputer, the timer 17 is set when the microcomputer is started. The set time of 17 may be set according to the power reception timing.

Further, the present invention can be applied to a PWM type multi-phase inverter to obtain similar effects.

〔The invention's effect〕

As described above, according to the present invention, the power receiving voltage discrimination circuit for discriminating the power receiving system of the inverter by voltage is provided, and the gain selection circuit is operated according to the discrimination information sent from the discrimination circuit. In addition, it is possible to select accurately without erroneous selection.

As a result, it is possible to reliably prevent the variation of the inverter output voltage due to the voltage ripple of the DC voltage and the variation of the inverter output voltage due to the variation of the power reception voltage.

Further, in the present invention, since the detection circuit detects the charging completion of the smoothing capacitor only when the power supply of the inverter main circuit is turned on, that is, at the rising time, and generates the gain selection signal generation command to the power receiving system determination circuit, the conventional inverter is used. The possibility that the load is damaged due to an overvoltage applied to the load as in the control device is eliminated.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform time chart of a main part in the above embodiment, and FIG. 3 is a block diagram showing a conventional control circuit of a PWM inverter. 4 ... PWM inverter, 6 ... DC voltage detector, 7A ...
Gain selection circuit, 16 ... Control circuit power supply circuit, 17 ... Timer, 18 ... Latch circuit, 19 ... Comparison circuit.

Claims (4)

(57) [Claims] 1. A PWM inverter control for controlling an inverter output voltage, comprising a gain setting device to which a detected value of a DC voltage of an inverter main circuit is introduced, and controlling the inverter output voltage by using a carrier as a carrier of a variable amplitude proportional to the output of the gain setting device. In the circuit, the DC voltage detection value is compared with the set value, and when the gain selection signal creation command is received, the inverter power reception system discrimination circuit that discriminates the inverter power reception system for each reception voltage and creates the gain selection signal, the inverter main circuit output A detection circuit that detects the completion of charging of the smoothing capacitor inserted in the inverter DC circuit only at the start-up and creates a gain selection signal creation command to the power receiving system determination circuit, and a gain selection signal from the power receiving system determination circuit. And a gain selection circuit that receives a pre-assigned gain for the level of the gain selection signal. A control circuit for a PWM inverter, wherein an in-selection circuit sets the selected gain to the gain setting unit. 2. The PWM according to claim 1, wherein the power receiving system discriminating circuit comprises a comparison circuit into which a DC voltage detection value is introduced and a latch circuit into which a gain selection signal creation command is introduced. System inverter control device. 3. The detection circuit has a timer, and the set signal of the timer is created in synchronization with the rise of the output of the power supply circuit for the inverter control circuit, which inputs the inverter DC circuit voltage and creates a DC constant voltage. A control circuit for a PWM inverter according to claim 1 or 2, wherein: 4. The set value of the power receiving system discriminating circuit is an intermediate value of DC voltage detection values after completion of startup of the smoothing capacitors of the inverter DC circuits corresponding to different power receiving voltages, respectively. Claim 1 or 2
A control circuit for a PWM inverter according to the item 3 or 3.