Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JP2523672B2 - Manufacturing method of printed wiring board - Google Patents
[go: Go Back, main page]

JP2523672B2 - Manufacturing method of printed wiring board - Google Patents

Manufacturing method of printed wiring board

Info

Publication number
JP2523672B2
JP2523672B2 JP62208668A JP20866887A JP2523672B2 JP 2523672 B2 JP2523672 B2 JP 2523672B2 JP 62208668 A JP62208668 A JP 62208668A JP 20866887 A JP20866887 A JP 20866887A JP 2523672 B2 JP2523672 B2 JP 2523672B2
Authority
JP
Japan
Prior art keywords
hole
printed wiring
wiring board
manufacturing
punching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62208668A
Other languages
Japanese (ja)
Other versions
JPS6451295A (en
Inventor
康行 大勝
昭 小山
恭憲 高津
高二 南
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62208668A priority Critical patent/JP2523672B2/en
Publication of JPS6451295A publication Critical patent/JPS6451295A/en
Application granted granted Critical
Publication of JP2523672B2 publication Critical patent/JP2523672B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching

Landscapes

  • Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明はラジオ受信機やテレビジョン受像機を量産す
る場合に用いられる両面もしくは多層などのプリント配
線板の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a double-sided or multi-layered printed wiring board used for mass production of radio receivers and television receivers.

従来の技術 第2図a〜cに示すように、従来、両面もしくは多層
プリント配線板2cの非導通穴2dを形成するには、金型2a
を使用して打抜き加工されており、プリント配線板2cの
外形を金型2aにて形成する際に非導通穴2dの形成も同時
に行っていた。
2. Description of the Related Art Conventionally, as shown in FIGS. 2A to 2C, in order to form a non-conducting hole 2d in a double-sided or multilayer printed wiring board 2c, a mold 2a
It was punched by using, and the non-conducting hole 2d was formed at the same time when the outer shape of the printed wiring board 2c was formed by the mold 2a.

発明が解決しようとする問題点 ところがこの場合には、プリント配線板2cを金型2aの
ポンチ2bでせん断するために、金型2aに大きな力を加え
る必要があり、その衝撃により形成される非導通穴2dが
近接する場合には、第3図a,bに示すように、非導通穴2
dと非導通穴2dとの間にクラック2eが生じるという問題
があった。
However, in this case, in order to shear the printed wiring board 2c by the punch 2b of the mold 2a, it is necessary to apply a large force to the mold 2a, which is not formed by the impact. When the conducting holes 2d are close to each other, as shown in FIGS.
There was a problem that a crack 2e was generated between d and the non-conduction hole 2d.

又、第4図a,bに示すように両面もしくは多層のプリ
ント配線板4a上に近接する穴4bを形成する方法には、ド
リル加工による方法もあるが、この場合にはドリル加工
の工程がプリント配線板4aの表裏及び内層の回路パター
ンを電気的に接続するための導通銅めっき工程の前に通
常加工される。このような方法で形成される穴4bの側面
には銅めっき4cが施され、穴4bが導通穴となり、穴4bに
電気的絶縁性が要求される場合には問題となる。
Further, as shown in FIGS. 4a and 4b, there is a method of forming a hole 4b adjacent to the printed wiring board 4a of both sides or a multilayer by a drilling process. In this case, the drilling process is performed. It is usually processed before the conductive copper plating step for electrically connecting the circuit patterns on the front and back sides and the inner layer of the printed wiring board 4a. Copper plating 4c is applied to the side surface of the hole 4b formed by such a method, and the hole 4b becomes a conduction hole, which becomes a problem when the hole 4b is required to have electrical insulation.

本発明はこのような従来の欠点を除去するものであ
り、簡単な構成でプリント配線板上の近接する非導通穴
を形成する方法を提供するものである。
The present invention eliminates such conventional drawbacks and provides a method for forming adjacent non-conducting holes on a printed wiring board with a simple structure.

問題点を解決するための手段 本発明のプリント配線板の製造方法は、せん断抵抗を
低下させるための第一の下穴をドリル加工により形成し
た後、上記の第一の下穴の径よりも大きな径を有する金
型ポンチにて打抜くことにより、近接した非導通穴を形
成する方法としたものである。
Means for Solving the Problems A method for manufacturing a printed wiring board according to the present invention is such that, after forming a first pilot hole for reducing shear resistance by drilling, the diameter of the first pilot hole is larger than the diameter of the first pilot hole. This is a method for forming adjacent non-conducting holes by punching with a die punch having a large diameter.

作用 このような方法とすることにより、あらかじめドリル
加工により仕上り径よりも小さな下穴があいているた
め、金型にて穴を形成する際のせん断抵抗が下穴があい
ていない場合よりも著しく低下し、従来打抜きの際に近
接する穴と穴との間に生じていたクラックを防止するこ
とができる。又、下穴をドリル加工にてあけた後に形成
される穴側面の銅めっきは、金型にて再度穴を形成する
際に削除され電気的な非導通性も確保される。
Action By using this method, since the prepared hole has a prepared hole smaller than the finished diameter by drilling in advance, the shear resistance when forming a hole in the mold is significantly more than when there is no prepared hole. It is possible to prevent cracks which have been reduced and which have conventionally been generated between adjacent holes during punching. Further, the copper plating on the side surface of the hole, which is formed after drilling the prepared hole, is removed when the hole is formed again by the mold, and electrical non-conductivity is secured.

実施例 以下に本発明の一実施例を図面を参照にして説明す
る。
Embodiment One embodiment of the present invention will be described below with reference to the drawings.

第1図a,bに示すように、プリント配線板5aに対し、
ドリル5bにて下穴5dをあける。この際、ドリル5bによる
下穴5dの径は、最終仕上りの非導通穴5cの径よりも小さ
な穴とする。両面もしくは多層のプリント配線板の場
合、次工程が導通銅めっきの工程となるため、断面をみ
ると穴の側面に銅めっき5eが施される。
As shown in Fig. 1 a and b, for printed wiring board 5a,
Drill a prepared hole 5d with a drill 5b. At this time, the diameter of the prepared hole 5d formed by the drill 5b is smaller than the diameter of the final non-conducting hole 5c. In the case of a double-sided or multi-layered printed wiring board, the next step is the step of conducting copper plating, so the copper plating 5e is applied to the side surface of the hole when the cross section is viewed.

第1図c,dは、プリント配線板の製造の最終工程にお
いて、ドリル加工にて形成した下穴5dに銅めっき5eを施
した導通穴5fを再度金型にて打抜く工程を示す。
FIGS. 1c and 1d show a step of punching a conductive hole 5f, which is a prepared hole 5d formed by drilling with copper plating 5e, in a final step of manufacturing a printed wiring board with a mold.

上記銅めっき導通穴5fを金型のポンチ5gで打抜き、非
導通穴5cを形成するに当っては、下穴5dがあいていない
場合よりもストレスがプリント配線板5aにあけられた下
穴5dの穴どう部へ逃げるため、せん断抵抗が著しく低減
され打抜きの衝撃で近接する穴と穴との間に生じていた
クラックを防止することができる。
When punching the copper-plated conduction hole 5f with a punch 5g of the mold to form the non-conduction hole 5c, the prepared hole 5d in which the stress is opened in the printed wiring board 5a is more than the case where the prepared hole 5d is not formed. Since it escapes to the hole part, the shear resistance is remarkably reduced, and the crack generated between adjacent holes due to the impact of punching can be prevented.

又、金型で打抜きに使用するポンチ5gは、ドリル5bで
あけた下穴5dより大きいため、穴側面の銅めっき5e部分
を打抜き時に削除することができ非導通穴5cを形成でき
る。
Further, since the punch 5g used for punching with the die is larger than the prepared hole 5d drilled with the drill 5b, the copper plating 5e portion on the side surface of the hole can be deleted at the time of punching and the non-conducting hole 5c can be formed.

以下の表は、今回の実施例における実験の結果であ
る。
The following table is the result of the experiment in this example.

発明の効果 以上のように、本発明の両面もしくは多層のプリント
配線板に形成される近接する非導通穴の形成方法は、ド
リル加工により下穴を形成し、金型にて打抜く際のせん
断抵抗を小さくすることにより、従来近接する穴を金型
打抜きにより形成する際に生じていた穴と穴との間のク
ラックの発生を防止し、プリント配線板の品質向上及び
作業性の向上に大いに役立つものである。
EFFECTS OF THE INVENTION As described above, the method for forming adjacent non-conducting holes formed on a double-sided or multi-layered printed wiring board of the present invention is such that a prepared hole is formed by drilling and shearing is performed when punching with a die. By reducing the resistance, it is possible to prevent the generation of cracks between the holes that were conventionally generated when forming adjacent holes by die punching, and greatly improve the quality and workability of printed wiring boards. It is useful.

さらに、打抜きの際に金型自身に被むる負担が大幅に
軽減されるため金型の寿命を向上させることができ、コ
ストの面でも大きな効果を上げることができる。
Furthermore, since the burden on the die itself during punching is greatly reduced, the life of the die can be extended and the cost can be greatly improved.

【図面の簡単な説明】[Brief description of drawings]

第1図a〜dは本発明のプリント配線板の製造方法の各
工程を示す斜視図と断面図、第2図a〜cは従来の金型
にてプリント配線板を打抜く過程の略図、第3図a,b、
第4図a,bは従来のプリント配線板の斜視図及びその断
面図である。 5a……プリント配線板、5b……ドリル、5c……非導通
穴、5d……ドリル加工による下穴、5e……銅めっき、5f
……導通穴、5g……ポンチ。
1A to 1D are perspective views and cross-sectional views showing each step of the method for manufacturing a printed wiring board according to the present invention, and FIGS. 2A to 2C are schematic views of a process of punching a printed wiring board with a conventional die. Fig. 3 a, b,
4A and 4B are a perspective view and a sectional view of a conventional printed wiring board. 5a …… printed wiring board, 5b …… drill, 5c …… non-conducting hole, 5d …… prepared hole by drilling, 5e …… copper plating, 5f
...... Conductivity hole, 5g ... Punch.

フロントページの続き (72)発明者 南 高二 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 昭58−205625(JP,A)Front Page Continuation (72) Inventor Takaji Minami 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) Reference JP-A-58-205625 (JP, A)

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】せん断抵抗を低下させるための第一の下穴
をドリル加工により形成した後、上記の第一の下穴径よ
りも大きな径を有する金型ポンチを用いて打抜くことに
より近接した非導通穴を形成するプリント配線板の製造
方法。
1. A first pilot hole for reducing shear resistance is formed by drilling, and then punched by using a die punch having a diameter larger than the diameter of the first pilot hole. For manufacturing a printed wiring board for forming the non-conducting hole.
JP62208668A 1987-08-21 1987-08-21 Manufacturing method of printed wiring board Expired - Lifetime JP2523672B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62208668A JP2523672B2 (en) 1987-08-21 1987-08-21 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62208668A JP2523672B2 (en) 1987-08-21 1987-08-21 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPS6451295A JPS6451295A (en) 1989-02-27
JP2523672B2 true JP2523672B2 (en) 1996-08-14

Family

ID=16560075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62208668A Expired - Lifetime JP2523672B2 (en) 1987-08-21 1987-08-21 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JP2523672B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03166800A (en) * 1989-11-25 1991-07-18 S M C:Kk Component mounting method for printed wiring board
JPH07112399A (en) * 1993-10-19 1995-05-02 Tdk Corp Punching method for tape-form member

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58205625A (en) * 1982-05-25 1983-11-30 Shin Kobe Electric Mach Co Ltd Die for blanking laminated sheet

Also Published As

Publication number Publication date
JPS6451295A (en) 1989-02-27

Similar Documents

Publication Publication Date Title
JPH07176862A (en) Manufacture of printed wiring board
JP2523672B2 (en) Manufacturing method of printed wiring board
JP2009200344A (en) Manufacturing method of printed wiring board
JPH10286936A (en) Screen plate and its manufacturing method
JPH05347480A (en) Manufacture of multilayer printed wiring board
JP4728980B2 (en) Printed wiring board and manufacturing method thereof
JPH08307053A (en) Manufacture of metal core printed wiring board
JP2002176263A (en) Printed wiring board
JPH06291459A (en) Manufacture of printed wiring board
JPH10126024A (en) Wiring board having end-face through hole
CN1993018A (en) Printed circuit board and manufacturing method thereof
JPH04250695A (en) Forming mehtod for viahole multilayer circuit board
US8601683B2 (en) Method for electrical interconnection between printed wiring board layers using through holes with solid core conductive material
JPH06302959A (en) Method for manufacturing multilayer printed wiring board
JP2002016332A (en) Laminated board having through hole and its manufacturing method
JP4795575B2 (en) Laminated wiring board and manufacturing method thereof
JP2002176256A (en) Printed wiring board and its manufacturing method
JPS61159789A (en) Manufacture of printed wiring board
JP2007242740A (en) Metal core printed wiring board and manufacturing method thereof
JP2754914B2 (en) Manufacturing method of ceramic wiring board
JPS5814758B2 (en) multilayer wiring board
JPS6294296A (en) Manufacture of double-side printed wiring board
JPH1051084A (en) Split type printed wiring board and method of manufacturing the same
JPH02281792A (en) Manufacture of printed wiring board
JPH05299844A (en) Multilayer printed wiring board and manufacturing method thereof

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080531

Year of fee payment: 12