JP2529254B2 - IC mounting equipment - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an IC mounting device having a plurality of multi-terminal IC chips such as a memory card.

[Conventional technology]

In recent years, as semiconductor memories such as ROMs and RAMs have increased in capacity, memory cards in which a large number of IC chips for these semiconductor memories are mounted on a single substrate have been manufactured, and are widely used for games, process management, and the like. Used in application fields.

However, the IC chip for semiconductor memory has 30 to 50 connection terminals, and these connection terminals are common to data bus terminals and control bus terminals except for some individual terminals such as chip enable terminals. These are connection terminals, and the connection wiring of these common connection terminals and individual connection terminals on a narrow board has been a problem.

 A conventional wiring structure will be described below with reference to the drawings.

FIG. 4 is a plan view of a conventional memory card, FIG. 5 is a partial plan view showing connection wiring between IC chips, and FIG. 6 is a partial sectional view. The substrate 50 that constitutes the memory card 5 is a double-sided wiring substrate as shown in FIG. 6, and A _{1 to} A ₂₀ are provided on the upper surface side 50a.
The 20 IC chips shown by are bonded together, the upper surface pattern a shown by a solid line, the bonding pattern n shown by a black circle,
A through hole m tightened by a white circle is provided, a lower surface pattern b shown by a dotted line is provided on the lower surface side 50b, and the through hole m is connected to the upper surface side 50a.

As shown in FIG. 5, each IC chip A has a square shape,
Each of the opposing sides c and d is provided with 20 connection terminals, and the other opposing sides e and f are not provided with connection terminals. The connection terminals provided on the side c are all common connection terminals, and the other 19 connection terminals provided on the side d are common connection terminals except for one chip enable terminal. .

Connect the connection wiring between the above IC chips to IC chips A ₁ , A ₂ , A ₃
Will be described.

As shown in FIG. 5, it is provided on the side c ₂ of the IC chip A ₂ .
Connect 20 connection terminals to each bonding pattern n ₂ and side d ₂
Respectively connected by a wire Bonn dengue twenty connecting terminals provided on the respective through holes m _2. IC in the same way
Also for the chip A ₃ , the connection terminals of the side portion c ₃ are wire bonded to the respective bonding patterns n ₃ , and the connection terminals of the side portion d ₃ are connected to the respective through holes m ₃ . As a result, half (10 pieces) of the bonding pattern n ₂ to which the connection terminals of the IC chip A ₂ are connected are
Which is connected to each of Bonn Dengue pattern n ₃ of the common connection terminal is connected to the IC chip A ₃ via a through-hole m ₂ top pattern a ₁ ten disposed on the left side of the IC chip A ₂ to avoid And the remaining bonding pattern n ₂ is IC chip A ₂
By the upper surface pattern a ₂ of the ten disposed on the right side are connected to the corresponding Bonn dengue pattern of the IC chip A _3. Through-hole m ₂ to which the connection terminal of IC chip A ₂ is connected
Is directly connected to the through hole m ₃ of the IC chip A ₃ by the lower surface pattern b arranged on the lower surface side of the substrate 50.

That is, in the above configuration, the I
The connection terminals provided on one side of the C chip are connected, and the connection terminals provided on the other side are connected on the lower surface 50b where no IC chip is present, and the individual connection terminals are routed. Wiring is done.

The above is the connection structure between the IC chips. Next, the entire connection structure will be described with reference to FIG.

That is, 20 IC chips A _{1 to} A ₂₀ are arranged and bonded in four rows in the arrangement direction indicated by the arrow B on the substrate 50. At this time, by setting the direction of each IC chip to the opposite direction for each column as shown by the arrow, it is possible to perform the connection between the IC chips across each column in a planar manner without crossover.

[Problems to be solved by the invention]

As described above, in the conventional memory card, the side with the IC chip connection terminals is arranged orthogonal to the array direction on the board, so the wiring of common connection terminals is for each IC chip. It was necessary to dispose a large number of through holes on the upper and lower surfaces of the substrate.

As a result, since it is necessary to provide a large number of through holes having high manufacturing costs, the cost of the entire memory card increases and the reliability decreases.

It is also possible to use a single-sided printed circuit board to connect all of the common connection terminals to each other on the IC chip bonding surface, but in this case a considerably large wiring space is required on both sides of the IC chip, so that the IC chips are connected to each other. It is necessary to arrange them with a sufficiently large distance, which results in a problem that the number of IC chips that can be mounted on one card is limited.

The object of the present invention is to solve the above problems, to reduce the cost,
Another object is to provide an IC mounting device having a high mounting density.

[Means for solving problems]

The structure of the present invention for achieving the above object is as follows.

In an IC mounting device in which a plurality of IC chips having a large number of connection terminals are mounted on a board, and the connection between the connection terminals of each IC chip and the connection to an external connection terminal are performed by a wiring pattern on the board The IC is formed by stacking the substrate with an upper substrate having a long hole penetrating the wiring pattern and a lower substrate having a wiring pattern, and each IC along the long side of the long hole formed on the upper substrate. Place the chip,
Wire bonding the connection terminal provided on the side orthogonal to the long side of the long hole of the IC chip directly to the wiring pattern on the upper substrate, and the connection terminal provided on the side parallel to the long side of the long hole It is characterized by wire bonding to the wiring pattern on the lower substrate through the long hole.

〔Example〕

 Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a plan view of a memory card of the present invention, and FIGS. 2 and 3 are AA sectional views and BB sectional views of the memory card shown in FIG. 1, respectively, FIG. 7, and FIG. Are top and bottom views of the lower substrate, FIG. 9 is a top view of the upper substrate, and FIG. 10 is a plan view of the sealing frame.

The substrate 1 constituting the memory card 10 is a lower substrate 3 made of a conventional double-sided printed circuit board as shown in FIGS. 2 and 3.
The upper substrate 2 made of a single-sided printed circuit board is laminated on the upper surface of the first substrate, and the pattern surface 2a of the upper substrate 2 has a first surface.
As shown in FIG. 9 and FIG. 9, a lead pattern P ₁ , a bonding pattern n, two IC connecting slots H ₁ and H ₂ and a lead connecting slot H ₃ are provided. ₁ , 20 IC chips B _{1 to} B ₂₀ are arranged along the long sides of H ₁ and H ₂ . And the connection terminal of each IC chip is the long hole of the four sides of the square.
Half each is provided on one side along the long sides of H ₁ and H ₂ and on one side orthogonal thereto. Further, as shown in FIG. 7, a lead pattern P ₂ , a bonding pattern n and a connecting electrode q ₁ are provided on the upper pattern surface 3a of the lower substrate 3, and the lower substrate 3
As shown in FIG. 8, the lower pattern surface 3b is provided with a lead pattern P ₃ , an individual lead pattern P ₄ and a connecting electrode q ₂ , and the upper pattern surface 3a and the lower pattern surface 3b are formed into through holes m. Connected.

Next, connect the connection wiring of each IC chip to IC chips B ₁₀ , B ₁₉ ,
B ₂₀ will be described.

That is, as illustrated by the IC chip B ₂₀ , the long hole H ₁
The common connection terminal provided on the side C ₂₀ orthogonal to the long side of the is the bonding pattern provided on the pattern surface 2a of the upper substrate 2.
by being wire Bonn dengue to n _20, it is connected to Bonn dengue pattern n ₀ Bonn dengue pattern n ₁₉ and for inter-board connection of IC chip B ₁₉ adjacent in lead pattern P _1.

By performing the above-mentioned wire bonding on each IC chip, all the common connection terminals of the IC chips are commonly connected by the lead pattern P ₁ shown in FIG.

Further, in the common connection terminal, the bonding pattern n ₀ for board-to-board connection is wire-bonded to the through-hole pattern m ₀ provided on the upper pattern surface 3a of the lower substrate 3 through the elongated hole H ₃ to form a wire pattern. As shown in the figure, the lead pattern P ₃ provided on the lower pattern surface 3b is connected to the connection electrode q ₂ .

The common connection terminal among the connection terminals provided on the side e ₂₀ parallel to the long side of the long hole H ₁ of the IC chip B ₂₀ is provided on the upper pattern surface 3a of the lower substrate 3 through the long hole H ₁ . By being wire-bonded to the bonding pattern n ₂₀ , the lead pattern P ₂ is connected to the bonding patterns n ₁₀ and n ₁₁ of the adjacent IC chips B ₁₀ and B ₁₁ .

Then wire bond each IC chip to all ICs with lead pattern P _{2 as} shown in FIG.
The common connection terminals of the chips are commonly connected and also connected to the connection electrode q ₁ .

Also, the one chip enable terminal included in the side e ₂₀ is through hole pattern m ₂₀ through the elongated hole H _1.
By being wire-bonded to the connection electrode q ₂ , the individual lead pattern P ₄ provided on the lower pattern surface 3b of the lower substrate 3 is connected.

After the mounting and connection of the IC chip is completed, the IC chip and the wires are protected next. As shown in FIGS. 1 and 2, the sealing frame 20 shown in FIG. The IC chip mounting part and the wire bonding part are resin-sealed by setting them on the surface 2a and injecting the sealing resin 30 into the inside of the sealing frame 20.

FIG. 11 shows another embodiment of the sealing frame. As a result of dividing the sealing frame 40 into a plurality of small-area sealing frames by providing a partition frame 40a at the center of the sealing frame 40, a sealing frame to be injected is obtained. The dent at the central part of the stop resin became smaller, and it became possible to improve the protective effect by sealing.

The partition frame 40a is not limited to one, but if there is a space between the IC chips, it can be provided vertically and horizontally to further enhance the protection effect.

Further, comparing the number of through holes in the mounting structure of the present invention and the number of through holes in the conventional mounting structure shown in FIG. 4, in the conventional structure, the number of through holes per IC chip is 20 for 20 IC chips. Since it requires 20 × 20 = 400 through holes, the present invention requires half of the common connection terminals, that is, 20 common terminal through holes and each IC chip. Only one through hole for chip enable is required, 20 + 20 = 40, and the number of through holes is reduced to 1/10.

〔The invention's effect〕

As described above, according to the present invention, it is possible to greatly reduce the number of through holes by performing the wire bonding through the long holes in the board connection mounting a large number of IC chips. The reliability of the high-density mounting IC mounting device can be remarkably improved, and the degree of freedom of wiring on each substrate can be increased, which is a great effect.

[Brief description of drawings]

FIG. 1 is a plan view of a memory card of the present invention, and FIGS.
FIG. 1 is a sectional view taken along the line AA of the memory card shown in FIG.
-B sectional view, FIG. 4 is a plan view of a conventional memory card, and FIGS. 5 and 6 are enlarged plan views and sectional views showing essential parts of the memory card shown in FIG. 4, FIG. 7, and FIG. The drawings are top and bottom views of the lower substrate shown in FIG. 1, FIG. 9 is a plan view of the upper substrate, and FIGS. 10 and 11 are plan views of the sealing frame. 5,10 ...... memory card, 2 ...... substrate, 3 ...... lower substrate, H _1, H _2, H ₃ ...... slot 20, 40 ...... sealing frame.

Claims (4)

(57) [Claims] 1. An IC mounting in which a plurality of IC chips having a large number of connection terminals are mounted on a substrate, and the connection between the connection terminals of the IC chips and the connection to an external connection terminal are performed by a wiring pattern on the substrate. In the device, the substrate is formed by stacking an upper substrate having a wiring pattern and a through hole, and a lower substrate having a wiring pattern, and connecting terminals of IC chips mounted on the upper substrate An IC mounting device, wherein wire bonding is directly performed on a wiring pattern on a substrate, and wire bonding is performed on the wiring pattern on the lower substrate through a through hole of the upper substrate. 2. The IC chip according to claim 1,
The IC chip has a common connection terminal for commonly connecting each IC chip as a connection terminal, and a chip enable terminal unique to each IC chip, and the common connection terminal is a wire bond in the wiring pattern on the upper substrate. The chip mounting terminal is wire-bonded to a wiring pattern on the lower substrate through a through hole of the upper substrate. 3. The IC mounting apparatus according to claim 1, wherein the through hole of the upper substrate is an elongated hole formed along a plurality of IC chips arranged in series. 4. An IC mounting in which a plurality of IC chips having a large number of connection terminals are mounted on a substrate, and the connection between the connection terminals of the IC chips and the connection to an external connection terminal are performed by a wiring pattern on the substrate. In the device, the substrate is formed by stacking an upper substrate having a long hole penetrating the wiring pattern and a lower substrate having a wiring pattern, and is arranged along the long side of the long hole formed on the upper substrate. The respective IC chips are arranged, the connection terminals provided on the sides orthogonal to the long sides of the long holes of the IC chips are directly wire-bonded to the wiring pattern on the upper substrate, and parallel to the long sides of the long holes. An IC mounting device characterized in that a connection terminal provided on a side is wire-bonded to a wiring pattern on a lower substrate through the elongated hole.