JP2530508B2 - Alarm detector - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission device for exchanging time slots in a time division multiplex transmission system for high-speed digital signals or a device for path alarm detection in an exchange.

The present invention is a time-division multiplex transmission system device for high-speed digital signals, and when means for monitoring an anomaly of a received signal is provided in each of the receiving interface and the transmitting interface, when an anomaly is detected in the receiving interface, the downstream side The secondary alarm is prevented by the hardware by notifying the secondary device of the abnormal alarm and prohibiting the secondary device from generating the secondary alarm by detecting the abnormal condition of the received signal.

[Conventional technology]

CCITT Recommendation G.708, G.709 or TTC standard JT-G708, JT-
A synchronous digital hierarchy digital communication system defined by G709 has been proposed and put into practical use. The configurations of the exchange, the digital cross-connect device, and the multiplex conversion device in this digital communication system are described in Hiromi Ueda et al., "Synchronous Terminal Equipment Applying New Synchronous Interface," NTT R & D Vol.

A conventional example of the configuration of the time slot switching device in these transmission devices is shown in FIG. 3 and FIG.

In this example, the high speed interface is CCITT Recommendation G.70.
8, G.709 or TTC standard JT-G708, JT-G709. Further, in FIG. 3, only the processing of the signal in the upstream direction is shown, and the processing in the downstream direction is omitted. That is, FIG. 3 shows the direction in which the signal input from the high speed interface is output to the low speed interface side, and the direction in which the signal input from the low speed interface is output to the high speed interface side is omitted.

The transmission device shown in FIG. 3 comprises a high speed interface signal receiving part 1, a time slot exchange part 2, a low speed interface signal transmitting part 3 and an alarm monitoring part 4.

The high speed interface signal receiving part 1 is the CCITT described above.
The signal specified by the recommendation G.708, G.709 or TTC standard JT-G708, JT-G709 is received, converted into a signal suitable for the processing in the time slot exchange section 2, and terminated. The time slot exchange section 2 separates the reception signal processed by the high speed interface signal reception section 1 into a main signal and an ST signal, performs time slot exchange, and sends out to the low speed interface signal transmission section 3 on the transmission side. The low-speed interface signal transmitting portion 3 converts the received signal, which has undergone the time slot exchange in the time slot exchanging portion 2, into a form suitable for the low-speed interface connected to the existing exchange. Further, the alarm monitoring part 4 receives alarm information from the alarm processing part in each part and displays a failure on the corresponding package.

 Next, the configuration and operation of each part will be described.

The high speed interface signal receiving part 1 includes a high speed signal converting part 5, a section terminating part 6, an AU-32 pointer processing part 7, a VC-32 path terminating part 8 and a TU-11 / TU-21 pointer processing part 9. And are cascaded along the signal path,
The alarm processing unit 10 to which the alarm output from each of these units is input
It has.

Here, AU is an administrative unit (Administractive Unit) in the interface defined by CCITT recommendation G.708, G.709 or TTC standard JT-G708, JT-G709, and similarly TU is a tributary unit. Abbreviation for (Tributary Unit).

The high-speed signal conversion unit 5 converts a signal sent in a format suitable for transmission, for example, an NRZ optical signal into a unipolar signal of an electric signal, and sends it to the section termination unit 6. Further, the high-speed signal conversion unit 5 monitors the input signal disconnection, and when detecting the input signal disconnection, sends it to the alarm processing unit 10.

The section terminating unit 6 synchronizes the input signal from the high-speed signal converting unit 5 with the frame, and then sends it to the AU-32 pointer processing unit 7. For input signals, out of frame synchronization and AIS (Alarm Indication Signal)
When the out-of-frame synchronization and the AIS are detected, the alarm processing unit 10 is notified.

The AU-32 pointer processing unit 7 sends the input signal from the section terminating unit 6 to the VC-32 POS terminating unit 8 after processing such as AU-32 pointer reassignment and stuff operation. Further, the VC-32 path AIS and the pointer abnormality are monitored for the input signal, and when the VC-32 path AIS and the pointer abnormality are detected, the alarm processing unit 10 is notified.

The VC-32 path termination unit 8 terminates the AU-32 path overhead from the AU-32 pointer processing unit 7 and then the TU-11 / TU.
-21 It is sent to the pointer processing unit 9. Also, the AU-32 path alarm is monitored for the input signal, and the VC-32 path alarm is notified to the alarm processing unit 10.

The TU-11 / TU-21 pointer processing unit 9 replaces the TU-11 or TU-21 pointer with the input signal from the VC-32 path terminating unit 8 and operates the staff, and then the time slot exchange unit 2 Send to. For the input signal, VC-11 / 21
Monitors path AIS and pointer error, VC-11 / 21 path AIS,
When the pointer abnormality is detected, the alarm processing unit 10 is notified.

Next, the time slot exchange part 2 will be described. This time slot exchange part 2 is VC-11 / 21 path termination part 1
1, a time slot exchange unit 12, and an alarm processing unit 13.

The VC-11 / 21 path terminating unit 11 terminates the VC-11 / 21 path overhead from the high speed interface signal receiving section 1 and then sends it to the time slot exchanging unit 12. Also, the VC-11 / 21-path alarm is monitored for the input signal, and when the VC-11 / 21-path alarm is detected, the alarm processing unit 13 is notified.

The time slot exchange unit 12 is a VC-11 / 21 path termination unit 11
The input signal from is separated into the main signal and ST signal.
Time slots are exchanged in units of 4 kb / s, and the signals are transmitted to the low speed interface signal transmitting section 3.

Next, the low speed interface signal transmitting portion 3 will be described. The low speed interface signal transmitting part 3 is composed of an HG path terminating part 14, a low speed signal converting part 15 and an alarm processing part 16.

The HG path terminating unit 14 terminates the ST frame of the input signal from the time slot exchange unit 2 in HG unit (384 kb / s unit), and then sends it to the low speed signal converting unit 15. It also monitors the HG path alarm and notifies the alarm processing unit 16 when an alarm is detected.

The unipolar signal CMI from the low-speed signal converting unit 15 and the HG path terminating unit 14 is converted into a code suitable for transmission of the bipolar signal and the like, and is sent to the outside of the low-speed interface signal transmitting unit 3.

The alarm processing unit 16 includes a low-speed interface signal transmission unit 3
The various alarms detected within are processed and alarm information is sent to the alarm monitoring section 4.

The alarm monitoring part 4 is an alarm processing part 10, 1 of each part in the device.
It receives the alarm information from 3 and 16 and displays the failure on the corresponding package.

FIG. 4 shows a second configuration of a conventional device for exchanging time slots. The structure shown in FIG. 4 has a high-speed interface signal receiving portion 1 and a time slot exchange portion 2.
And a high speed interface signal transmitting portion 18 and an alarm monitoring portion 4.

The functions of the high speed interface signal receiving portion 1 and the alarm monitoring portion 4 are the same as those shown in FIG.

The time slot exchange section 2 receives the signal from the high speed interface signal reception section 1, performs time slot exchange to the designated high speed interface signal transmission section 18, and sends it out.

The high-speed interface signal transmission part 18 is composed of a VC-11 path monitor / monitor 26, an AU-32 frame generator 19, a section frame generator 20, a high-speed signal converter 21, and an alarm processor 28. There is.

The VC-11 path monitor / monitor section 26 monitors the VC-11 path overhead and the status of the path with respect to the input signal from the time slot exchange section 2. For example, when a VC-11AIS error is detected, the VC-11 path monitor section 26 notifies the alarm processing section 28. To do.

The AU-32 frame generation unit 19 creates an AU-32 path overhead and sends it to the high speed signal conversion unit 21.

The high-speed signal converter 21 converts the unipolar electric signal from the section frame generator 20 into a signal suitable for transmission, for example, an optical NRZ signal, and sends it out of the high-speed interface signal transmitter 18.

Next, FIGS. 5 and 6 are diagrams for explaining the alarm issuing and alarm transferring operations in the configurations shown in FIGS. 3 and 4.

FIG. 5 shows a high-speed interface signal receiving portion 1 in the conventional time slot exchanging device shown in FIG.
Shows an example of alarm transfer when input signal loss or loss of frame synchronization is detected, when AIS is detected, and when VC-32AIS or VC-11AIS alarm sent from another device is detected.

First, a case will be described in which the high-speed interface signal receiving portion 1 detects an input signal disconnection, loss of frame synchronization, and an AIS alarm.

When the high-speed interface signal reception part 1 detects an input signal loss or loss of frame synchronization, when the high-speed interface signal reception part 1 issues an input signal loss or loss of frame synchronization alarm and detects an AIS alarm , AIS alarm is issued.

In the high-speed interface signal receiving part 1, when the input signal is disconnected, the frame is out of sync, or the AIS alarm is detected, all the data signals are set to "1" when the alarm is issued. As a result, the corresponding VC-32AIS, VC-11AIS, VC-21AI
S and HG AIS can be generated. Therefore, the high speed interface signal receiving portion 1 detects the generated VC-32 AIS alarm and issues the alarm. Further, in the high speed interface signal receiving part 1, the generated VC-11 or VC-
It detects 21 AIS alarms and issues an alarm. Further, the low-speed interface signal transmitting portion 3 detects the HG AIS alarm and issues the alarm, and also notifies the exchange side of the path failure.

A case in which the high speed interface signal receiving portion 1 detects a VC-32 AIS alarm transmitted from another device will be described.

When the VC-32AIS alarm sent from another device is detected in the high-speed interface signal receiving part 1, when the alarm is issued, the data signal of all "1" of the VC-32 sent from another device. According to the applicable VC-32AIS, VC-11AI
S, VC-21 AIS and HG AIS can be generated. Therefore,
In the high-speed interface signal reception part 1, the generated VC
-11AIS or VC-21AIS alarm is detected and an alarm is issued. Furthermore, in the low-speed interface signal transmission part 3,
The HG AIS alarm is detected and an alarm is issued, and the switching side is notified of a path failure.

Next, the case where the high speed interface signal receiving section 1 detects a VC-11AIS alarm sent from another device will be described.

When the VC-11AIS alarm sent from another device is detected in the high-speed interface signal reception part 1, all the "-11" data signals of the VC-11 sent from the other device when the alarm is issued are sent. , HG AIS signal can be generated.
Therefore, in the low-speed interface signal transmission part 3, HG
When an AIS alarm is detected and an alarm is issued, the switch side is notified of a path failure.

FIG. 6 shows a high-speed interface signal receiving part 1 in the conventional time slot exchanging device shown in FIG.
Example of multiple alarm transfer when detecting input signal loss or loss of frame synchronization and detecting AIS, and detecting VC-32AIS, VC-11 or VC-21AIS alarm sent from other device Shows.

First, a case where the high-speed interface signal receiving portion 1 detects an input signal disconnection, loss of frame synchronization, and an AIS alarm will be described.

When input signal loss or loss of frame synchronization is detected in the high-speed interface signal reception part 1, an input signal loss or loss of frame synchronization is issued in the high-speed interface signal reception part 1 and AIS alarm is issued when AIS is detected. To issue.

When the high-speed interface signal receiving section 1 detects an input signal loss or loss of frame synchronization or detects AIS, all data signals are set to "1" when an alarm is issued. As a result, the corresponding VC-32AIS, VC-11AIS,
VC-21 AIS can be generated. Therefore, the high speed interface signal receiving portion 1 detects the generated VC-32AIS alarm and issues the alarm. Furthermore, in the high-speed interface signal reception part, the generated VC-11 or VC-21
Detects AIS and issues an alarm. Further, the high speed interface signal transmitting section 18 detects the generated VC-11AIS alarm and issues an alarm.

Next, a case where the high-speed interface signal receiving portion 1 detects a VC-32AIS alarm sent from another device will be described.

When the high-speed interface signal receiving part 1 detects a VC-32 AIS alarm sent from another device, when the alarm is issued, a data signal of all "1" of the VC-32 sent from another device. The corresponding VC-11AIS and VC-2
1 AIS can be generated. Therefore, in the high-speed interface signal reception part 1, the generated VC-11AIS or VC-21AIS
Detects an alarm and issues an alarm. Further, the high-speed interface signal transmitting portion 18 detects the generated VC-11AIS alarm and issues an alarm, and also sends a data signal of all "1" to the outside of the high-speed interface signal transmitting portion 18.

Next, a case where the high speed interface signal receiving portion 1 detects a VC-11AIS alarm sent from another device will be described.

When the VC-11AIS alarm sent from another device is detected in the high-speed interface signal receiving part 1, all the "1" data signals of the VC-11 sent from the other device when the alarm is issued are sent. , The high-speed interface signal transmitting portion 18 receives it through the time slot exchange portion 2, and the high-speed interface signal transmitting portion 18 detects the VC-11AIS alarm and issues an alarm, and also outputs a data signal of all "1" to the high-speed interface signal. Send out of send section 18.

[Problems to be Solved by the Invention]

When out of frame synchronization, input signal loss or AIS is detected, what should be issued as an alarm is out of frame synchronization, input signal loss or AIS alarm. The AIS signals of VC-32, VC-21, VC-11, and HG that are secondarily generated and detected by loss of frame synchronization, input signal loss, and AIS should be suppressed. Similarly, when VC-32 path AIS is detected, only VC-32 AIS is issued as an alarm and VC-32 path AIS is issued.
VC-21, VC-11AIS, or HG AI secondary detected in
S-alarm should be suppressed. Similarly, when VC-21 / 11AIS is detected as an alarm, only VC-21 / 11AIS is issued and VC-
Secondary HG AIS alerts detected on 21/11 AIS should be suppressed.

The number of secondary alarms is enormous because it covers all signals included in the received signal. For example, in FIG. 1, when accommodating N 150 Mb / s interfaces, N × 336 HG AIS is detected by input signal interruption.

Conventionally, these alarms are processed by software in the alarm monitoring part, but this is a heavy burden.

In addition, when performing suppression processing by software, it is necessary to understand the connection relationship between the high-speed interface and the HG because the time slot exchange unit is performing time slot exchange, and the software load for this processing increases. .

The present invention solves the above-mentioned problem. In the interface signal receiving part, a flag for prohibiting a secondary alarm is generated and sent to a downstream device via another route to issue a secondary alarm. With a simple hardware configuration that prohibits
An object of the present invention is to provide an alarm detection device that reduces software processing in an alarm monitoring part.

[Means for solving the problem]

The present invention, in the interface signal receiving portion, input signal disconnection, loss of frame synchronization, AIS, VC-32 path AIS,
When VC-21 path AIS or VC-11 path AIS is detected,
The alarm prohibition flag is sent from all the interface signal receiving parts to the interface signal transmitting parts that receive the time-slot exchanged signals, and the interface signal receiving part, the time slot exchange part or the interface signal receiving part is used for alarm prohibition. Detects a flag and disconnects the input signal, loses frame synchronization, AIS, V
It is characterized by prohibiting issuing of a secondary alarm generated by C-32 path AIS, VC-21 path AIS or VC-11 path AIS.

That is, the present invention is directed to a receiving interface means for receiving a signal sent from another device, converting the signal into a signal suitable for an internal device, and passing it to a time slot exchanging means, and a time slot exchanging of a signal received by the receiving interface means. And a transmission interface means for converting the signal, which has been time-slot-exchanged by the time-slot exchange means, into a signal compatible with an external device and outputting the signal to another device,
In an alarm detection device for monitoring the state of a received signal in each of the above means and issuing an alarm when an abnormality is detected, when an abnormality is detected in the reception interface means, a received signal processing means located on the downstream side in the device of the received signal Means for notifying the abnormality detection means to the abnormality detection means, and the abnormality detection means of the transmission interface means suppresses the alarm generation by the output of the notification means sent via the time slot exchanging means. The time slot exchanging means includes a prohibition processing means, and the signal of the notifying means includes means for performing the same time slot exchanging operation as the received signal.

Further, it is preferable that the abnormality detecting means of the received signal in the time slot exchanging means includes an alarm prohibition processing means for suppressing the alarm generation by the output of the notifying means.

Further, the reception interface means is provided with a plurality of signal processing means for receiving signals, each of which is connected in cascade, and an abnormality detecting means for receiving signals with respect to each signal processing means. When one of the received signals detects an abnormality, it is connected in cascade so as to notify the abnormality detection to the monitoring means on the downstream side in the reception interface means of the received signal, and the alarm prohibition that suppresses the alarm generation by the notification of the abnormality detection It is preferable to include a processing means.

[Action]

According to the present invention, when each processing unit in the reception interface unit detects the path abnormality of the received signal, the alarm detection unit is notified of the alarm detection.

The alarm detection is also notified to the time slot exchange unit or the transmission interface unit on the downstream side of the signal through a route different from the received signal. By the notification of this signal, the transmission interface unit or the time slot exchange unit on the downstream side prohibits issuing an alarm within the unit.

Further, even in the reception interface unit, the detection of the alarm suppresses the generation of the alarm in the downstream processing unit of the received signal by hardware.

As a result, it is possible to prohibit the issuance of an alarm secondary to the alarm detection with a simple hardware configuration.

Embodiments Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of the first embodiment of the present invention.
This corresponds to the first conventional example shown in FIG.

That is, in the first embodiment, in the configuration shown in FIG. 3, when the high speed interface signal receiving portion 1 detects an abnormality in the received signal, an alarm prohibition flag as means for notifying the downstream device of the received signal of the abnormality detection. The time slot exchange section 2 and the low-speed interface signal transmission section 3 are notified of this flag, and the time slot exchange section 2 receives the signal from the alarm prohibition flag generation section 23 to generate an alarm. Alarm prohibition processing unit as a means to suppress
25 is provided, and the low speed interface signal transmitting portion 3 is also provided with an alarm prohibition processing unit 22 as a means for suppressing the alarm generation.

The alarm prohibition flag generation unit 23 is provided with OR gates in a column, and the high-speed signal conversion unit 5, the section termination unit 6,
AU-32 pointer processing unit 7, VC-32 path termination unit 8, TU-11
/ TU-21 Signal loss frame output from pointer processing unit 9,
When either the out-of-frame detection output or the alarm detection signal is input, the information output is sent to the time slot exchange section 2.

Further, the high speed signal converter 5, the section terminating unit 6, the AU-32 pointer processing unit 7, the VC-32 path terminating unit 8, and the TU-11 / TU-21 pointer processing unit 9 of the high speed interface signal receiving portion 1 are connected in cascade. With the above configuration, the alarm prohibition flag generation unit 23 is provided with a circuit for taking each of the alarm detections and ORing the inputs, and the alarm detection from the processing unit on the downstream side of the signal is The alarm processing unit 10 from each of the downstream processing units is notified by the alarm detection notification from the upstream processing unit.
Prohibition processing unit with a gate that suppresses alarms to
It has 24.

 The operation of the first embodiment will be described.

First, a case will be described in which the high-speed signal converting unit of the high-speed interface signal receiving unit 1 detects an input signal disconnection or the section terminating unit 6 detects loss of frame synchronization or AIS.

When the high-speed signal conversion section 5 of the high-speed interface reception section 1 detects an input signal loss, or when the section termination section 6 detects frame desynchronization or AIS, the alarm processing section 10 is notified of the detected information and an alarm is issued. The prohibition flag generation unit 23 is also notified.

The alarm prohibition flag generator 23 generates an alarm prohibition flag by receiving the information and sends it to the alarm prohibition processor 24 and the time slot exchange part 2.

The AU-3 pointer processing unit 7 detects the VC-32 AIS generated by the section terminating unit 6 and the pointer abnormality,
The alarm prohibition flag generator 23 and the alarm prohibition processor 24 are notified. Further, the VC-32 path termination unit 8 detects a VC-32 path alarm and notifies the alarm prohibition flag generation unit 23 and the alarm prohibition processing unit 24. Further, the TU-11 / TU-21 pointer processing unit 9 detects the VC-11 or VC-21 AIS and the pointer abnormality to detect the alarm prohibition flag generation unit 23 and the alarm prohibition processing unit.
Notify 24.

In the alarm prohibition processing unit 24, the received VC-32 AIS and pointer abnormality detection information, VC-32 path alarm detection information, VC-11
Or, by determining each information of VC-21AIS and pointer abnormality detection information and alarm prohibition flag, VC-32AIS and pointer abnormality detection information, VC-32 path alarm detection information, VC-
11 or VC-21AIS and pointer abnormality detection information are not sent to the alarm processing unit 10, so VC-32AIS and pointer abnormality alarm, VC-32 path alarm, VC-11 or VC-21AIS and pointer abnormality alarm are not issued. .

VC-11 / 21 path termination section 1 in time slot exchange section 2
At 1, all "1" signals from the high speed interface signal receiving portion 1 are received, a VC-11 or VC-21 path alarm is detected, and the alarm prohibition processing unit 25 is notified.

In the alarm prohibition processing unit 25, the received VC-11 or VC-21
By judging the path alarm detection information and the alarm prohibition flag information received from the high speed interface signal receiving part 1, VC-
Since the 11 or VC-21 path alarm detection information is not sent to the alarm processing unit 13, the VC-11 or VC-21 path alarm detection information is not issued.

The time slot exchange unit 12 performs the same time slot exchange operation as the time slot exchange of the main signal on the alarm prohibition flag received from the high speed interface signal reception unit 1, and the alarm inhibit flag operates on the low speed interface signal transmission unit corresponding to the main signal. 3 to the alarm prohibition processing unit 22.

HG path termination part in low-speed interface signal transmission part 3
At 14, the HG AIS is detected and notified to the alarm prohibition processing unit 22, and the failure of the path is notified to the exchange side through the low speed signal conversion unit 15.

Since the alarm prohibition processing unit 22 judges the received HG alarm detection information and the received alarm prohibition flag and does not send the HG alarm detection information to the alarm processing unit 16, the HG alarm is not issued.

Next, a case where the high-speed interface signal receiving portion 1 receives a VC-32 AIS from another device will be described.

High-speed interface signal receiving part 1 from other devices
When VC-32AIS is received, the AU-32 pointer processing unit 7 in the high-speed interface signal receiving portion 1 receives all VC-32 "1" data signals from other devices and issues a VC-32AIS alarm. It detects and notifies the alarm prohibition flag generation unit 23 and the alarm prohibition processing unit 24. In the VC-32 path termination unit 8, the VC-32
A -32 path alarm is detected and notified to the alarm prohibition flag generator 23 and the alarm prohibition processor 24. Further, the TU-11 / TU-21 pointer processing unit 9 detects VC-11 or VC-21AIS and pointer abnormality and notifies the alarm prohibition flag generation unit 23 and the alarm prohibition processing unit 24.

The alarm prohibition flag generator 23 generates an alarm prohibition flag by receiving the information and sends it to the alarm prohibition processor 24 and the time slot exchange part 2.

In the alarm prohibition processing unit 24, the received VC-32AIS alarm detection information, VC-32 path alarm detection information, VC-11 or VC-21AI
Since the S and pointer abnormality detection information and the alarm prohibition flag information are judged and the VC-32AIS or VC-21AIS and the pointer abnormality detection information are not sent to the alarm processing unit 10, the VC-32 path alarm, VC-11 or VC-21AIS and pointer error alarm does not occur. Further, regarding the time slot exchange portion 2 and the low speed interface signal transmission portion 3, the input signal disconnection, the frame synchronization loss, and the time slot exchange portion 2 and The alarm prohibition processing unit 25 of the low-speed interface signal transmission part 3,
At 22, the alarm prohibit flag from the high-speed interface signal receiving portion 1 is detected, so that the secondary alarm is not issued.

Next, a case where the high speed interface signal receiving section 1 receives VC-11AIS from another device will be described.

High-speed interface signal receiving part 1 from other devices
When VC-11AIS is received, the TU-11 / TU-21 pointer processing unit 9 in the high-speed interface signal receiving section 1 receives all VC-1 "1" data signals from other devices, −
11 An AIS alarm is detected and notified to the alarm prohibition flag generator 23 and the alarm prohibition processor 24.

The alarm prohibition flag generator 23 generates an alarm prohibition flag by receiving the information and sends it to the alarm prohibition processor 24 and the time slot exchange part 2.

The alarm prohibition processing unit 24 sends the received VC-11AIS alarm detection information to the alarm processing unit 10, and issues a VC-11AIS alarm. Further, regarding the time slot exchange portion 2 and the low speed interface signal transmission portion 3, the input signal disconnection, the frame synchronization loss, and the time slot exchange portion 2 and Low speed interface signal transmission part 3
Since the alarm prohibition processing units 13 and 16 detect the alarm prohibition flag from the high-speed interface signal receiving portion 1, the secondary generation of the alarm does not occur.

FIG. 2 shows the configuration of the second embodiment of the present invention.
This corresponds to the second conventional example shown in FIG.

That is, in the second embodiment, in the configuration shown in FIG. 4, when the high speed interface signal receiving portion 1 detects an abnormality in the received signal, an alarm prohibition flag as means for notifying the downstream side device of the received signal of the abnormality detection. With the generator 23,
This flag is notified to the high-speed interface signal transmitting portion 18 via the time slot exchanging portion 2, and the high-speed interface signal transmitting portion 18 is provided with an alarm prohibition processing unit 27 as means for suppressing alarm generation.

The alarm prohibition flag generation unit 23 is provided with OR gates in a column, and the high-speed signal conversion unit 5, the section termination unit 6,
AU-32 pointer processing unit 7, VC-32 bus termination unit 8, TU-11
/ TU-21 Signal loss frame output from pointer processing unit 9,
When either the out-of-frame detection output or the alarm detection signal is input, the information output is sent to the time slot exchange section 2.

Further, the high-speed signal conversion unit 5, the section termination unit 6, the AU-32 pointer processing unit 7, the VC-32 bus termination unit 8, and the TU-11 / TU-21 pointer processing unit 9 of the high-speed interface signal reception unit 1 are connected in cascade. With the above configuration, the alarm prohibition flag generation unit 23 is provided with a circuit for taking each of the alarm detections and ORing the inputs, and the alarm detection from the processing unit on the downstream side of the signal is The alarm processing unit 10 from each of the downstream processing units is notified by the alarm detection notification from the upstream processing unit.
Prohibition processing unit with a gate that suppresses alarms to
It has 24.

 The operation of the second embodiment will be described.

Since the operation of the high speed interface signal receiving portion 1 is the same as that of the first embodiment, the description thereof will be omitted.

In the time slot exchange part 2, the alarm prohibition flag received from the high speed interface signal reception part 1 performs the same time slot exchange operation as the time slot exchange of the main signal, and the alarm prohibition flag corresponds to the high speed interface signal transmission part corresponding to the main signal. It is sent to the alarm prohibition processing unit 27 of 18.

In the VC-11 path monitor / monitor section 26 of the high-speed interface signal transmitting section 18, the VC-11 from the time slot switching section 2
The 11-path overhead is monitored, a VC-11 path alarm is detected, and the alarm prohibition processing unit 27 is notified. The alarm prohibition processing unit 27 judges the received VC-11 path alarm detection information and the received alarm prohibition flag, and outputs the VC-11 and path alarm detection information to the alarm processing unit 27.
Therefore, the VC-11 path alarm is not issued.

〔The invention's effect〕

As described above, by using the alarm prohibition flag, in the high-speed interface signal receiving part, the input signal is disconnected, the frame is out of sync, any AIS alarm is detected, and VC-32AIS, VC-21 from other devices are detected. Or VC
−11 When an AIS alarm is detected, a large number of VCs generated in the high-speed interface signal transmission section are generated by simple hardware.
-32, VC-11 VCs that are frequently generated in the alarm issuing and time slot exchange part or high-speed interface transmission part-
It is possible to prohibit the issuing of 11 alarms and issuing of HG alarms that occur frequently in the low-speed interface transmission part.

Further, since it is not necessary to prohibit the alarm issuance by software processing, the load of software processing can be reduced and the efficiency of transmission device development can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing the configuration of the first embodiment of the present invention. FIG. 2 is a diagram showing the configuration of the second embodiment of the present invention. FIG. 3 is a diagram showing a first configuration of conventional time slot exchange. FIG. 4 is a diagram showing a second configuration of conventional time slot exchange. FIG. 5 is a diagram for explaining an alarm issuing alarm transfer in the example shown in FIG. FIG. 6 is a diagram for explaining the alarm issuing alarm transfer in the example shown in FIG. 1 ... High-speed interface signal receiving part, 2 ... time slot exchange part, 3 ... low-speed interface signal transmitting part, 4 ... alarm monitoring part, 5,21 ... high-speed signal converting part, 6 ... section terminating part, 7 ... AU-32 pointer processing unit, 8 ... VC-32 path termination unit, 9 ... TU-11 / TU-21
Pointer processing unit, 10, 13, 16, 28 ... Alarm processing unit, 11 ...
... VC-11 / VC-21 path termination unit, 12 ... Time slot switching unit, 14 ... HG path termination unit, 15 ... Low-speed signal conversion unit, 17
...... Alarm monitor, 18 ...... High-speed interface signal transmitter, 19 AU-32 frame generator, 20 ...... Section frame generator, 22, 24, 25, 27 …… Alarm prohibition processor, 23
…… Alarm prohibition flag generator, 26 …… VC-11 path monitoring monitor.

Claims (3)

(57) [Claims] 1. A receiving interface means for receiving a signal sent from another device, converting it into a signal suitable for an internal device and passing it to a time slot exchanging means, and a time slot exchanging of a signal received by the receiving interface means. The transmission system has a time slot exchanging means for performing the time slot exchanging means, and a transmission interface means for converting the signal subjected to the time slot exchanging by the time slot exchanging means into a signal suitable for an external device and outputting the signal to another device. In the alarm detection device that monitors the state of the received signal in the means and sends an alarm when an abnormality is detected, when an abnormality is detected in the reception interface means, the abnormality of the received signal processing means in the downstream side of the device of the received signal is detected. A means for notifying the detection means of abnormality detection is provided, and the abnormality detection means of the transmission interface means is provided. Includes alarm prohibition processing means for suppressing alarm generation by the output of the notifying means sent via the time slot exchanging means, and the time slot exchanging means includes a reception signal as a signal of the notifying means. An alarm detection device comprising means for performing the same time slot exchange operation. 2. The alarm detecting apparatus according to claim 1, wherein the abnormality detecting means for the received signal in the time slot exchanging means includes an alarm prohibition processing means for suppressing the alarm generation by the output of the notifying means. 3. The reception interface means comprises a plurality of signal processing means for receiving signals, each of which is connected in cascade, and an abnormality detecting means for receiving signals for the respective signal processing means. The means is
When one of them detects an anomaly in the received signal, it is connected in cascade so as to notify the anomaly detection to the monitoring means on the downstream side in the receiving interface means of the received signal, and the alarm occurrence is suppressed by the anomaly detection notification. The alarm detection device according to claim 1 or 2, further comprising an alarm prohibition processing means.