JP2532965B2 - Color video camera - Google Patents

Description

The present invention relates to an automatic white balance adjustment device for a color video camera that controls white balance based on a captured video signal obtained from an image sensor.

(B) Conventional Technology In a color video camera, it is necessary to control white balance in order to correct the difference in the wavelength distribution of light depending on the light source.

This control is performed by adjusting the gain of each color signal so that the ratio of the three primary color signals of red (hereinafter R), blue (hereinafter B), and green (hereinafter G) is 1: 1: 1. Generally, for example, as shown in JP-A-62-35792 (H04N9 / 73), a method of adjusting the gain so that the integrated value of the color difference signals RY and BY of the screen becomes zero is used. ing.

FIG. 12 is a block diagram of a white balance circuit using this method.

The light that has passed through the lens (1) is the image sensor (CCD).
After photoelectric conversion in (2), R,
The three primary color signals of G and B are extracted, and the G color signal is directly input to the camera process and the matrix circuit (6) through the R amplification circuit (4) and the B amplification circuit (5). The luminance signal Y, color difference signals RY and BY for red and blue, respectively, are generated and input to the video circuit (7).

At the same time, the two color difference signals are respectively integrated by an integrating circuit (17).
In (18), the gain control circuits (13) and (14) adjust the gains of the R and B amplifier circuits (4) and (5) so that they are integrated for a sufficiently long time and the result becomes zero. To do.

However, in the above-mentioned configuration, since the feedback always works, the correction amount of the amplification gain easily fluctuates depending on the subject, and there is a problem that the unstable white balance correction is performed. Therefore, as a method of solving such a problem, when the change in the correction amount becomes relatively small,
It is conceivable to provide a stop mode for stopping the new white balance adjustment operation.

The white balance adjusting device to which the stop mode is added will be described below with reference to FIGS. 2 to 11 and 13 to 16. FIG. 16 is an overall circuit block diagram.

The light passing through the lens (1) is imaged on the CCD (2) and photoelectrically converted, and then R,
It is taken out as three primary color signals of G and B. The R and B signals of these three primary color signals are input to the camera process and matrix circuit (6) together with the G signal through the R and B amplifier circuits (4) and (5), respectively, and the luminance signal ( Y) and the color difference signals (RY) of red and blue (B-
Y) is created and supplied to the video circuit (7) and subjected to well-known processing. Further, the respective signals (RY) and (BY) are simultaneously supplied to the selection circuit (21).

The selection circuit (21) receives the color difference signals (RY) and (BY) according to the selection signal (S-1) from the timing circuit (25).
One of the two signals is sequentially selected for each field. (RY) → (BY) → (RY) →
.. are output to the A / D converter (22) in the subsequent stage for each field. The selection signal (S1) is created based on the vertical sync signal obtained from the sync separation circuit (24) as described later.

The A / D converter (22) has a color difference signal (RY) (B-Y) selected by the selection circuit (21) at a predetermined sampling cycle.
Sampling one of Y) and converting it to a digital value,
This value is output to the integrator (23). By the way, the timing circuit (25) displays the image pickup screen on the basis of the vertical and horizontal synchronizing signals from the camera process and the matrix circuit (6) and the fixed oscillator output for driving the CCD (2), and the 8 × 8 image pickup screen shown in FIG. 64 rectangular areas (A11), (A12), (A1
3) ... (A88), that is, (Aij) (i, j = 1 to integer of 8) is divided, and the output of the selection circuit (21) in these regions is taken out by time division for each region. Switching signal for (S2)
Is output to the integrator (23).

The integrator (23) receives the switching signal (S2), adds the A / D converted value of the output of the selection circuit (21) over one field period for each region, that is, digitally integrates for every 64 regions, When the integration for one field is completed, the integrated value is held in the memory (26) as a color evaluation value. As a result, digital integration values of color difference signals (RY) corresponding to 64 areas in a given field are obtained as 64 color evaluation values (rij) (i, j: 1 to 8). It will be. In the next field, the color difference signal (B
-Y) is selected, as a result of integration in each area of the integrator (23), digital integration values for each area of the color difference signal (BY) are obtained as 64 color evaluation values (bij). . Thus, when the integration of the two fields of the color difference signals (RY) (BY) is completed, the color evaluation value (rij) (bi
The 64 × 2 value of j) will be held in the memory (26). After that, the same operation as described above is repeated, and the color evaluation value (rij) in the next field and the color evaluation value (bij) in the next field are sequentially updated.

FIG. 14 shows the internal structure of the integrator (23) in more detail. Each A / D conversion data is supplied to the switching circuit (61). This switching circuit (61) receives the switching signal (S2) and
Adder (F11) (F12) with A / D conversion value prepared for each area
.. (F88) has a role of supplying to the adder for the area where the sampling point of the corresponding data exists. That is, the sampling point of certain arbitrary data is the area (A11)
If it is included in the above, this data is supplied to the adder (F11) for the area (A11). In the following, similarly, the adders (Fij) (ij = 1 to 8) are set for the area (Aij), and a total of 64 adders are prepared. A holding circuit (Qij) is arranged after each adder, and each added value is temporarily held in each holding circuit. The data held in each holding circuit is input to the adder again and added to the data input next. Further, each holding circuit is reset for each field based on the vertical synchronizing signal, and only the held data immediately before this reset is supplied to the memory (26). Therefore,
One digital integrator circuit is configured by one set of adder and holding circuit, and a total of 64 integrator circuits constitute the integrator (23).
The digital integrated value is input to the memory (26) for each of the regions. When the integration for this one field is completed, this integrated value is held in the memory (26) as a brightness evaluation value or a color evaluation value.

The latest color evaluation value (rij) (bi
j) (i, j: 1 to 8) is sent to the screen evaluation circuit (27), and the color evaluation value (Vr) (Vb) of the entire screen of each color difference signal is calculated based on the following equations (1) and (2). Is calculated as

The equations (1) and (2) are used to calculate the color evaluation values (ri
j) All sums of (bij) are divided by the number of areas, and an average value for one area is calculated as a screen color evaluation value. The screen color evaluation values (Vr) and (Vb) are gain control circuit (28), first evaluation value comparison circuit (30) and second evaluation value comparison circuit (31).
Sent to

In the gain control circuit (28), the R and B amplification circuit (4)
In order to make the screen color evaluation value (Vr) (Vb), which is the color evaluation value of the entire screen, be zero by correcting the current gain of (5),
A correction value signal corresponding to the correction value (Gpr) (Gpb) for the current gain is created and output to the correction value comparison circuit (29).

Next, operations of the correction value comparison circuit (29) and the first and second evaluation value comparison circuits (30) and (31) will be described.

The correction value comparison circuit (29) is constructed as shown in FIG. That is, the current gain correction value (Gmr) (Gmb) stored in the R and B correction value memory (33) (34) and adjusting the gain of the current R and B amplification circuit (4) (5) , And the correction values (Gpr) and (Gpb) obtained from the gain control circuit (28) are compared by the R correction value comparator (29a) and the B correction value comparator (29b), respectively. As a result, in the R correction value comparator (29a), (G
If it is determined that mr) = (Gpr), the control signal (Pr1)
When it is determined that the H level signal is (Gmr) ≠ (Gpr), the L level signal is output to the correction value increasing / decreasing circuit (35) as the control signal (Pr1). If (Gmr) <(Gpr) at this time, H is set as the control signal (Pr2).
If the level signal is (Gmr)> (Gpr), the L level signal is used as the control signal (Pr2) and the correction value increasing / decreasing circuit (3
It is output to 5). The B correction value comparator (29b) also makes the same determination, and if (Gmb) = (Gpb) is determined, the H level signal as the control signal (Pb1) is
When it is determined that (Gmb) ≠ (Gpb), the L-level signal as the control signal (Pb1) is the correction value increasing / decreasing circuit (35).
Is output to (Gmb) <(Gpb) at this time, an H-level signal as the control signal (Pb2), and (Gmb)> (Gp
In the case of b), an L level signal is output to the correction value increasing / decreasing circuit (35) as the control signal (Pb2). At the same time, in the R correction value comparator (29a), each input correction value (Gmr) (Gpr)
Difference, | Gmr−Gpr |, and the B correction value comparator (29b) calculates the difference (Gmb) (Gpb), | Gmb−Gpb |, which are both sent to the correction value adder (29c). . Correction value adder (29c)
Then, the sum of them, | Gmr−Gpr | + | Gmb−Gpb |, is calculated, and in the correction value comparator (29e), the magnitude relationship with the threshold value (TG) stored in advance in the correction value threshold value memory (29d) is shown. Be compared. As a result, when | Gmr-Gpr | + | Gmb-Gpb | ≤TG (3), the H-level signal as the control signal (P1), and | Gmr-Gpr | + | Gmb-Gpb |> TG (4) At the time of, an L level signal is output as the control signal (P1).

The first evaluation value comparison circuit (30) is constructed as shown in FIG. First, in the first R evaluation value subtractor (30a), the screen color evaluation value (Vr) output from the screen evaluation circuit (27) and the R reference value (V1r) previously stored in the R reference value memory (30c) are stored. Difference of | Vr−V1r |, and in the 1B evaluation value subtractor (30b),
The difference between the screen color evaluation value (Vb) and the B reference value (V1b) stored in advance in the B reference value memory (30d), | Vb−V1b |, is calculated, and both are the first evaluation value adder (30e). Sent to. First
The sum of these values | Vr−V1r | + | Vb−V1b | is calculated in the evaluation value adder (30e) and stored in advance in the first evaluation value threshold value memory (30f) in the first evaluation value comparator (30g). Threshold (T
The magnitude relationship with v1) is compared. As a result, when | Vr−V1r | + | Vb−V1b | ≦ Tv1 (5), an H-level signal as the control signal (P2), and | Vr−V1r | + | Vb−V1b |> Tv1 (6) At the time of, the L level signal is output as the control signal (P2).

The second evaluation value comparison circuit (31) is constructed as shown in FIG. First, in the second R evaluation value subtractor (31a), the screen color evaluation value (Vr) output from the screen evaluation circuit (27) and the R evaluation value (V2r) stored in advance in the R evaluation value memory (31c) are stored. Difference of | Vr−V2r |, and in the second B evaluation value subtractor (31b),
The difference between the screen color evaluation value (Vb) and the B evaluation value (V2b) stored in advance in the B evaluation value memory (31d), | Vb−V2b |, is calculated, and the second evaluation value adder (31e) Sent to. Second
The sum | Vr−V2r | + | Vb−V2b | is calculated in the evaluation value adder (31e) and stored in advance in the second evaluation value threshold memory (31f) in the second evaluation value comparator (31g). Threshold (T
The magnitude relationship with v2) is compared. As a result, when | Vr−V2r | + | Vb−V2b | ≦ Tv2 (7), the H-level signal as the control signal (P3), and | Vr−V2r | + | Vb−V2b |> Tv2 (8) At the time of, the L level signal is output as the control signal (P3).

As described above, the control signals (P1) (P2) (P3) output from the correction value comparator (29), the first evaluation value comparison circuit (30), and the second evaluation value comparison circuit (31) are Both are input to the stability determination circuit (32).

The stability determination circuit (32) is configured as shown in FIG. 5, and the control signals (P1) (P2) (P3) are input to the OR gate (51).
The switch (52) selects the fixed contact (52a) to which the control signal (P1) is applied or the fixed contact (52b) connected to the OR gate (51) and the fixed contact (52c) connected to the output terminal. The switching control is controlled by the output control signal (P4) generated at the output terminal. When the signal (P4) is at the H level, the fixed contact (52b) side is provided, and when the signal (P4) is at the L level, the fixed contact ( 52a) side.

Next, the operation of the stability determination circuit (32) will be described. First, if an H level control signal (P1) is input to the stability determination circuit (32), the output of the OR gate (51) will always be at H level, so which fixed contact the switch (52) first contacts. Even if there is, the output control signal (P4) becomes H level,
Eventually, the switch (52) will be connected to the fixed contact (52b) side. In this state, control signals (P1) (P2) (P
As long as at least one of 3) is H level, the output control signal (P4) becomes H level. Next, if the control signals (P1), (P2), and (P3), both of which are at the L level, are input to the stability determination circuit (32), the output of the OR gate (51) becomes the L level, so the output control signal (P4). ) Becomes L level, and the switch (52) is connected to the fixed contact (52a) side. In this state, as long as the control signal (P1) is at L level, the output control signal (P4) is at L level.

That is, when the equation (3) is satisfied in the correction value comparison circuit (29), the stability determination circuit (32) issues an H level output control signal (P4), and this H level control signal (P4) will be described later. As a white balance stop signal.

On the other hand, in the correction value comparison circuit (29), the equation (4) is
When the equation (6) in the first evaluation value comparison circuit (30) and the equation (8) in the second evaluation value comparison circuit (31) are both satisfied, the stability determination circuit (32) controls the L level. A signal (P4) is emitted, and this L level control signal (P4) acts as a white balance operation signal.

This control signal (P4) is supplied to the second evaluation value comparison circuit (31),
And the correction value increasing / decreasing circuit (35).

In the second evaluation value comparison circuit (31), the edge detector (31
h) receives this control signal (P4). Edge detector (31
The pulse h) emits a pulse only when the control signal (P4) changes from the L level to the H level. When the switch (31i) receives this pulse, the switch is closed and the screen color evaluation value (V) is stored in the R evaluation value memory (31c) and the B evaluation value memory (31d).
r) (Vb) is allowed and memory (31c) (31
The screen color evaluation value immediately after this passage is stored in d).

Therefore, when the white balance correction shifts from the operation mode to the stop mode, that is, when the operation mode ends, the screen color evaluation values (Vr) (Vb) are respectively stored in the R evaluation value memory (31c).
And B evaluation value memory (31d).

Current gain correction value (Gmr) (Gmb) and control signal (Pr
The configuration of the correction value increasing / decreasing circuit (35) which receives (1) (Pr2) (Pb1) (Pb2) (P4) is as shown in FIG. That is, the correction value increasing / decreasing circuit (35) is composed of six switches and R and B increasing circuits (46) (48) and R and B decreasing circuits (47) (49). The switches (40) and (41) are switched and controlled by the control signal (P4), a signal indicating the gain correction value (Gmr) is applied to the contact (40c), and the fixed contact (40a) is the output terminal (35a). In addition, the fixed contact (40b) is a switch (4
It is connected to the contact (42c) of 2). The switch (42) is switched and controlled by the control signal (Pr1), and the fixed contact (4
2a) is connected to the output terminal (35a), and the fixed contact (42b) is connected to the contact (44c) of the switch (44). The switch (44) is switched and controlled by the control signal (Pr2), and the fixed contacts (44a) and (44b) are respectively provided with an R increase and R decrease circuit (4
6) Connected to (47). Here, the outputs of the R increasing and decreasing circuits (46) (47) are led to the output terminal (35a).

Similarly, a signal indicating the gain correction value (Gmb) is applied to the contact (41c) of the switch (41), the fixed contact (41a) is connected to the output terminal (35b), and the fixed contact (41b) is connected to the switch (41b). It is connected to the contact (43c) of 43). Switch (4
3) is switched and controlled by the control signal (Pb1), the fixed contact (43a) is connected to the output terminal (35b), and the fixed contact (43b)
Is connected to the contact (45c) of the switch (45). The switch (45) is switched and controlled by the control signal (Pb2), and the fixed contacts (45a) (45b) are connected to the R increase and R decrease circuits (48) and (49), respectively. Here, the outputs of the R increasing and decreasing circuits (48) and (49) are led to the output terminal (35b).

 Next, the operation of the correction value increasing / decreasing circuit (35) will be described.

First, when the H-level control signal (P4) is input to the switch (40) and the switch (41), that is, when the white balance correction is in the stop mode, the switch (40) is placed on the fixed contact (40a) side. The switch (41) is located on the fixed contact (41a) side, and the R correction value memory (33) and the B correction value memory (3
The value (Gmr) (Gmb) stored in 4) is output as it is to the output terminals (35a) (35b) as the gain correction value (Gr) (Gb), and the amplifier circuits (4) (5) for R and B respectively. ) Gain is adjusted. Next, when the control signal (P4) becomes L level, that is, when the white balance is in the operation mode, the switch (40)
Is on the fixed contact (40b) side, and the switch (41) is on the fixed contact (41b) side. The correction values (Gmr) () stored in the R correction value memory (33) and the R correction value memory (34) Gmb)
Are input to the switches (42) and (43), respectively.

When the control signal (Pr1) is at H level, the switch (42)
That is, when the correction value comparison circuit (29) determines (Gmr) = (Gpr), the value on the fixed contact (42a) side and stored in the R correction value memory (33) is the same as the gain correction value. It is output as (Gr) and adjusts the gain of the R amplifier circuit (4). Next, when the control signal (Pr1) becomes L level,
That is, when it is determined that (Gmr) ≠ (Gpr) in the correction value comparison circuit (29), the switch (42) has the fixed contact (42b).
The correction value (Gmr) on the side and stored in the R correction value memory (33) is input to the switch (44). On the other hand, the switch (43) also performs the same operation as the switch (42), and when the control signal (Pb1) is at the H level, the value stored in the B correction value memory (34) is directly the gain correction value (Gb ) And the control signal (Pb1) becomes L level, the correction value (Gmb) stored in the B correction value memory (34) is input to the switch (45).

When the control signal (Pr2) is at H level, the switch (44)
That is, when the correction value comparison circuit (29) determines (Gmr) <(Gpr), the correction value (Gmr) on the fixed contact (44a) side and stored in the R correction value memory (33) is R It is input to the increasing circuit (46) and a preset constant value (r
0) is added and output as a gain correction value (Gr).
That is, Gr = Gmr + r0. Further, when the control signal (Pr2) becomes L level, that is, when the correction value comparison circuit (29) judges that (Gmr)> (Gpr), the switch (44)
Is on the side of the fixed contact (44b), the correction value (Gmr) is input to the R reduction circuit (47), the constant amount value (r0) is subtracted, and the gain correction value (Gr) is output, that is, Gr. = Gmr-r0, the gain of the R amplifier circuit (4) is adjusted. On the other hand, the switch (45) also performs the same operation as the switch (44), and when the control signal (Pb2) is at the H level, the correction value (Gmb) value stored in the B correction value memory (34) is When a constant amount value (b0) is added in the B increase circuit (48) and the control signal (Pb2) becomes L level, the correction value (Gmb)
In the B reduction circuit (49), a constant amount value (b0) is subtracted and output as a gain correction value (Gb) to adjust the gain of the B amplification circuit (5).

The R and B gain correction values (Gr) (Gb) output from the correction value increasing / decreasing circuit (35) are stored again in the R correction value memory (33) and the B correction value memory (34), respectively. In the field of, the white balance adjustment is used as the current correction value (Gmr) (Gmb). Therefore, R and B correction value memory (3
3) The contents of (34) are output terminal (35a) for each field.
It will be updated with the correction value from (35b).

In the B amplifier circuit (4), R is set according to the gain correction value (Gr).
When the correction value (Gr) is zero, the gain is fixed at 1. When the correction value (Gr) is zero, the gain is increased when the correction value (Gr) is changed in the positive direction, and is increased when the correction value (Gr) is changed in the negative direction. The gain is small. Similarly, in the B amplifier circuit (5), the amplification gain of the B signal changes according to the gain correction value (Gb), and the gain is fixed at 1 when Gb = 0.

The operation of each circuit described above will be described by taking an actual white balance correction as an example.

First, the operation when the white balance correction shifts from the operation mode to the stop mode will be described.

Now, the R correction value memory (33) and the B correction value memory (34)
R is the gain correction value (Gmr) (Gmb) stored in each
It is assumed that the amplification gains of the amplifier circuit (4) and the B amplifier circuit (5) are controlled and the white balance is properly maintained. When the screen color evaluation value changes here, the gain correction amount (Gpr) (Gpb) calculated by the gain control circuit (28) changes as shown in FIG. 7, and the comparison result in the correction value comparison circuit (29) Based on the above, the correction value increasing / decreasing circuit (35) increases or decreases the gain correction amount stored in each of the correction value memories of R and B, and changes from (Gmr) (Gmb) to (Gmr ') (Gmb'). The relationship of the expression (3) is established, and the H-level control signal (P1) is output.
In FIG. 7, the range in which the relationship of the expression (3) is established is a square (chain line) area centered on (Gpr) (Gpb). Also, the size of this square depends on the threshold value (TG) itself, and this threshold value (TG) is set to a value at which it can be determined that the gain of the white balance may be fixed based on the actual measurement value obtained by actual photographing. It is set. When the stability determination circuit (32) receives this and outputs the H-level control signal (P4), the correction value increasing / decreasing circuit (35) stops increasing / decreasing the gain correction amount, and the white balance correction enters the stop mode. . In this way, the gain correction value is gradually increased by the increase circuit (46) (48) or the decrease circuit (47) (49) and the R or B amplification circuit (4) (5) changes the gain to execute white balance adjustment. If the change in the gain correction value for each field falls within the threshold value (TG), the increase or decrease of the gain correction value is stopped to suppress the fluctuation of the white balance adjustment, and the gain correction value immediately before the stop is maintained, and R And B
The gains of the amplifier circuits (4) and (5) are fixed to a constant gain determined by this correction value. The correction value at this time is stored in the R and B correction value memory (33) while the stop mode is continued.
(34) will continue to be held. In other words, the gains of the R and B amplifier circuits (4) and (5) during the stop mode are fixed by the correction value immediately before the stop mode stored in the memory. Next, the operation when the white balance correction shifts from the stop mode to the operation mode will be described.

Now, the R correction value memory (33) and the B correction value memory (34)
R is the gain correction value (Gmr) (Gmb) stored in each
It is assumed that the amplification gains of the amplifier circuit (4) and the B amplifier circuit (5) are controlled and the white balance is properly maintained. Here, the gain correction value obtained based on the screen color evaluation value is the 9th
As long as it changes within a certain range from (Gmr) and (Gmb) like (Gpr ″) and (Gpb ″) in the figure, that is, within the range where the formula (3) is satisfied, the gain correction amount is changed. It is judged that it is not necessary to let them do. However, the gain correction amount (Gpr) (Gpb) becomes (Gp
r ') (Gpb'), and when the equation (4) is satisfied, the gain correction values (Gr) (Gb) are no longer stored in the memory (3
3) It is judged that proper white balance cannot be obtained if the correction value (Gmr) (Gmb) held in (34) is fixed, and the correction value comparison circuit (29) outputs the L level The control signal (P1) is output.

Next, the operation performed by the first evaluation value comparison circuit (30) for the same change in the screen color evaluation value will be described. First, when the white balance is appropriate, the screen color evaluation value (Vr)
(Vb) is like (Vr ″) (Vb ″) in FIG.
As long as it changes from b) within a certain range (the range of the chain line depending on the threshold value (TV1)), that is, within the range where the expression (5) is satisfied, it is not judged that the screen color evaluation value has changed. However, when the screen color evaluation value changes like (Vr ') (Vb') and the expression (6) is established, the first evaluation value comparison circuit (30) outputs an L level control signal. (P2) is output.

Here, the reference value (V1r) (V1b) is preset to the screen color evaluation value of each color difference signal when a completely achromatic subject whose entire screen is white is photographed. The color difference signals (RY) (BY) output from the & matrix circuit (6) have reference values (V1r) (V1b) both set to zero when a completely achromatic subject is photographed. It will be. Therefore, in equation (5), | Vr−V
1r | is the degree of separation of the color difference signal (RY) from the zero level,
In other words, it is a value indicating how far from the achromatic color, and similarly | Vb−V1b | is a value indicating the degree of separation of the color difference signal (BY) from the zero level, and the sum of the two is the entire screen. About the white color. Therefore, by setting the threshold value (Tv1) as an allowable width of an appropriate white balance, if the expression (5) is satisfied, it is within an allowable range in which it can be determined that an appropriate white balance is realized on the imaging screen. It is not necessary to operate the white balance adjustment. If the formula (6) is satisfied, the image pickup screen exceeds the allowable range where it can be determined that the proper white balance is realized, and the gain correction value is immediately increased or decreased. It is necessary to set the accompanying white balance adjustment as the operation mode.

Further, the operation performed by the second evaluation value comparison circuit (31) with respect to the similar change of the screen color evaluation value will be described. In the R correction value memory (31c) and the B correction value memory (31d), the screen color evaluation value when the white balance correction enters the stop mode (V2
r) (V2b), and the screen color evaluation value (Vr) (Vb) newly calculated by the screen evaluation is (V2r) (Vr ″) (Vb ″) as shown in FIG. As long as it changes from V2b) within a certain range (the range of the chain line depending on the threshold value (TV2)), that is, within the range where the expression (7) is satisfied, it is not judged that the screen color evaluation value has changed. However, when the screen color evaluation value changes like (Vr ') (Vb') and the equation (8) is satisfied, the second evaluation value comparison circuit (31) outputs an L level control signal. (P3) is output.

Here, the threshold (TV2) is the change in the current screen color evaluation value (Vr) (Vb) with respect to the screen color evaluation value (V2r) (V2b) when the stop mode is entered, and the white balance adjustment due to the gain increase / decrease. It is a value for setting an allowable range where it can be determined that it is not necessary to perform it, and it is set in advance based on an actually measured value obtained through experiments.

Thus, in the correction value comparison circuit (29), the expression (4) is used, in the first evaluation value comparison circuit (30), the expression (6) is used, and in the second evaluation value comparison circuit (31), the expression (8) is used. It is confirmed that the formula is satisfied, and both are L level control signals (P1) (P2)
(P3) is output, and when the stability determination circuit (32) receives this and outputs the L-level control signal (P4), the correction value increasing / decreasing circuit (35) starts increasing / decreasing the gain correction amount, Balance correction enters the operating mode. In other words, the condition that the white balance correction enters from the stop mode to the operation mode is that the gain correction value (Gpr) (Gpb) calculated from the screen evaluation is the actual correction value (Gr) (Gb) while the stop mode continues. The correction value (Gmr) (Gmb) that is maintained changes above the threshold (TG),
Moreover, the degree of distance from the achromatic color of the screen color evaluation value (Vr) (Vb) becomes larger than the threshold value (TV1), and the screen color evaluation value (Vr) (Vb) becomes the value at the time of entering the stop mode. On the other hand, when all three conditions of changing to the threshold value (TV2) or more are satisfied at the same time, it becomes difficult to obtain the proper white balance in the stop mode, and the operation mode is set. It is also possible to shift to the operation mode if any one of the above-mentioned three conditions is satisfied.

In FIG. 16, the A / D converter (22) and the integrator (23) are shown.
Are shared in order to extract the levels of the two signals of the color difference signals (RY) and (BY) by digital integration for each area, and the integrated value of each signal can only be updated in a two-field cycle. However, it goes without saying that if the A / D converter and the integrator are provided exclusively for the respective signals, each signal level can be updated for each field.

By the way, in the above-mentioned method, the only condition for the white balance correction to shift to the stop mode is that the degree of separation of the correction values (Gpr) (Gpb) calculated from the result of the screen evaluation is within the allowable range. In addition to this, when the control signal (P2) becomes H level, that is, the degree of separation of the screen color evaluation values (Vr) (Vb) from the reference values (V1r) (V1b) is within the allowable range. By adding the condition that the stop mode is added, it is possible to more reliably determine whether or not the stop mode should be entered. According to this condition, as shown in Fig. 8, the screen color evaluation value is (Vr) when the white balance is appropriate.
(Vb), and the screen color evaluation value changes to (Vr) (Vb) due to the change of the screen, and then the amplification gains of R and B are controlled, so that the screen color evaluation value becomes (Vr ″)
When (Vb ″) is reached, the equation (5) is established, and when it enters the range of the chain line depending on the threshold value (TV1), the H-level control signal (P2) is issued.

In this case, as shown in FIG. 15, in the stability determination circuit (30), by deriving the output of the AND gate (50) having the control signals (P1) and (P2) as two inputs to the fixed contact (52a), Only when both of the above two conditions are satisfied, the stop mode can be entered.

(C) Problems to be Solved by the Invention However, even when the above-mentioned method is used, a chromatic color object occupies a large area in the imaging screen, and the color of the object changes momentarily due to panning of the video camera. , White balance correction works, repeat stop mode,
Unstable correction will be performed.

As a method of preventing this, the amount of change in the amplification gain per unit time, that is, in the above method, the R increase and decrease circuits (46) (47) and the B increase and decrease circuits in the correction value increase / decrease circuit (35) are used. It is conceivable that the changes (r0) and (b0) in (48) and (49) are set as small as possible to make the change inconspicuous. However, in the case where the color temperature of the light source actually changes and the correction needs to be completed quickly, the correction speed is slow, so that the screen does not have an appropriate color quickly.

(D) Means for Solving the Problem The present invention is a white balance adjusting device for adjusting the amplification gain of a color signal in a captured video signal, and is a target of a gain correction amount of a color signal from a color difference signal obtained from the color signal. A means for calculating a value and a means for changing the gain correction amount of the current color signal so as to approach the target value, and the current gain correction amount of the current gain correction amount according to the difference between the current gain correction amount and the target value. It is characterized by changing the changing speed, and more specifically, it is provided with a means for stopping the change of the gain of the color signal when the current gain correction amount is within a certain range from the target value. After the end, the changing speed of the gain correction amount is slowed until a certain time passes, and after the certain time passes, the changing speed of the current gain correction amount is changed according to the difference between the current gain correction amount and the target value. It is characterized by making it faster.

(E) Action Since the present invention is configured as described above, more stable and rapid white balance correction can be performed.

(F) Embodiment One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit block diagram of an automatic white balance adjusting circuit according to this embodiment. The same parts as those of the prior art are designated by the same reference numerals and the description thereof will be omitted.

Gain correction amount (Gp
The operation until r) (Gpb) is calculated is the same as in the prior art, but the correction value comparison circuit (29) is configured as shown in FIG. Gain control by adjusting the gains of the R and B amplifier circuits (4) and (5) and holding the correction values (Gmr) (Gmb) in the R correction value memory (33) and the B correction value memory (34). The correction values (Gpr) (Gpb) from the circuit (28) are compared by the R correction value comparator (29a) and the B correction value comparator (29b), and the result is the control signals (Pr1) (Pr2) ( It is output to the correction value increasing / decreasing circuit (35) as Pb1) (Pb2). The difference between the correction values input at this time, | Gmr−Gpr | is as (dr), and | Gmb−
Gpb | is output as (db) to the speed determination circuit (36).

The speed determination circuit (36) is configured as shown in FIG. 18, and first the difference (dr) is input to the R change amount calculator (50) and the difference (db) is input to the B change amount calculator (51). . In each change amount calculator,
As shown in Fig. 20, the change amount (Scr) (Scb) proportional to the magnitude of the difference (dr) (db), that is, (Scr) = a x (dr) (Scb) = a x (db) is calculated. . Here, the coefficient a is previously obtained by an experiment so that the color correction of the screen is naturally performed when the color temperature of the light source changes.

On the other hand, reference change amounts (Smr) and (Smb) are stored in the R change amount memory (52) and the B change amount memory (53). Here, (Smr) (Smb) is a constant value as shown by the chain line in FIG. 20, and is set to a value such that the color correction of the screen changes extremely gently.

As described above, the two types of changes in R and B (Sc
r) (Smr) and (Scb) (Smb) are input to the fixed contacts (58b) (58a) (58d) (58c) of the switch (58) respectively, and one of them is selected to change the R and B amount. (Sr)
It is output to the correction value increasing / decreasing circuit (35) as (Sb).

Next, the operation of the switch (58) will be described. Based on the same judgment as in the prior art, the stability judging circuit (32) outputs a control signal (P4) for instructing the operation and the stop mode of the white balance correction. This is a speed judgment circuit (36)
The edge detector (54) is input to the inside edge detector (54) and only when the control signal (P4) changes from the H level to the L level, that is, when the white balance correction shifts from the stop mode to the operation mode. Outputs a pulse of L level.

The counter (55), which counts clock pulses of a predetermined cycle generated from the clock generator (55a), resets the current count value when it receives a pulse from the edge detector (54), and newly counts from zero. To start.
The count value (CN) is input to the count comparison circuit (57) and compared with a constant value (Tc) stored in the counter threshold value memory (56) in advance. When (CN) is less than (Tc),
An L level control signal (Psm) is output.

The switch (58) is at the contact on the (58a) (58d) side when the L level control signal (Psm) is input,
The passage of the reference change amounts (Smr) and (Smb) stored in the R change amount memory (52) and the B change amount memory (53) is permitted. When (CN) becomes (Tc) or more, an H-level control signal (Psm) is output, the switch (58) switches to the contacts on the (58b) and (58e) sides, and the R change amount calculator (50 ), And the change amounts (Scr) and (Scb) calculated by the B change amount calculator (51) are allowed to pass. When (CN) becomes (Tc) or more, the count comparison circuit (57) outputs a count stop signal (ST), and the counter (55) receives this and stops counting up.

Therefore, after the white balance correction shifts from the stop mode to the operation mode, the change amounts (Sr) (Sb) of R and B output from the speed determination circuit (36) are as shown in FIG.
Here, (t1) is the time required for the counter (CN) to reach (Tc), and it is considered that 1 to 2 seconds is actually suitable.

R change amount (Sr) output from the speed judgment circuit (36)
Is the R in the correction value increasing / decreasing circuit (135) as shown in FIG.
Increment and decrease circuits (146) (147), B change amount (S
b) is input to the B increase and decrease circuits (148) and (149). In each increment / decrement circuit, the amount of change (Sr) to the correction value (Gmr) (Gmb) stored in the R and B correction value memories
Gain correction value (Gr) that actually controls the gain of the R and B amplifier circuits (4) and (5) by adding or subtracting (Sb)
Output as (Gb). That is, Gr = Gmr−Sr, Gb = Gmb−
It becomes Sb.

Therefore, after the white balance correction is changed from the stop mode to the operation mode, the difference (dr) (db), that is, the current gain correction value (Gmr) (Gmb) and the screen are evaluated by the gain control circuit (28). The correction value (Gp
r) (Gpb) and | Gmr-Gpr | and | Gmb-Gpb | change as shown in FIG.

As a result, even if the color of the subject changes momentarily due to panning of the video camera and the white balance correction enters the operation mode, by changing the changing speed of the gain correction amount, the initial fixed time is the unit time of the amplification gain. Since the amount of increase or decrease per hit is set as small as possible, the change can be made inconspicuous. In addition, when the color temperature of the light source actually changes, the amplification gain is changed at a speed according to the amount of deviation of the white balance after a certain period of time, so that smooth white balance correction can be performed.

(G) Effect of the Invention As described above, according to the present invention, there is a possibility that the color of the subject changes momentarily due to panning or the like, and the white balance correction repeats the operation mode and the stop mode, resulting in unstable correction. In some situations, the change amount of the amplification gain of the color signal per unit time is set as small as possible for a certain period of time immediately after the transition to the operation mode to make the white balance change inconspicuous, and the operation mode is required even after this certain period of time. In such a situation, that is, when the color temperature of the light source actually changes, high-speed correction is executed, and stable and quick white balance adjustment becomes possible.

[Brief description of drawings]

FIG. 1 is an overall circuit block diagram of an embodiment of the present invention.
17, 18, and 19 are circuit block diagrams of the same main parts, FIG. 20 is a relationship diagram of the change amount of the screen color evaluation value and the correction value, and FIG. 21 is a change with time of the change amount of the correction value. FIG. 22 is a diagram showing a temporal change of the change amount of the screen color evaluation value. In addition, FIG. 16, FIG. 2, FIG. 3, FIG. 4, FIG.
FIG. 12, FIG. 12 and FIG. 14 are circuit block diagrams of a conventional example, FIG.
FIG. 8, FIG. 9, FIG. 10, FIG. 10 and FIG. 11 are explanatory views at the time of mode transition, FIG. 15 is a block diagram of main parts of another conventional example, and FIG. 13 is an explanatory view of area division. . (27) …… Screen evaluation circuit, (28) …… Gain control circuit,
(29) …… Compensation value comparison circuit, (30) …… First evaluation value comparison circuit, (31) …… Second evaluation value comparison circuit, (32) …… Stability determination circuit, (135) …… Compensation value Increase / decrease circuit, (4) ... R
Amplification circuit, (5) ... B amplification circuit, (36) ... Speed determination circuit

Claims (2)

(57) [Claims] 1. A color video camera that corrects an amplification gain of a color signal in a picked-up video signal to perform a white balance adjusting operation, and means for calculating a target value of a gain correction amount of each color signal based on a color difference signal. A means for changing the gain correction amount of the current color signal so as to approach the target value, and a means for changing the changing speed of the current gain correction amount according to the difference between the current gain correction amount and the target value, A means for stopping the change of the gain of the color signal when the current gain correction amount is within a certain range from the target value, and a change in the gain correction amount until a certain time elapses after the stop state is finished. A color video camera characterized by slowing down the speed and increasing the changing speed after a lapse of a certain time. 2. A color video camera which corrects an amplification gain of a color signal in a picked-up image signal to execute a white balance adjusting operation, and means for calculating a target value of a gain correction amount of each color signal based on a color difference signal. A means for changing the gain correction amount of the current color signal so as to approach the target value, and a means for changing the changing speed of the current gain correction amount according to the difference between the current gain correction amount and the target value, A means for stopping the change of the gain of the color signal when the current gain correction amount is within a certain range from the target value, and a changing speed of the gain correction amount until a certain time elapses after the stop state is finished. And a change rate of the current gain correction amount is changed according to the difference between the current gain correction amount and the target value after a certain time has elapsed.