JP2542066B2 - Common processing type encoding / decoding device - Google Patents

Description

The present invention relates to a coding / decoding device suitable for use in audio coding / decoding, for example, in a multimedia multiplexing device, and more particularly to a common processing type code that simultaneously uses a plurality of channels. Regarding the encoding / decoding device, the first data format conversion for the encoding unit is intended to handle data having two types of data formats mixedly on the same frame without increasing the hardware scale. The encoder output side is provided with an encoder selector for performing time division multiplexing on the output from the encoder and the output from the encoder second data format converter, and from the decoder first data format inverse converter. Output and the output from the decoding unit second data format inverse conversion unit, the decoding unit selector for time-division multiplexing is restored. Configured to provide a coded entry side.

[Industrial applications]

The present invention relates to a coding / decoding device suitable for use in audio coding / decoding in, for example, a multimedia multiplexing device, and more particularly to a common processing type coding / decoding device that simultaneously uses a plurality of channels.

[Conventional technology]

FIG. 3 is a block diagram showing a conventional common processing type voice encoding / decoding device. In FIG. 3, reference numeral 1 is a voice encoding / decoding unit (CODEC unit) for the voice encoding / decoding.
The decoding unit 1 includes a coding unit (CODER) 2 and a decoding unit (DECORDE).
R) 3 and.

Here, the encoding unit 2 is, for example, a PCM with a transmission rate of 64 kb / s.
The audio signal is encoded, and the decoding unit 3 also decodes it into a PCM audio signal having a transmission rate of 64 kb / s.

Further, 4 is a data format conversion unit for the encoding unit,
The data format conversion unit 4 for the encoding unit converts the output of the encoding unit into a required data format and outputs it as an encoded output.

Reference numeral 5 denotes a decoding unit data format conversion unit, and this decoding unit data format conversion unit 5 inversely converts the decoding input in the above data format.

With such a configuration, the 64 kb / s PCM audio signal is encoded by the encoding unit 2, and then converted by the encoding unit data format conversion unit 4 in a required data format and output.

On the other hand, the decoding input is inversely converted by the decoding unit data format conversion unit 5 in the above data format, and further decoded by the decoding unit 3 into a 64 kb / s PCM audio signal.

A 64 kb / s PCM audio signal [See symbol a in Fig. 3]
Fig. 4 (a) shows the frame structure of
The frame structure of the encoder output and the decoder input [see the code b in FIG. 3] is as shown in FIG. 4B, and the code output and the decode input [code c in FIG. 3 are shown. The frame structure of [reference] is shown in FIG. 4 (c).

[Problems to be Solved by the Invention]

However, in such a conventional common processing type speech encoding / decoding apparatus, since the data format of the encoding output / decoding input is determined to one type, for example, the common processing used in the multimedia multiplexing apparatus. Type audio encoding / decoding device, there are two types of data formats for encoding output / decoding input [for example, 32kADPCM encoding / decoding device has 8k data as shown in FIG. 5 (a)]. When the format and the 3.2k data format as shown in FIG. 5 (b) are required, such requirement cannot be satisfied.

In the frame structure of the 8k data format shown in FIG. 5 (a), each time slot is composed of 8 bits. Further, in this example, the information Di is included in the first to fourth time slots.

Next, in the frame structure of the 3.2k data format shown in FIG. 5 (b), each time slot is composed of 8 bits. Further, the head bit of each time slot is configured as a frame synchronization bit F. Further, these synchronization bits F form a multi-frame synchronization detection system that has a plurality of meanings, and in this case, it has a meaning for 20 frames.

By the way, in order to meet the demands for the two types of data formats as described above, it is necessary to provide a conversion unit / inverse conversion unit or an encoding / decoding unit for each data format. There is a problem that the scale becomes too large.

The present invention was devised under such circumstances, and a common processing type code capable of handling data having two types of data formats mixedly on the same frame without increasing the hardware scale. An object of the present invention is to provide an encoding / decoding device.

[Means for solving the problem]

Therefore, the common processing type encoding / decoding device of the present invention includes an encoding unit that encodes data and the first data for the encoding unit that converts the output from the encoding unit in the first data format. A format conversion unit, a second data format conversion unit for the encoding unit that converts the output from the encoding unit into a second data format different from the first data format, and an encoding unit first data format conversion unit And a decoder for a coding unit that time-division-multiplexes the output from and the output from the second data format conversion unit for the coding unit, and a decoding unit that reverse-converts the decoded input data in the first data format. For first
Output and decoding from the data format reverse conversion unit, the second data format reverse conversion unit for the decoding unit that reversely converts the decoded input data in the second data format, and the first data format reverse conversion unit for the decoding unit A selector for a decoding unit that time-division-multiplexes the output from the second data format inverse conversion unit for the encoding unit, and a decoding unit that decodes the output from the selector for the decoding unit, and a selector for the encoding unit , And the data converted into the second data format are mixed in the same frame, and the decoding unit selector is used to convert the data into the first data format. Characterized by mixing the reverse-converted data and the data reverse-converted into the second data format on the same frame. That.

[Work]

With this configuration, when the data is encoded and output, the data is encoded by the encoding unit, and the output from the encoding unit is the first data format conversion unit for the encoding unit. In addition to being converted by the format, the second data format conversion unit for the encoding unit performs conversion by the second data format different from the first data format. Then, after that, by the time division multiplexing of the output from the first data format conversion unit for the encoding unit and the output from the second data format conversion unit for the encoding unit by the selector for the encoding unit, The data converted to the second data format and the data converted to the second data format are mixed on the same frame.

On the other hand, when decoding the decrypted input data, the decrypted input data is inversely converted into the first data format by the first data format inverse conversion unit for the decoding unit, and the second data for the decoding unit is also converted. The format reverse conversion unit performs reverse conversion using the second data format. Then, after that, the decoder selector selects the output from the decoder first data format inverse converter and the decoder second data format.
The output from the data format inverse conversion unit is time-division multiplexed, and the data inversely converted to the first data format and the data inversely converted to the second data format are mixed in the same frame and further decoded. The output from the decoder for the decoder is decoded by the converter.

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, and in the embodiment shown in FIG. 1 as well, an encoding / decoding unit 1 having an encoding unit 2 and a decoding unit 3 is provided. The encoding / decoding unit 1 is, for example, configured as a 32kADPCM encoding / decoding unit.

By the way, on the output side of the encoding unit 2, the first encoding unit
A data format conversion unit 4A and a second data format conversion unit 4B for the encoding unit are provided, and a first data format inverse conversion unit 5A for the decoding unit and a decoding unit are provided on the input side of the decoding unit 3. And a second data format reverse conversion unit 5B for use.

Here, the first data format conversion unit 4A for the encoding unit
Is for converting the output from the encoding unit 2 in the first data format [for example, the 8k data format shown in FIG. 5 (a)], and the second data format conversion unit 4B for the encoding unit is The output from the unit 2 is converted by a second data format different from the first data format [for example, 3.2k data format shown in FIG. 5 (b)].

Also, the first data format inverse conversion unit 5A for the decoding unit
Is for inversely converting the decoded input data in the first data format, and the second data format inverse conversion unit 5B for the decoding unit is for inversely converting the decoded input data in the second data format. .

Further, the first data format conversion unit 4A for the encoding unit
Is provided and a coding unit selector 6 that time-division-multiplexes the output from the coding unit second data format conversion unit 4B is provided. The data converted into the data format and the data converted into the second data format can be present on the same frame.

Furthermore, there is provided a decoder selector 7 for time division multiplexing the output from the first data format inverse converter 5A for the decoder and the output from the second data format inverse converter 5B for the decoder. By using the selector 7 for the decoding unit, the data inversely converted to the first data format and the data inversely converted to the second data format can be mixed in the same frame. ing.

With the above configuration, for example, 64 kb / s PCM data having a frame configuration as shown in FIG. 2 (a) (see a in FIG. 1)
When the data is encoded and output, the data is first encoded by the encoding unit 2 and output. Here, the frame structure of the output of the encoding unit (see b in FIG. 1) in this case is as shown in FIG. 2 (b).

Then, the output from the encoding unit 2 is converted into the first data format by the first data format conversion unit 4A for the encoding unit, and the first data format conversion unit 4B for the encoding unit outputs the first data format conversion unit 4B. The data is converted in a second data format different from the data format. Here, the frame structure of each converted output (see d and e in FIG. 1) in this case is as shown in FIGS. 2 (c) and 2 (d).

The signals of the 8k data format and 3.2k data format shown in FIGS. 5 (a) and 5 (b) are the same as the first data format and the second data shown in FIGS. 2 (c) and 2 (d). It is transmitted in the following manner on each channel of the format.

That is, the encoded data in each channel of the first data format (8k format) in the 32kADPCM encoding / decoding device of FIG. 2 (c) is the time slot of 8 bit structure shown in FIG. 5 (a). 4 bit information is included in the data, and is encoded and output as shown in FIG. 4 (c) in the same manner as described in the conventional example.

In addition, the second data format (3.
The encoded data in each channel (2k format) is transmitted by placing the encoded data in the first data format in a multiframe of 20 frames as shown in FIG. 5 (b). Cage (125
.mu.s.times.20 = 2.5 ms, 4 bits.times.20 = 80 bits), and is encoded and output as shown in FIG.

By the way, assuming that the number of channels in each of the first data format and the second data format is 2 channels, that is, 4 channels in total, the channels CH1, CH2 are
In this data format, channels CH3 and CH4 become the second data format. This is because the time slot allocation is restricted such that the channel of the first data format is before the frame and the channel of the second data format is after the frame.

Then, after that, the encoder 6 selector 6 performs time division multiplexing on the output from the encoder first data format converter 4A and the output from the encoder second data format converter 4B. As a result, the data converted into the first data format and the data converted into the second data format are mixed on the same frame as shown in FIG. 2 (e), and the encoded output [FIG. F]] is obtained.

Here, the selector signal for switching the selector 6 is issued at the timing shown in FIG. 2 (f).

As the encoded output, the hatched portion of FIG. 2 (e) (channel CH of the first data format)
(3, CH4 part) remains, but this is processed by a part other than the speech coder, for example, another part of the multimedia multiplexer.

On the other hand, when decoding the encoded input data, if the decoded input has the same time slot allocation as the encoded output shown in FIG. Decoding is performed in the reverse order of the data encoding of.

That is, the decrypted input data is inversely transformed in the first data format by the first data format inverse conversion unit 5A for the decoding unit and the second data is inversely transformed by the second data format inverse conversion unit 5B for the decoding unit. The data is inversely converted in the format, and then the decoder 7 for the decoding unit outputs the output from the first data format inverse conversion unit 5A for the decoding unit and the output from the second data format inverse conversion unit 5B for the decoding unit. By dividing and multiplexing, the data inversely converted to the first data format and the data inversely converted to the second data format are mixed in the same frame,
Further, the decoding unit 3 decodes the output from the decoding unit selector 7.

By thus providing the selector 6 on the encoding output side and the selector 7 on the decoding input side, common processing type encoding / decoding having two types of encoded input / output data formats can be performed with a simple hardware configuration. A decoding device can be realized.

〔The invention's effect〕

As described above in detail, according to the common processing type encoding / decoding device of the present invention, the selector is provided on the encoding output side and the decoding input side without increasing the hardware scale. , There is an advantage that data having two kinds of data formats can be mixed and handled on the same frame.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 (a) to 2 (f) are explanatory views of the operation of an embodiment of the present invention, FIG. 3 is a block diagram showing a conventional example, and FIG. FIGS. 5A to 5C are diagrams for explaining the operation of the conventional example, FIG. 5A is a diagram for explaining the 8k data format, FIG. 5B is a diagram for explaining the 3.2k data format, and FIG. FIG. 3 is a diagram illustrating the details of a 3.2k data format. In the figure, 1 is an encoding / decoding unit, 2 is an encoding unit, 3 is a decoding unit, 4A is a first data format conversion unit for an encoding unit, 4B is a second data format conversion unit for an encoding unit, Reference numeral 5A is a first data format reverse conversion unit for the decoding unit, 5B is a second data format reverse conversion unit for the decoding unit, 6 is a selector for the encoding unit, and 7 is a selector for the decoding unit.

Claims (1)

(57) [Claims] 1. An encoding unit (2) for encoding data, and a first data format conversion unit (4A) for an encoding unit which converts an output from the encoding unit (2) in a first data format. A second data format conversion unit (4B) for an encoding unit for converting an output from the encoding unit (2) in a second data format different from the first data format, and a first data unit for the encoding unit The output from the data format conversion unit (4A) and the second data format conversion unit for the encoding unit (4A
The output from B) includes a selector (6) for an encoding unit that performs time division multiplexing, and a first data format inverse conversion unit for a decoding unit that inversely converts the decoded input data in the first data format. (Five
A), a decoding unit second data format inverse conversion unit (5B) for inversely converting the decoded input data in the second data format, and a decoding unit first data format inverse conversion unit (5A). ) And the output from the second data format inverse conversion unit (5B) for the decoding unit, the decoding unit selector (7) for performing time division multiplexing, and the decoding unit selector (7) A decoder (3) for decoding the output, and using the selector (6) for the encoder, the data converted into the first data format and the data converted into the second data format. The data is mixed in the same frame, and the data inversely converted to the first data format and the data inversely converted to the second data format by using the selector for selector (7). And wherein the mix in the same frame, the common processing type coding / decoding apparatus.