JP2542465B2 - Sequence control method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sequence control method in a sequence control device equipped with a special function unit for performing special processing such as D / A conversion.

[0002]

2. Description of the Related Art A programmable controller as a sequence control device is one in which the function of a simple relay board is processed by using a CPU and a memory, but a desired function is realized or an existing function is changed. In addition to the ease and flexibility of achieving the purpose by simply creating or changing a program, the applicable areas of the programmable controller have expanded dramatically due to the advanced functionality of the programmable controller itself. In addition to control, programmable controllers are now performing analog processing, positioning processing, communication processing, monitor display, and the like. The sequence control is mainly performed by the CPU unit, which is one of the constituent units of the programmable controller, and various processes other than the sequence control are mainly performed by the special function unit. That is, the CPU unit controls the whole by writing instruction data and reading result data to the special function unit, and the special function unit becomes indispensable as the control system becomes large-scale and complicated. There is.

Next, reading of data from the special function unit and writing of data to the special function unit will be described. FIG. 7 is a system configuration diagram of the programmable controller. In the figure, 1 is a CPU unit that controls the entire programmable controller, and this CPU unit 1 is a program memory 11 in which a sequence program is stored, input information from a limit switch or the like provided for a control target, and the above-mentioned control target. The device memory 12 stores output information for controlling the generated coil and the like and internal information. 2 is a program device for creating a sequence program stored in the program memory 11, 3 is a communication cable for connecting the CPU unit 1 and the program device 2, and 4 is an input / output unit. 4A is a special function unit, and this special function unit 4A is also a CP from within the special function unit 4A.
The U unit 1 is provided with a bidirectional access storage means capable of reading and writing data, for example, a 2-port memory 41.

FIGS. 21a to 21c are diagrams showing an example of the stored contents of the 2-port memory 41. The 2-port memory 41A of the 2CH • D / A unit, the 2-port memory 41B of the 8CH • D / A unit, and the display unit, respectively. 2 shows an example of the stored contents of the 2-port memory 41C.

FIG. 22 is a diagram showing an instruction format for the CPU unit 1 to read data from the special function unit and an instruction format for the CPU unit 1 to write data to the special function unit. In the figure, 5 is an instruction for the CPU unit 1 to read data from the special function unit 4A. This instruction 5 is an input / output number 51 corresponding to the mounting position of the special function unit 4A, and data in the 2-port memory 41 of the special function unit. Is composed of a head address 52 for reading out, a head device 53 of the device memory 12 for storing the read data, and a score 54 of data to be transferred. The first device 53 of the device memory 12 is the device memory 1
Specify the address of 2. Reference numeral 6 is an instruction for the CPU unit 1 to write data to the special function unit 4A. This instruction 6 writes data to the input / output number 61 corresponding to the mounting position of the special function unit 4A and the 2-port memory 41 of the special function unit 4A. 2 port memory 41
Head address 62, a head device 63 of the device memory 12 in which data to be written in the 2-port memory 41 is stored, and a point 64 of data to be transferred. In addition, "FROM" described in the instruction 5 is C
This means that the PU unit fetches data from the outside (in this case, the special function unit), and "TO" described in instruction 6 means that the CPU unit outputs the data to the outside (in this case, the special function unit). Means That is, "FROM" and "TO" indicate input / output instruction classification.

FIG. 23 is a diagram showing a specific example of an instruction for the CPU unit 1 to write data to the special function unit 4A. In the figure, 6A is input / output number 50.
Is a command for writing one point of the contents of the device D0 to the address 2 of the 2-port memory 41 of the special function unit 4A mounted at the position of 6A, and 6B is the special function unit 4A mounted at the position of the input / output number 50. This is an instruction to write the contents of the device D0 for one point at the address 8 of the 2-port memory 42.

Next, a specific operation, for example, 2CH.D / as the special function unit 4A at the position of the input / output number 50
Consider a program in which an A unit (special function unit having two digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. In this case, as can be seen from the example of the stored contents of the 2-port memory shown in FIG. 21a, the contents of the device D0 may be written in address 2 of the 2-port memory 41A. That is, the program 6A in FIG. 23 is obtained. The user may create the program 6A in FIG. 23 by the programming device 2 and write the program 6A in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, when the CPU unit 1 actually executes the program 6A written in the program memory 11, the 2CH.D / A unit mounted at the position of the input / output number 50 designated by the program. The contents of the device D0 of the device memory 12 are written in the address 2 of the 2-port memory 41A of the above, and the 2CH D / A unit outputs the analog value according to the contents of the address 2 of the 2-port memory 41A.

Next, for example, at the position of input / output number 50, 8
Consider a program in which a CH / D / A unit (special function unit having eight digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. In this case, 2 in FIG.
As is clear from the example of the stored contents of the port memory, it suffices to write the contents of the device D0 to the address 8 of the 2-port memory 41B, that is, the program 6B in FIG.
Becomes The user's program 2 is used to create the program 6B shown in FIG. 23, and the user writes the program 6B in the program memory 11 of the CPU unit 1 via the communication cable 3. Next, actually the CPU unit 1
However, when executing the program 6B written in the program memory 11, the device is set to the address 8 of the 2-port memory 41B in the 8CH D / A unit mounted at the position of the input / output number 50 designated by the program. Write the contents of memory device D0. 8CH / D / A
The unit outputs an analog value according to the contents of address 8 of the 2-port memory 41B.

Further, for example, when a display unit having a display function, for example, a special function unit 4A is mounted at the position of the input / output number 50 and it is desired to display a character corresponding to the contents of the device D0 in the first row and third column. Think about the program. In this case, as can be seen from the example of the stored contents of the 2-port memory in FIG.
It suffices if the contents of the device D0 are written in, as shown in the program 6A in FIG. The user creates the program 6A in FIG. 23 by the programming device 2, writes the program 6A in the program memory 11 of the CPU unit 1 via the communication cable 3, and the CPU unit 1 is actually written in the program memory 11. When executing program 6A
The contents of the device D0 of the device memory are written to the address 2 of the 2-port memory 41C of the display unit mounted at the position of the input / output number 50 designated by. As a result, the display unit displays the character corresponding to the contents of address 2 of the 2-port memory 41C.

As described above, conventionally, there are only a few kinds of commands for the special function unit such as FROM and TO, and all the special function units are processed by these commands. It becomes an analog output command of, and sometimes it becomes a display command,
There is a problem that the function of the instruction is difficult to understand just by looking at the program. When analog output is performed on the 1st CH of the D / A unit, the program 6A or the program 6B may be generated due to the difference in the number of channels of the D / A unit.
(If it is a 16CH D / A unit, it will be another program).

[0012]

As described above, the conventional sequence control method has a small number of types of instructions for the special function unit, and all the processing for the special function unit is performed with these few instructions. If another command is issued and the command format for the same motion is different, the command command does not show the command command at all, and the program must be created in consideration of the address of the 2-port memory. However, there is a problem that it is not easy to create a program. Further, when a special function unit is newly developed or a function is changed, there is a problem that a complicated work such as changing a system program is involved.

The present invention has been made in order to solve the above problems, and a program can be created without being aware of the address of the 2-port memory of the special function unit, and its instruction format It is an object of the present invention to obtain a sequence control method in which the operation to be performed is easy to understand, the readability of the program is good, and the newly developed special function unit can be used and the function can be changed easily.

[0014]

A sequence control method according to the present invention includes a first code indicating a command of a special function unit such as a D / A conversion unit, a function of the special function unit and a special function. If the unit has multiple channels and it is necessary to specify the channel to be used, a second code further having channel number information,
The CPU unit executes the sequence program having the special function command in which the mounting position of the special function unit and the action information such as the device memory address and the print position information are described, and the input information from the control target and the control target are set. A sequence control method for controlling a control target based on output information for controlling an output device such as an installed coil and stored contents of a device memory for storing internal information, which is accessed from a CPU unit provided in a special function unit. A possible first storage means, a second code, the address of the bidirectional access storage means of the special function unit, and
Specific information such as the number of transfer points is stored in advance for a predetermined number of special function instructions that can be processed by the special function unit, a step in which the CPU unit executes a sequence program to call the special function instruction, and a called special function instruction Whether or not the unique information corresponding to is stored in the first storage means based on the stored contents of the first storage means
If the unit judges and if a match is stored, the input / output command category corresponding to the special function command, the mounting position of the special function unit, and the device based on the unique information and the information described in the special function command. The CPU unit executes a sequence program instruction having an address of the memory, an address of the bidirectional access storage means, and the number of transfer points, and performs a predetermined process based on the sequence program instruction via the special function unit. It is a thing.

Also, a first code indicating that it is an instruction of a special function unit such as a D / A conversion unit and the function of the special function unit, and the special function unit has a plurality of channels, and specifies a channel to be used. If necessary, a sequence program having a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information are described. Is executed by the CPU unit, and the controlled object is controlled based on the input information from the controlled object, the output information for controlling the output device such as the coil provided in the controlled object, and the stored contents of the device memory for storing the internal information. A first sequence control method provided in a special function unit and accessible from a CPU unit The 憶 means, second code, address of the bidirectional access memory means of the special function units, and,
A step in which unique information such as the number of transfer points is stored in advance for a predetermined number of special function commands that can be processed by the special function unit, a step in which the storage content of the first storage means is transferred to the second storage means of the CPU unit, a sequence When the CPU unit executes the program and the special function instruction is called, whether the unique information corresponding to the called special function instruction is stored in the second storage unit or not is determined based on the stored contents of the second storage unit. If a match is stored, the input / output command category corresponding to the special function command, the mounting position of the special function unit, and the device memory are determined based on the unique information and the information described in the special function command. The CPU unit issues a sequence program instruction having an address, an address of the bidirectional access storage means, and a transfer point. Line and through the special function module performing a predetermined processing based on the sequence program instructions, in which to have a.

A first code indicating an instruction of a special function unit such as a D / A conversion unit and a function of the special function unit are shown, and the special function unit has a plurality of channels and specifies a channel to be used. If necessary, a sequence program having a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information are described. Is executed by the CPU unit, and the controlled object is controlled based on the input information from the controlled object, the output information for controlling the output device such as the coil provided in the controlled object, and the stored contents of the device memory for storing the internal information. A first sequence control method provided in a special function unit and accessible from a CPU unit The storage means includes the second code, the input / output instruction classification corresponding to the special function instruction, the mounting position of the special function unit, the address of the device memory, the address of the bidirectional access storage means provided in the special function unit, and the number of transfer points. And a sequence program instruction having a predetermined number of special function instructions that can be processed by the special function unit, the sequence program being C
When the PU unit executes and the special function instruction is called, whether the second code corresponding to the called special function instruction and the predetermined number of sequence program instructions corresponding to the special function instruction are stored in the first storage means. No 1
The CPU unit judges on the basis of the stored contents of the storage means, and if the coincident ones are stored, the CPU unit executes the predetermined number of sequence program instructions, and based on the predetermined number of sequence program instructions via the special function unit. And a step of performing a predetermined process.

Further, a first code indicating a command of a special function unit such as a D / A conversion unit and a function of the special function unit are shown, and the special function unit has a plurality of channels and specifies a channel to be used. If necessary, a sequence program having a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information are described. Is executed by the CPU unit, and the controlled object is controlled based on the input information from the controlled object, the output information for controlling the output device such as the coil provided in the controlled object, and the stored contents of the device memory for storing the internal information. A first sequence control method provided in a special function unit and accessible from a CPU unit The storage means includes the second code, the input / output instruction classification corresponding to the special function instruction, the mounting position of the special function unit, the address of the device memory, the address of the bidirectional access storage means provided in the special function unit, and the number of transfer points. And a predetermined number of sequence program instructions having the following are stored in advance for a predetermined number of special function instructions that can be processed by the special function unit, the stored contents of the first storage means are transferred to the second storage means of the CPU unit. Second stage, a stage in which the CPU unit executes the sequence program and the special function command is called, a second code corresponding to the called special function command, and a predetermined number of sequence program commands corresponding to the special function command. Is stored in the CPU, the CPU unit determines based on the contents stored in the second storage means, and the CPU unit determines whether or not they match. The predetermined number of sequence program instructions CPU if stored ones
Where the unit executes and is based on this predetermined number of sequence program instructions via the special function unit.

The sequence program command is composed of a microcomputer program command.

Also, the first memory is a predetermined area of the bidirectional access storage means.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. An embodiment of the present invention will be described below with reference to the drawings. The configuration of the programmable controller as the sequence control device is almost the same as that of the conventional example shown in FIG.

FIG. 1 is a diagram showing the format of the special function unit corresponding instruction 7, and shows that an arbitrary instruction name can be described after Z_. In the figure, 71 is an input / output number corresponding to the mounting position of the special function unit, and 72 is a portion described as necessary.

The instruction symbol Z _... in the special function unit corresponding instruction 7 indicates the special function corresponding instruction and its type, and is the first code Z_ indicating the special function corresponding instruction. Is the second code indicating the special function type ... (For example, if the command is to output an analog value on the 1st CH, the above-mentioned ...
ALOG_1 symbol is described).

FIG. 2 is a diagram showing an example of a special function unit corresponding instruction. In the figure, 7A is an instruction to output an analog signal based on the contents of the device D0 from the 1st CH of the D / A unit attached to the input / output number 50 position, and 7B is attached to the input / output number 50 position. Is a command to display the contents of the device D0 on the 1st row and 3rd column of the display unit.

3A to 3E are views showing an example of the stored contents of the 2-port memory 41 which can be accessed from both the CPU unit 1 / special function unit 4A. In the figure,
41AA indicates a general example of the stored contents of the 2-port memory 41 of the special function unit, and 41BA indicates the 2CH • D / A unit when analog output is performed on the 1CH of the 2CH • D / A unit or 8CH • D / A unit. 2 port memory 41 or 2 of 8CH D / A unit
An example of the stored contents of the port memory 41 is shown. 41CA is erroneously stored in the 2 port memory 41 of the display unit as 2CH.D.
Shows an example of the stored contents of the 2-port memory 41 of the display unit when a command for the / A unit or the 8CH / D / A unit is output. 41DA is the 2-port of the display unit when the display position of the display unit is changed. An example of the stored contents of the memory 41 is shown, and 41EA shows an example of the stored contents of the 2-port memory 41 of the display unit when the contents of D0 are displayed.

FIG. 4 is an operation flow chart of the programmable controller and the program device shown in FIG. 7. Flow A is the program device 2 and flow B is the CP.
The flow C of the U unit 1 shows the operation flow of the special function device 4A.

Next, the operation will be described with reference to the flowchart shown in FIG. When a program is created by the programming device 2, if Z_ is entered at the beginning of the input of the instruction name of the instruction step, then the special function unit 4 can predefine and accept the input of any decipherable instruction name. I will keep it. In the flow A, in step 101, the program device 2 creates a program of the format shown in FIG. 1, and in step 102, the program is transferred to the program memory 11 of the CPU unit 1 via the communication cable 3. Next, in the flow B, the CPU unit 1 stores the sequence program transferred in step 111 in the program memory 11, accesses and decodes the first program step in step 112, and in step 113 the instruction name of the instruction. If the first two characters of Z are Z_, it is determined that the command is a special function unit corresponding command. If it is not an instruction corresponding to a special function unit, a normal sequence process is performed at step 118.

Next, the CPU unit 1 executes step 11
If data is stored in the device memory 12 at the instruction determined to be the special function unit corresponding instruction at 4 and 115 and the address designated by the instruction, the content is stored in the position of the input / output number designated by the instruction. The data is stored in the two-port memory 41 in the mounted special function unit 4A, and in step 116, the special function unit 4A is interrupted as an execution command. This interrupt is sent to the special function unit 4A in step 121 of flow C.
When the special function unit 4A recognizes
Then, the instruction corresponding to the special function unit stored in the 2-port memory 41 is read, and it is checked whether or not the content of this instruction is the instruction defined by the special function unit 4A. If not, an error occurs, and error processing is performed in step 127. Done,
If there is no error, the instruction is decoded in step 124,
The process defined in step 125 is executed. At this time, if necessary, the device data contents stored in the 2-port memory 41 are used for execution.

Next, at step 126, the special function unit 4A stores information such as whether the special function unit 4A has executed normally / has an error, and if there is data to be returned to the CPU unit 1, the data is stored in the 2-port memory 41, and the CPU unit is stored. 1 makes the execution result accessible. At step 117 in the flow B, the CPU unit 1 performs a process determined based on the execution result, returns to the next step process, that is, step 112, and executes the next instruction.

The predetermined processing includes, for example, no processing when executed normally, error display when there is an error, and C
When there is data to be returned to the PU unit 1, the data is transferred to the device memory 12 or the like.

When the special function unit mounted at the mounting position of the input / output number described in the special function unit corresponding command is the 2CH • D / A unit (special function unit having two digital / analog conversion functions) Is Z_A
NALOG_1 is a command to output an analog value on 1CH, and Z_ANALOG_2 is a command to output an analog value on 2CH. Similarly, in the case of the 8CH D / A unit (special function unit having eight digital / analog conversion functions), Z_ANALOG_1 is an instruction to output an analog value on the 1st CH, and Z_ANALOG
_2 is an instruction to output an analog value on the 2nd CH. In the case of a display unit, LOCATE is an instruction to specify a display position and PRINT is an instruction to display.

Next, at the position of input / output number 50, 2CHD /
Consider a program in which an A unit (special function unit having two digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH.

In this case, the program is the program step 7A shown in FIG. The user creates the program 7A of FIG. 2 by the programming device and writes the program 7A in the program memory 11 of the CPU unit 1 via the communication cable 3. Next, the program 7A in which the CPU unit 1 is actually written in the program memory 11
, The first two characters of the instruction name of the instruction are Z
_ Is confirmed, and it is determined that the command is a special function unit compatible command. Next, the CPU unit 1 stores the program and the contents of D0 of the device memory 12 designated by the instruction in the 2CH.D / A unit mounted at the position of the input / output number 50 designated by the instruction. It stores it in the 2-port memory 41 and interrupts the 2CHD / A unit. When the 2CH • D / A unit recognizes this interrupt, the 2CH • D / A unit detects that the special function unit corresponding instruction stored in the 2-port memory 41 is 2
Check if it is an instruction defined in the CH / D / A unit,
If it is determined that the instruction is to output the content of the device memory as an analog value on the 1st CH, the analog value according to the content of D0 of the device memory 12 stored in the 2-port memory 41 is output to the 1CH.

Next, for example, 8 at the position of input / output number 50
Consider a program in which a CH / D / A unit (special function unit having eight digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. Also in this case, the program becomes the instruction 7A in FIG. 2 as in the case described above, and the operation of executing the instruction is also the same.

As described above, the special function unit corresponding command having the similar function has the same command name as Z_ANALOG_1, and it can be easily understood that the command name is output and the analog value is output to the first channel.

Example 2. Next, another embodiment of the present invention will be described with reference to the drawings. The configuration of the programmable controller is almost the same as that of FIG. 7 described in the conventional example and the first embodiment, and the description thereof will be omitted.

FIG. 5 is a diagram showing an example of stored contents (contents of special function unit corresponding command information) of the 2-port memory 41 which can be accessed from both the CPU unit / special function unit. In the figure, 41AB has shown the general example of a special function unit. Memory is in bytes,
2-port memory 41 in all special function units
The memory content of is in this format. Address 0
In this field, the total number of special function unit corresponding instructions 4120 defined in this unit is stored, and thereafter information of each special function unit corresponding instruction is stored. The instruction name 41 of the special function unit corresponding instruction defined first in the address 1
21a is stored as a character code, the address 11 stores the number of device memories 4121b defined by this instruction, and the address 12 stores the usable type 4121c of the device memory 12 after being converted into a code. The address 13 stores a read / write section 4121d, the address 14 stores the head address 4121e of the 2-port memory 41 to be accessed, and the address 15 reads / writes from the head address of the 2-port memory.
The number of writings 4121f is stored. The address 16 stores a handshake signal exchanged between the CPU unit and the special function unit at the time of reading / writing and its ON / OFF state 4121g, and the address 4 has a flag 4 indicating whether or not an instruction can be executed.
121h is stored. As described above, the information of one instruction is a set of 4121a to 4121h, and this one set is the instruction information 4121. Below, the instruction information 4122 to 412n corresponding to each of the instructions corresponding to the total number of the special function unit corresponding instructions stored at the address 0 is stored.

In FIG. 5, 41BB is 2CH.D / A.
An example of the storage contents of the 2-port memory 41 in the unit is shown, where 41CB is 2 in the 8CH D / A unit.
An example of the stored contents of the port memory 41 is shown, and 41DB shows an example of the stored contents of the 2-port memory 41 in the display unit.

FIG. 6 is a flowchart showing the processing operation of the CPU unit when executing the special function unit corresponding instruction.

Next, the operation will be described. When the program device 2 shown in FIG. 7 executes a program, if Z_ is entered at the beginning of the input of the command name, the input of any command name can be accepted thereafter, and the program device 2 shows the command name shown in FIG. Create a program of the form like
The program is written in the program memory 11 of the unit 1 via the communication cable 3. Next, when the CPU unit 1 executes the sequence program written in the program memory 11, if the first two characters of the instruction name of the instruction are Z_ in step 201 in the flowchart shown in FIG. If it is determined that there is a character other than Z_, a sequence process which is a normal instruction process is executed in step 2-8. The above operation is similar to that of the first invention.

Next, the CPU unit 1 executes step 20.
The special function unit corresponding instruction stored in the 2-port memory 41 in the special function unit 4 attached to the position of the input / output number designated by the instruction is determined to be the special function unit corresponding instruction in 3 The number of instructions 4120 defined in this unit is read from the information, and the number of instructions corresponding to the special function unit is searched for an instruction having a matching character code. In step 203, it is determined whether this instruction is defined in this special function unit. Find out. If no matching instruction is found, it is judged as an error because this instruction name is not defined on the special function unit side, and step 2
Error processing is performed at 07, and if found, it is regarded as defined and the next processing is performed. First, step 20
According to the special function unit corresponding instruction information, for example, the number and type of devices are checked to see if the information necessary for executing the instruction is defined in 4, that is, whether the instruction configuration is correct.

As for the number of devices, the number of devices designated by 72 in FIG. 1 of the sequence program is determined by the type of device (eg, 1-bit relay information, internal word information, 1
Bit network relay information, link register information, etc.) indicates the type of device that can be used for each device specified by the number of devices, such as F5H, F6H, and the like. If the instruction structure is correct, then in step 205, it is checked whether or not this instruction can be executed by the execution enable / disable flag. If it is executable, in step 206 read / write discrimination of the special function unit corresponding instruction information is performed. , Read / write start address, read / write number, handshake signal (ON / OF at command execution
Processing is performed according to information such as the device to be Fed and its ON / OFF state). If it is not executed, an error occurs, and predetermined error processing is performed in step 207.

If this processing ends normally, or if an error occurs in the middle, error processing such as error display is performed, and the processing of this instruction is ended in step 209, and then step 20
It returns to 1 and moves to the execution of the next instruction.

As in the case of the first embodiment, in the case of the second embodiment as well, in the 2CH.D / A unit (special function unit having two digital / analog conversion functions), Z_A
NALOG_1 is an instruction to output an analog value on CH1 and Z_ANALOG_2 is an instruction to output an analog value on CH2. Similarly, in the 8CH D / A unit (a special function unit having eight digital / analog conversion functions), Z_ANALOG_1 outputs an analog value on CH1, and Z_ANALOG_2 outputs an analog value on CH2. ... Z_ANALO
G_8 is an instruction to output an analog value on CH8,
In the display unit, LOCATE is an instruction to specify a display position, and PRINT is an instruction to display.

At this time, for example, a 2CH D / A unit (a special function unit having two digital / analog conversion functions) is attached to the position of the input / output number 50, and the analog corresponding to the contents of the device D0 on the 1st CH. Consider a program that outputs values. The program in this case is the program step 7A shown in FIG. CPU
When the unit 1 executes the program step 7A in the program memory, it checks that the first two characters of the instruction name of the instruction are Z_ and determines that it is a special function unit corresponding instruction.

Next, the CPU unit 1 is mounted on the position of the input / output number 50 designated by the command, and the 2CH.D
Reads the number 430 of special function unit corresponding instructions stored in the 2-port memory 41 in the / A unit. Assuming that four special function unit corresponding instructions are defined in this unit, the character codes of the four instructions are sequentially examined. In this case, since the memory information corresponding to the 1st CH is the first memory information, the processing is performed based on this first memory information, that is, the information of the special function unit corresponding instruction.

First, since it is known that there is one device designation in this instruction and the device type is indicated by the code F5H, this is compared with the instruction D0 of the program memory 11 and it is confirmed that it is correct. (The type of D0 is assumed to be predetermined to F5). Next, read / write classification, buffer memory start address, read / write count, handshake signal (0 = none)
From the device memory 12 is determined to be an instruction to write to the address 2 of the two-port memory 41, and this is executed according to the enable / disable flag (= 0),
The special function unit sets the analog value corresponding to the content of D0 of the device memory 12 stored in the 2-port memory 41 to 1
Output to CH.

Next, for example, 8 at the position of input / output number 50
Consider a program in which a CH / D / A unit (special function unit having eight digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output to 1CH. Also in this case, the program is the program step 7A in FIG. 1, and the operation of executing the instruction is also the same.

As described above, the special function unit corresponding command having the same function has the same command name as Z_ANALOG_1, and it can be easily understood that it is a command that outputs an analog value on the first channel by looking at the command name.

Embodiment 3 FIG. Another embodiment of the present invention will be described below with reference to FIG.
In FIG. 8, 1 is a CPU unit that controls the entire programmable controller, 11 is a program memory in which a sequence program is stored, 12 is a device memory used in the sequence program, or data of operation results is stored, 2 is a program There is a programming device 3 for creating a sequence program to be stored in the memory 11, and 45 is a buffer memory as a 2-port memory.

An example of the stored contents of the special instruction information memory 42 (contents of the special instruction information) is almost the same as the configuration example of the second embodiment shown in FIG. That is, 2 in FIG.
Instead of the port memory 41, a special instruction information memory 42 and a buffer memory 45 are provided in FIG. 8, and the special instruction information memory 42 is used exclusively for storing special instruction information.

The format of the special instruction is the same as the example shown in FIG. Further, the operation flow chart showing the processing of the CPU unit 1 when executing the special instruction is the embodiment 2 shown in FIG.
It is almost the same as the operation flow chart of.

The operation of the third embodiment will be described below. In the 2CH D / A unit (special function unit with two digital / analog conversion functions), "Z_A"
"NALOG_1" is an instruction to output an analog value on 1CH, and "Z_ANALOG_2" is an instruction to output an analog value on 2CH.

Similarly, in the 8CH D / A unit (special function unit having eight digital / analog conversion functions), "Z_ANALOG_1" is an instruction to output an analog value on the first CH, "Z_ANALOG_2".
Is an instruction to output an analog value on the 2nd CH ... "Z_A
NALOG_8 "is an instruction to output an analog value on the 8th CH," Z_LOCATE "is an instruction to specify a display position, and" Z_PRINT "is an instruction to display in the display unit.

2CH / D / A at the position of input / output number 50
Consider a program when a unit (special function unit having two digital / analog conversion functions) is installed and you want to output an analog value corresponding to the contents of device D0 on CH1. In this case, the program is instruction 7 in FIG.
A. The user creates a program called the instruction 7A of FIG. 2 by the programming device 2, and writes this program 7A in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, when the CPU unit 1 actually executes the program 7A written in the program memory 11, it checks that the first two characters of the instruction name of the instruction are Z_, and determines that it is a special instruction. Determine. Next, the CPU unit 1 shows the special instruction stored in the 2-port memory 42 in the 2CH • D / A unit mounted at the position of the input / output number 50 designated by the instruction in FIG. 5B. The number of special instructions 4130 is read. Since it is known that four special instructions are defined in this unit, the character codes of the four instructions are sequentially examined. In this case, since the instruction names match at the first position, processing is performed based on the information of this first special instruction.

First, since it is known that this instruction specifies only one debate memory, and that the kind indicated by the code F5H can be specified, this is checked as D0 of the instruction of the program memory 11 and it is understood that it is correct. Next, read / write classification, buffer memory start address,
It is judged from the read / write number and the handshake signal (0 = none) that the command is to write the D0 contents of the device memory 12 to the address 2 of the buffer memory 45, and this is executed by the execution enable / disable flag (0 = enabled). Then, the contents of D0 of the device memory 12 are written in the address 2 of the buffer memory 45. The special function unit outputs an analog value corresponding to the contents of the address 2 of the buffer memory 45 to 1CH as in the conventional case. That is, D of the device memory 12
The content analog value of 0 will be output to 1CH.

For example, at the position of input / output NO50, 8CH
Install a D / A unit (special function unit with 8 digital / analog conversion functions), and connect device D to the 1st CH.
Considering a program for outputting an analog value corresponding to the content of 0, the program is the instruction 7A in FIG.
, And the instruction execution operation becomes exactly the same.

Considering a program in which a display unit is mounted at the position of the input / output number 50 and a character corresponding to the contents of the debates D0 is displayed at the 1st row and the 3rd column, the program is the instruction 7B in FIG. The instruction execution operation is also the same.

As described above, the special instruction having the same function has the same instruction name "Z_ANALOG_1", and it can be easily understood that the instruction name is used to output the analog value to the first channel. In addition, even if the special instruction of the same internal processing is used, “Z_A
In the NALOG_1 display unit, "Z_LOCAT"
It is also easy to see that the functions are different from E "and" Z_PRINT ".

Embodiment 4 FIG. Next, still another embodiment of the present invention will be described with reference to the drawings. In FIG. 9, 13 is a memory for storing special command information of each special function unit.

FIG. 10 is a diagram showing an example of the stored contents of the second storage means for storing the special command information of each special function unit, for example, the memory 13. In the figure, 131 stores the contents of the special command information memory 42 of the special function unit attached to the input / output number 0. In 132, the contents of the special command information memory 42 of the special function unit attached to the input / output number 10 are stored. The same applies hereinafter.

In FIG. 11, before executing the sequence program, the contents of the special instruction information memory previously stored in the memory in the special function unit are transferred to the memory 13 in the CPU unit for storing the information. C when doing
It is an operation | movement flowchart which shows the process of a PU unit.

Next, the operation will be described. When programming with the programming device 2, at the beginning of the input of the command name, Z_
After that, input of an arbitrary command name can be accepted. In this way, the program device 2 creates a program of the format shown in FIG. 1, and writes the program in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, before the CPU unit 1 executes the sequence program, the special instruction information stored in the special instruction information memory 42 in the special function unit is stored in advance in the CPU unit. To the memory 13 for storing. That is, from the first unit to the last unit (step 301) to the last unit (step 3).
05) Perform the following processing. It is checked whether the corresponding unit is a special function unit (step 302). If it is a special function unit, it is checked whether a special instruction is defined (step 303). If it is defined, the special instruction information stored in the special instruction information memory 42 in the corresponding special function unit is transferred to the memory 13 in the CPU unit (step 304). If it is not the final unit in step 305, proceed to the next unit (step 30
6).

Next, the CPU unit 1 actually executes the sequence program written in the program memory 11. The processing at this time is as described in the first embodiment (as shown in the operation flow chart of FIG. 6). However, Example 1
Then, the processing is performed based on the special instruction information stored in the special instruction information memory 42 in the corresponding special function unit. However, in the fourth embodiment, the CPU that previously stores the information is described. The processing is performed based on the information for the corresponding special instruction in the memory 13 in the unit. Generally, since the memory 13 in the CPU unit has an access speed several steps faster than the special instruction information memory 42 of the special function unit, the execution speed of the special instruction is faster in the fourth embodiment.

In the above description, all of the special command information in the special command information memory 42 of all special function units having special commands is previously stored in the memory 13 of the CPU function unit.
However, in order to save memory and speed up decoding, the special instruction actually programmed in the sequence program is searched and the corresponding special instruction information memory 42 of the corresponding special function unit is searched. It is also possible to transfer only the corresponding special command information of No. 1 to the memory 13 of the CPU unit.

Example 5. Next, still another embodiment of the present invention will be described with reference to the drawings. In FIG. 12, reference numeral 43 denotes a first storage means provided in the special function unit, accessible from the CPU unit, and storing a special instruction sequence program, for example, a special instruction sequence memory.

FIG. 13 shows the special instruction sequence memory 43.
FIG. 7 is a diagram showing an example of stored contents (contents of a special instruction sequence memory). In the figure, (a) is a general example of the special instruction sequence memory 43. Reference numeral 43a is a portion for storing the total number of special instructions defined in this unit, and thereafter there is a portion for storing the instruction name of each special instruction and the sequence program. This information will be described using the first instruction as an example. Reference numeral 431a is a portion in which the instruction name of the special instruction defined first is stored in a character code, 432a.
Is the part where the sequence program corresponding to this instruction is stored. Information of one command is 43
1a and 432a are configured as a set, and such a set of information is stored for the total number of special instructions stored at address 0. (B) is an example of the storage contents of the special instruction sequence memory 43 in the 2CH • D / A unit, (c) is an example of the storage contents of the special instruction sequence memory 43 in the 8CH • D / A unit,
(D) shows an example of the stored contents of the special command sequence memory 43 in the display unit.

FIG. 14 is a sequence memory 43 for special instructions.
It is an example of the sequence program corresponding to the special instruction stored in. In the figure, reference numeral 81 is an example of a sequence program corresponding to the special instruction "Z_ANALOG_1" of the 2CH • D / A unit and a sequence program corresponding to the special instruction "Z_PRINT" of the display unit. Reference numeral 82 is an example of a sequence program corresponding to the special instruction "Z_ANALOG_1" of the 8CH D / A unit. Reference numeral 83 is an example of a sequence program corresponding to the special instruction "Z_ANALOG" of the 8CH D / A unit.

FIG. 15 shows a CP when executing a special instruction.
It is an operation | movement flowchart which shows the process of U unit. Next, the operation will be described. When a program is created by the programming device 2, if Z_ is entered at the beginning of the instruction name input,
After that, the input of an arbitrary command name can be accepted. In this way, the program device 2 creates a program of the format shown in FIG. 1, and writes the program in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, the CPU unit 1 actually executes the sequence program written in the program memory 11. The processing at this time is shown in the operation flow chart of FIG. First, if the first two characters of the instruction name of the instruction are Z_, it is determined to be a special instruction (step 501). If it is a character other than Z_, a normal instruction is processed (step 50).
8). Next, the CPU unit 1 stores the special instruction stored in the special instruction sequence memory 43 in the special function unit 4 attached to the input / output NO position designated by the instruction. The number of instructions defined in this unit is read from the number of instructions 43a (step 5
02), the number of special instructions is searched for an instruction having a matching character code, and it is checked whether this instruction is defined in this special function unit (step 503).

If no matching instruction is found, it is regarded as an error because this instruction name is not defined on the special function unit side (step 506), and if found, it is regarded as being defined and the CPU unit 1 proceeds to the next step. Move on to processing. First, the contents of the device designated by the command are set in the dedicated device A (A0, A1, A2 ...) (step 504). Next, the special instruction sequence program corresponding to the instruction is executed (step 50).
5). When this process is completed normally, the process of this command is completed, and when an error occurs in the middle, error processing such as error display is performed (step 506). The process of this command is completed and the next command is executed. Go to execution.

In the 2CH D / A unit (special function unit having two digital / analog conversion functions),
Z_ANALOG_1 is an instruction to output an analog value on CH1 and Z_NALOG_2 is an instruction to output an analog value on CH2. Similarly, in the 8CH D / A unit (special function unit having eight digital / analog conversion functions), Z_ANALOG_1 outputs an analog value on 1CH, Z_ANALOG_2 outputs an analog value on 2CH, ... Z_AN
ALOG_8 command to output analog value on CH8,
Z_ANALOG is an instruction to output an analog value to the designated CH. Also, in the display unit, Z_LOCAT
E is an instruction to specify the display position, and Z_PRINT is an instruction to display.

When a 2CH D / A unit (special function unit having two digital / analog conversion functions) is mounted at the position of input / output number 50 and an analog value corresponding to the contents of the device D0 is output on the 1st CH Think about the program. In this case, the program is instruction 7A in FIG.
Becomes The user uses the programming device 2 to create a program called the instruction 7A in FIG. 2 and writes the program 7A in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, when the CPU unit 1 actually executes the program 7A written in the program memory 11, it is checked that the first two characters of the instruction name of the instruction are Z_, and it is determined that the instruction is a special instruction. Determine. Next, the CPU unit 1 reads out the number 43b of special instructions stored in the special instruction sequence memory 43 in the 2CH • D / A unit mounted at the position of the input / output number 50 designated by the instruction. Since it is known that four special instructions are defined in this unit, the character codes of the four instructions are sequentially examined. In this case, the instruction names match at the first position. Next, the input / output number 50 designated by this instruction is stored in A0 of FIG. 14, and the contents of D0 of the device memory 12 are stored in A1 of FIG. Then, the sequence program step 81 corresponding to this instruction is executed. Since 50 is stored in A0 and the content of D0 is stored in A1 in this sequence program step 81, when this sequence program step 81 is executed, an analog value corresponding to the content of D0 of the device memory 12 is input / output. It will be output to 1CH of the 2CH • D / A unit mounted at the position of number 50.

Next, at the position of input / output number 50, 8CH.D
/ A unit (special function unit with 8 digital / analog conversion functions) is installed, and device D0
Consider a program when you want to output an analog value corresponding to the contents of. In this case as well, the program is the instruction 7A in FIG. 2, and the instruction execution operation is exactly the same. That is, the sequence program 82 corresponding to this instruction
Will be executed.

Next, consider a program for mounting a display unit at the position of the input / output number 50 and displaying a character corresponding to the contents of the device D0 in the first row and third column.
In this case as well, the program becomes the instruction 7B in FIG. 2, and the operation of executing the instruction is exactly the same.

As described above, the special instruction having the same function has the same instruction name "Z_ANALOG_1", and it can be easily understood that the instruction name is used to output the analog value to the first channel. In addition, even with the same special instruction for internal processing, "Z_A
NALOG_1 ", in the display unit," Z_LOCA
It is also easy to see that the functions are different from those of TE "and" Z_PRINT ".

Next, at the position of input / output number 50, 8CH.D
/ A unit (special function unit with 8 digital / analog conversion functions) is installed, and device D0
Consider a program when you want to output an analog value corresponding to the contents of. In this case, the program is instruction 7A in FIG. The user uses the programming device 2 to create a program called the instruction 7A in FIG. 2 and writes the program 7A in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, when the CPU unit 1 actually executes the program 7A written in the program memory 11, it is confirmed that the first two characters of the instruction name of the instruction are Z_ and it is a special instruction. To determine. Next, the CPU unit 1 sets the number 43 of special instructions stored in the special instruction sequence memory 43 in the 2CH D / A unit mounted at the position of the input / output number 50 designated by the instruction.
Read b. Since it is known that four special instructions are defined in this unit, the character codes of the four instructions are sequentially examined. In this case, the instruction names match at the first position.

Next, the input / output number 5 designated by this instruction
0 to A0, CH number 1 to A1, device memory 12
Store the contents of D0 in A2. After that, the sequence program 83 corresponding to this instruction is executed. In this command, 50 is stored in A0, 3 is stored in A1, and the content of D0 is stored in A2. Therefore, “= A1 1” is satisfied, “TO A0 8 A2 1” is executed, and the buffer memory 45 The contents of A2 are written in the address 8 of. That is, the analog value according to the contents of D0 of the device memory 12 is attached to the position of the input / output number 50 of 2C.
It will be output to CH1 of the H / D / A unit.

As described above, since the operation of the special instruction is freely described in the seamless program, the complicated function is "
It can be realized by one special instruction "Z_ANALOG". Also, it is easily understood that the instruction name "Z_ANALOG" outputs an analog value to the designated CH.

Example 6. Next, still another embodiment of the present invention will be described with reference to the drawings. In FIG. 16, 14 is a memory for storing the special instruction sequence program of each special function unit.

FIG. 17 shows a second program for storing a special instruction sequence program for each special function unit.
It is a figure which shows the example of a memory | storage means, for example, the memory content of memory 14. In the figure, 141 stores the contents of the special command sequence memory 43 of the special function unit attached to the input / output number 0. Input / output number 10 for 142
The contents of the special command sequence memory 43 of the special function unit mounted in the are stored. The same applies hereinafter.

In FIG. 18, before executing the sequence program, the contents of the special instruction sequence memory 43 stored in advance in the memory in the special function unit are transferred to the memory 14 in the CPU unit for storing the contents. FIG. 7 is an operation flow chart showing the processing of the CPU unit when performing.

Next, the operation will be described. When a program is created by the programming device 2, if Z_ is input at the beginning of the input of a command name, the input of an arbitrary command name can be accepted thereafter. In this way, the program device 2 creates a program having a format as shown in FIG.
Communication cable 3 in the program memory 11 of U unit 1
Write the program via.

Next, before the CPU unit 1 executes the sequence program, the special instruction sequence program or the like previously stored in the special instruction sequence memory 42 in the special function unit is stored in the contents in the CPU unit. Transfer to the memory 14 for That is, the following processes are performed in order from the first unit (step 601) to the last unit (step 605). It is checked whether the corresponding unit is a special function unit (step 602). If it is a special function unit, it is checked whether a special instruction is defined (step 603). If it is defined, the special instruction sequence program or the like stored in the memory 42 in the corresponding special function unit is transferred to the memory 14 in the CPU unit (step 60).
4). If it is not the final unit in step 605, the process proceeds to the next unit (step 606).

Next, the CPU unit 1 actually executes the sequence program written in the program memory 11. The processing at this time is as described in the fifth embodiment (as shown in the operation flow chart of FIG. 15). However, in the invention of the fifth embodiment, the processing is performed based on the special instruction sequence program stored in the memory 43 in the corresponding special function unit, but in the sixth embodiment, the information is stored in advance. The processing is performed based on the sequence program for the special instruction in the memory 14 in the CPU unit. In general, since the memory 14 in the CPU unit has an access speed several steps higher than that of the special instruction sequence memory 43 of the special function unit,
In the sixth embodiment, the execution speed of the special function instruction is high.

In the above description, all the special instruction sequence programs in the memories 42 of all special function units having special function instructions are transferred to the memory 14 of the CPU unit in advance. For a special function instruction actually programmed in the sequence program, and transfers only the corresponding special instruction sequence program of the special instruction sequence memory 43 of the corresponding special function unit to the memory 14 of the CPU unit. You may do it.

Example 7. Next, still another embodiment of the present invention will be described with reference to the drawings. In FIG. 19, reference numeral 44 denotes a memory which can be accessed from the CPU unit and which stores a special instruction microcomputer program.

In this embodiment, the special instruction sequence program in the fifth embodiment is replaced with a special instruction microcomputer program. A microprocessor is usually mounted on the CPU unit. In addition, a program composed of the machine language of this microprocessor is called a microcomputer program. The operation of the seventh embodiment is such that the microcomputer program for the special instruction is executed instead of the sequence program for the special instruction in the fifth embodiment. The operation is almost the same as in the fifth embodiment.

Example 8. Next, still another embodiment of the present invention will be described with reference to the drawings. In FIG. 20, reference numeral 15 is a memory for storing a special instruction microcomputer program for each special function unit.

In the eighth embodiment, the special instruction sequence program in the sixth embodiment is replaced with a special instruction microcomputer program. Also in the operation of the eighth embodiment, instead of the special instruction sequence program in the sixth embodiment, a special instruction microcomputer program is transferred in advance and then executed. The operation is almost the same as in the sixth embodiment.

As described above, in the first to eighth embodiments, the program can be performed without being aware of the address of the 2-port memory of the special function unit, and the instruction to the special function unit can be seen to determine what the instruction is. The readability of the program can be improved because the operation can be immediately understood, and the design efficiency / maintenance efficiency can be improved, and even if the number of special function units increases, the appropriate special function can be achieved without affecting the CPU unit side. It is possible to have functional unit compatible instructions.

Although the programming device 2 and the CPU unit 1 are connected by the communication cable 3 in the first to eighth embodiments, they may be directly connected without the communication cable. Further, the program device 2 may be connected to the communication special function unit via the communication cable 3. Further, one of the special function units may be the programming device 2.

Further, although the special instruction information held by the special function unit is defined as shown in FIG. 5, the memory structure may be a word unit or another unit, or may be different for each information. The information of each command may be limited from these, or other necessary information may be added. Further, it may differ depending on the unit, or information for notifying the difference may be added. Further, although one instruction is stored collectively, it may be stored for each information.

In the first to eighth embodiments, the instruction in which the first symbol in the instruction symbol starts with Z_ is the instruction corresponding to the special function unit, but the instruction is not limited to Z_.
For example, an instruction starting with X_, Y_ is a special function unit corresponding instruction, X_ is an analog special function unit corresponding instruction, Y_ is a link special function unit corresponding instruction, and Z is
If _ is used properly like other special function unit compatible instructions, the program will be easier to read.

Further, the instruction name starting with Z_ is the special function unit corresponding instruction, but the instruction name other than the standard (equipped) instruction of the CPU unit may be the special function unit corresponding instruction. That is, it also serves as the first symbol indicating that the second symbol indicating the special function type is the special function unit corresponding instruction. Furthermore, Z_
Is the criterion for the special function unit corresponding instruction, but the instruction name etc. is converted into an intermediate code and stored in the program memory, and the intermediate code may determine whether the instruction is a special function unit corresponding instruction. .

Further, although the execution request to the special function unit is made by interrupting the special function unit from the CPU unit, the CPU unit 1 sets up a flip-flop (not shown) in the special function unit, The functional unit may poll it to determine whether there is an execution request, or the CPU unit 1 writes the execution request code in the 2-port memory in the special function unit, and the special function unit 4 polls it. It may be judged whether there is an execution request.

Although the two-port memory is used in the above embodiment, a method of switching the data and address buses belonging to the CPU unit 1 and the special function unit 4 by using the two-port memory may be used.

Further, although the programmable controller which is the sequence control device has been described as an example in the first to eighth embodiments, the present invention can be applied to a numerical control device or the like other than the programmable controller.

[0102]

As described above, according to the present invention, the D / A
A first code indicating that it is an instruction of a special function unit such as a conversion unit, and a function that indicates the function of the special function unit, and if there are multiple channels in the special function unit and it is necessary to specify the channel to be used, further The CPU unit executes the sequence program having the special function command in which the second code having the number information, the mounting position of the special function unit, and the action information such as the address of the device memory and the printing position information are described. As the execution method, the first storage means provided in the special function unit and accessible from the CPU unit stores the unique information such as the second code, the address of the bidirectional access storage means of the special function unit, and the number of transfer points. Pre-stored for a certain number of special function commands that can be processed by the special function unit. , CPU sequence program
The unit executes and the special function instruction is called. Whether the unique information corresponding to the called special function instruction is stored in the first storage means is determined by the CPU unit based on the content stored in the first storage means, and the two match. If the stored information is stored, the input / output command classification corresponding to the special function command, the mounting position of the special function unit, the address of the device memory, and the bidirectional based on the unique information and the information described in the special function command. Since the CPU unit executes the sequence program instruction having the address of the access storage means and the number of transfer points and performs the predetermined processing based on the sequence program instruction through the special function unit, the special function corresponding instruction and its type are specified. By executing a program having instruction steps in the instruction format using the indicated instruction symbol A program can be created without considering the address of the bidirectional access storage means in the special function unit, and the control target controlled by the special function unit specified by the instruction can be seen by looking at the instruction format, and the program readability is high and the program design Further, the maintenance efficiency can be improved, and by storing the unique information in the first storage means in advance as the first storage means, for example, a non-volatile memory, the CPU unit performs the same processing for each of various special function units. Since it is sufficient if the special function unit having a new function is adopted or the function of the special function unit is changed, an increase in the work due to the change of the system program of the CPU unit can be prevented.

Further, the first code indicating the instruction of the special function unit such as the D / A conversion unit and the function of the special function unit are shown, and the special function unit has a plurality of channels and the channel to be used is designated. If necessary, a sequence program having a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information are described. Is executed by the CPU unit, and as a method for executing the same, the second code, the address of the bidirectional access storage unit of the special function unit, and the first storage unit provided in the special function unit and accessible from the CPU unit, A specific number of special machines that can process unique information such as the number of transfer points by a special function unit The instruction is stored in advance and the stored content of the first storage means is transferred to the second storage means of the CPU unit, the CPU unit executes the sequence program to call the special function instruction, and corresponds to the called special function instruction. Whether or not the unique information stored in the second storage means is stored in the CPU based on the stored contents of the second storage means.
If the unit judges and if a match is stored, the input / output command category corresponding to the special function command, the mounting position of the special function unit, and the device based on the unique information and the information described in the special function command. Since the CPU unit executes the sequence program instruction having the memory address, the address of the bidirectional access storage means, and the number of transfer points, and the predetermined processing based on the sequence program instruction is performed through the special function unit. In addition to the effect of the first aspect of the invention, there is an effect that the processing can be speeded up.

Also, the first code indicating that it is an instruction of a special function unit such as a D / A conversion unit, the function of the special function unit, and the special function unit having a plurality of channels are designated. If necessary, a sequence program having a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information are described. The CPU unit is executed, and as an execution method thereof, the second code, the input / output command classification corresponding to the special function command, and the special function are stored in the first storage means provided in the special function unit and accessible from the CPU unit. The mounting position of the unit, the address of the device memory, and the bidirectional access provided in the special function unit. A sequence program instruction having the address of the memory means and the number of transfer points is stored in advance for a predetermined number of special function instructions which can be processed by the special function unit, and the CPU unit executes the sequence program to call the special function instruction. Whether the second code corresponding to the special function instruction and the predetermined number of sequence program instructions corresponding to the special function instruction are stored in the first storage means, the CPU unit determines whether or not the first storage means stores the second code. It is judged, and if a matching one is stored, the predetermined number of sequence program instructions are stored in the CPU.
The unit executes the predetermined processing based on the predetermined number of sequence program instructions through the special function unit.
This has the effect of reducing the load on the U unit.

Also, the first code indicating that it is an instruction of a special function unit such as a D / A conversion unit, and the function of the special function unit are indicated, and the special function unit has a plurality of channels, and the channel to be used is designated. If necessary, a sequence program having a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information are described. Is executed by the CPU unit. As an execution method, a second code and an input / output command classification corresponding to the special function command and a special code are stored in a first storage means provided in the special function unit and accessible from the CPU unit. The mounting position of the functional unit, the address of the device memory, and the bidirectional address provided in the special functional unit. And a predetermined number of sequence program instructions including an address and transfer count Seth storage means are previously stored for the special function instructions of a predetermined number that can be processed by a special function unit, the storage contents of the first memory means CPU
At the stage of being transferred to the second storage means of the unit, the CPU unit executes the sequence program to call the special function instruction, the second code corresponding to the called special function instruction, and the predetermined number of the special function instruction. The CPU unit determines whether or not the sequence program command is stored in the second storage unit based on the storage content of the second storage unit, and if a matching one is stored, the predetermined number of sequence program commands are stored in the CPU unit. Is executed and the predetermined processing based on the predetermined number of sequence program instructions is executed by the special function unit. Therefore, the processing can be speeded up in addition to the effect of the invention of claim 3.

Since the sequence program command is constituted by the microcomputer program command,
There is an effect that a wide range of control can be performed.

Further, since the first memory is the predetermined area of the bidirectional access storage means, the cost may increase, but the hardware structure of the special function unit can be simplified.

[Brief description of drawings]

FIG. 1 is a diagram showing a format of a special instruction according to Embodiments 1 to 8 of the present invention.

FIG. 2 is a diagram showing an example of special instructions in Embodiments 1 to 8 of the present invention.

FIG. 3 is a 2-port memory 4 according to the first embodiment of the present invention.
2 is an example of the stored contents of 1 (contents of special instruction information).

FIG. 4 is an operational flowchart showing the processing of the CPU unit when executing a special instruction in the first embodiment of the present invention.

FIG. 5 is a diagram showing an example of stored contents of a special command information storage memory 41 of each special function unit in Embodiment 2 of the present invention.

FIG. 6 is an operational flowchart showing the processing of the CPU unit when executing a special instruction in the second embodiment of the present invention.

FIG. 7 is a system configuration diagram of a programmable controller common to first and second embodiments of the present invention and a conventional example.

FIG. 8 is a configuration diagram of a programmable controller according to a third embodiment of the present invention.

FIG. 9 is a configuration diagram of a programmable controller according to a fourth embodiment of the present invention.

FIG. 10 is a CPU for storing special command information of each special function unit according to the fourth embodiment of the present invention.
It is a figure which shows the example of the memory content of the memory 13 in a unit.

FIG. 11 is an operational flowchart showing the processing of the CPU unit when transferring the contents of the special instruction information memory 42 stored in the memory of the special function unit to the memory 13 of the CPU unit according to the fourth embodiment of the present invention. Is.

FIG. 12 is a configuration diagram of a programmable controller according to a fifth embodiment of the present invention.

FIG. 13 is a storage content of a memory 43 (contents of a special instruction sequence memory) in the fifth to sixth embodiments of the present invention.
It is a figure showing an example.

FIG. 14 is a diagram showing an example of a sequence program corresponding to a special instruction stored in the memory 43 in the fifth to sixth embodiments of the present invention.

FIG. 15 is an operation flowchart showing processing of the CPU unit when executing a special instruction in the sixth embodiment of the present invention.

FIG. 16 is a configuration diagram of a programmable controller according to a sixth embodiment of the present invention.

FIG. 17 is a diagram showing an example of stored contents of a memory 14 for storing a special instruction sequence program for each special function unit in Embodiment 6 of the present invention.

FIG. 18 is an operation flowchart showing the processing of the CPU unit when transferring the contents of the special instruction sequence memory 43 stored in the memory of the special function unit to the memory 14 of the CPU unit according to the sixth embodiment of the present invention. Is.

FIG. 19 is a configuration diagram of a programmable controller according to a seventh embodiment of the present invention.

FIG. 20 is a configuration diagram of a programmable controller according to an eighth embodiment of the present invention.

FIG. 21 is a diagram showing an example of stored contents of a buffer memory.

FIG. 22 is a diagram showing a format of a conventional special instruction.

FIG. 23 is a diagram showing an example of an instruction for writing data to a conventional special function unit.

[Explanation of symbols]

 1, 1A, 1B, 1C CPU unit 11 Program memory 12 Device memory 13 Special instruction information memory 14 Special instruction sequence memory 15 Special instruction microcomputer memory 2 Program device 3 Communication cable 4 Input / output unit 4A, 4B, 4C, 4D Special function unit 41 2-port memory 42 Special instruction information memory 43 Special instruction sequence memory 44 Special instruction microcomputer memory 45 Buffer memory

Claims (6)

(57) [Claims] 1. A first code indicating an instruction of a special function unit such as a D / A conversion unit, a function of the special function unit and a channel to be used when the special function unit has a plurality of channels. When it is necessary to specify, a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information is further described. Based on the input information from the control target, the output information for controlling the output device such as the coil provided in the control target, and the stored contents of the device memory for storing the internal information when the CPU unit executes the sequence program. A sequence control method for controlling the controlled object, comprising the CPU unit provided in the special function unit. A predetermined number of unique information, such as the second code, the address of the bidirectional access storage means of the special function unit, and the number of transfer points, which can be accessed by the special function unit, in the first storage means accessible by the special function unit. Of the special function instruction stored in advance, the step of executing the sequence program by the CPU unit to call the special function instruction, the unique information corresponding to the called special function instruction is stored in the first storage means. Stored in the first storage means, the CPU unit determines based on the stored contents of the first storage means, and if a matching one is stored, based on the unique information and the information described in the special function command. Input / output command category corresponding to the special function command, mounting position of the special function module, and device memory The CPU sequence program instruction having an address and the transfer count address and said bidirectional access memory means
A sequence control method, comprising the step of: executing a unit and performing a predetermined process based on the sequence program instruction via the special function unit. 2. A first code indicating an instruction of a special function unit such as a D / A conversion unit, a function of the special function unit, and a channel to be used when the special function unit has a plurality of channels. When it is necessary to specify, a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information is further described. Based on the input information from the control target, the output information for controlling the output device such as the coil provided in the control target, and the stored contents of the device memory for storing the internal information when the CPU unit executes the sequence program. A sequence control method for controlling the controlled object, comprising the CPU unit provided in the special function unit. A predetermined number of unique information such as the second code, the address of the bidirectional access storage means of the special function unit, and the number of transfer points that can be processed by the special function unit in the first storage means accessible from the computer. The step of pre-storing the special function instruction, the step of transferring the stored contents of the first storage means to the second storage means of the CPU unit, the CPU unit executing the sequence program, and the special function instruction The step of being called, whether or not the unique information corresponding to the called special function command is stored in the second storage means, the CPU unit determines based on the stored contents of the second storage means, and matches If is stored in the special function instruction based on the unique information and the information described in the special function instruction. A sequence program command having a corresponding input / output command classification, a mounting position of the special function unit, an address of the device memory, an address of the bidirectional access storage means, and the number of transfer points is stored in the CPU.
A sequence control method, comprising the step of: executing a unit and performing a predetermined process based on the sequence program instruction via the special function unit. 3. A first code indicating an instruction of a special function unit such as a D / A conversion unit, a function of the special function unit, and a channel to be used when the special function unit has a plurality of channels. When it is necessary to specify, a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information is further described. Based on the input information from the control target, the output information for controlling the output device such as the coil provided in the control target, and the stored contents of the device memory for storing the internal information when the CPU unit executes the sequence program. A sequence control method for controlling the controlled object, comprising the CPU unit provided in the special function unit. In the first storage means accessible from Tsu DOO, and the second code,
A predetermined number having an input / output command category corresponding to the special function command, a mounting position of the special function unit, an address of the device memory, an address of a bidirectional access storage means provided in the special function unit, and a transfer point. The sequence program command of is stored in advance for a predetermined number of the special function commands that can be processed by the special function unit, the step of executing the sequence program by the CPU unit, and the special function command is called. Whether or not the second code corresponding to the special function instruction and the predetermined number of sequence program instructions corresponding to the special function instruction are stored in the first storage means is stored in the first storage means. Based on the above, the CPU unit makes a judgment, and if there is a match, then that location The CP the number of sequence program instructions
And a step of executing a predetermined process based on the predetermined number of sequence program instructions executed by the U unit via the special function unit. 4. A first code indicating an instruction of a special function unit such as a D / A conversion unit, a function of the special function unit, and a channel to be used when the special function unit has a plurality of channels. When it is necessary to specify, a special function command in which a second code having channel number information, a mounting position of the special function unit, and action information such as device memory address and printing position information is further described. Based on the input information from the control target, the output information for controlling the output device such as the coil provided in the control target, and the stored contents of the device memory for storing the internal information when the CPU unit executes the sequence program. A sequence control method for controlling the controlled object, comprising the CPU unit provided in the special function unit. In the first storage means accessible from Tsu DOO, and the second code,
A predetermined number having an input / output command category corresponding to the special function command, a mounting position of the special function unit, an address of the device memory, an address of a bidirectional access storage means provided in the special function unit, and a transfer point. And a sequence program command of 5 are stored in advance for a predetermined number of the special function commands that can be processed by the special function unit, and the contents stored in the first storage unit are transferred to the second storage unit of the CPU unit. A step in which the CPU unit executes the sequence program to call the special function instruction, the second code corresponding to the called special function instruction, and the predetermined number of sequence program instructions corresponding to the special function instruction Whether or not and are stored in the second storage means. The CPU unit determines based on the volume, if a match is only to be stored in the predetermined number sequence program instructions the CP
And a step of executing a predetermined process based on the predetermined number of sequence program instructions executed by the U unit via the special function unit. 5. The sequence control method according to claim 3, wherein the sequence program command is constituted by a microcomputer program command. 6. The sequence control method according to claim 1, wherein the first memory is a predetermined area of the bidirectional access storage means.