JP2548950B2 - Video signal processing circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing circuit, for example, in a VTR or the like, from a composite video signal to a Y (luminance) signal and a C signal.
The present invention relates to a circuit that separates and extracts a (carrier color) signal.

[Conventional technology]

FIG. 8 shows a block diagram of an example of a conventional Y / C separation circuit. The composite video signal (color bar signal) a (Fig. 9 (A)) input to the terminal 1 is delayed by 1H by the 1H delay circuit 2 into a signal b (Fig. 9 (B)), and the subtracter 3 The signal b is subtracted from the signal a, passes through the band-pass filter 4 and the 1/2 amplifier 5, becomes a C signal c (FIG. 9 (C)), and is taken out from the terminal 6. The composite video signal a is delayed by the Δt delay circuit 7 by a time Δt corresponding to the delay time of the band-pass filter 4, and the subtractor 8 subtracts the C signal c from the Y signal d.
(9th (D)) and is taken out from the terminal 9.

[Problems to be solved by the invention]

The above conventional circuit, as shown in FIG.
A so-called halftone part is generated in the
As shown in the figure, the color of the Vertical Transition part shown by the broken line becomes lighter or the color shifts downward, while
As shown in FIG. 3D, there is a problem in that the Y signal d causes dot interference due to the C signal and the image quality is significantly deteriorated. or,
When reproducing fine characters, this one has a problem that the vertical resolution is lowered as shown in FIG. 11 (A), so-called blurring (a) (gray) occurs, and the sharpness is lacking. .

Table 1 shows a truth table of the comb filter in the conventional circuit. In the table, * indicates a halftone of the C signal and color shift (Y signal is dot interference), and ** indicates that it is regarded as the C signal.

Therefore, in order to solve the above-mentioned problems, the present applicant has previously filed Japanese Patent Application No. Sho 62-140921 (invention title "video signal processing circuit").
Proposed a video signal processing circuit shown in FIG. This is a first circuit (bandpass filter 12) for separating a composite video signal coming into a terminal 1 to obtain a first color signal a partially containing a luminance signal component, and the first color signal a. A second circuit (first logic circuit 10) for obtaining a second color signal c'containing a color separation error signal by removing the luminance signal component from the first color signal a and the second circuit
Third circuit (second logic circuit 11) for outputting the signal c having the second highest potential of the color signal c ′ of 1 and the reference potential
And consists of.

The composite video signal input to the terminal 1 is converted into the C signal a (including the Y signal component) by the bandpass filter 12, and the high potential detection circuit (hereinafter, referred to as MAX) 1 of the first logic circuit 10 1
3. While being supplied to the low potential detection circuit (hereinafter referred to as MIN) 14, it is delayed by 1H in the 1H delay circuit 2 to be a signal b.
Here, the MAX13 is configured as shown in FIG. 3 (A), outputs the higher potential of the signal a or the signal −b, and the MIN14 is configured as shown in FIG. 3 (B). Therefore, the lower potential of the signal a and the signal −b is output.

The output of MAX13 is fed to MAX15 and compared to 0V, while the output of MIN14 is fed to MIN16 and compared to 0V.
The MAX15 is configured as shown in Fig. 3 (A). When the output of MAX13 is higher than 0V, the output of the circuit (MAX13 in this case) on the input side is taken out, and MIN16 is shown in Fig. 3 (B). When the output of MIN14 is lower than 0V, the output of the circuit (MIN14 in this case) on the input side is taken out.

The output of MAX15 and the output of MIN16 are added by an adder 17 to obtain a signal C '. In this case, the relationship between MAX15 and MIN16 and the signal c'is as shown in Table 2. It should be noted that in the same table, the combination marked with * indicates that the combination cannot actually occur.

Further, since these MAX15 and MIN16 are configured to detect the change pattern of the color signal, 0V, which is the reference for comparison in MAX15 and MIN16, means the average potential of each input.

A truth table of the first logic circuit 10 is shown in Table 3.
As is clear from the table, when the signals a and b are at the same level and have the same polarity, 0 is output assuming that they are Y signals, while in the other cases, all C signals (color separation error signals Including C signal).

The signal c ′ and the signal a are the MAX13 of the second logic circuit 11.
It is supplied to the MAX18 that performs the same operation with the same configuration as, while it is supplied to the MIN19 that performs the same operation with the same configuration as the MIN14. The output of MAX18 is supplied to MIN20 which has the same configuration as MIN16 and operates in the same way, and is compared with 0V.
The IN19 output has the same configuration as the MAX15 and performs the same operation.
It is supplied to AX21, and the output of MIN20 and the output of MAX21 are added by adder 22.
Are added together and extracted as a correct C signal c. The C signal c is subtracted by the subtractor 8 from the signal from the Δt delay circuit 23, whereby the Y signal e is taken out.

The second logic circuit 11 performs error correction on the assumption that all the C-signal-like data marked with * in the third table in the first logic circuit 10 is considered to be the C signal. Generally, when a C signal is obtained by a comb filter, if the C signal is completely correct, the level and the phase of the current line signal a match, and if the C signal is not correct, the current line signal a and the phase do not match (see Table 1). The signal marked with *, and the second logic circuit 11
Takes advantage of this property to obtain the correct C signal.

When the current line signal a and the signal c ′ are in phase, a ≧
In c ′, the signal c becomes the signal c ′, and in a <c, the signal c becomes the signal a. On the other hand, when the current line signal a and the signal c'are in opposite phase, the signal c is all 0. In this case, "in phase" means that at least the signal c'is the C signal,
It is correct to think of "opposite phase" as the Y signal in the comb filter of the two-line system as shown in FIG. Therefore, in the second logic circuit 11, if the signal c'is larger than the signal a even though it is in phase, it cannot be said to be a completely correct C signal. It is output and the error generated in the first logic circuit 10 is corrected.

The truth table showing the operation of the above second logic circuit 11 is shown in Table 4, and the C signal and the Y signal taken out through the first logic circuit 10 and the second logic circuit 11 are shown in Table 5. That is, the second logic circuit 11 outputs the second highest potential among the signal a, the signal c ′, and the reference potential. The part marked with * in Table 5 Does not cause halftone of the C signal or dot interference of the Y signal as in the conventional example (marked with * in Table 1). The color shift does not cause dot interference of the Y signal.

Therefore, as shown in FIG. 4, it is possible to obtain a high-quality image free from color misregistration and dot interference unlike the conventional example.
Since the signal c outputs 0 when there is no data in the current line signal a, a clear image can be obtained without vertical resolution deterioration as shown in FIG. 11B when reproducing fine characters.

However, the circuit shown in FIG. 12 previously proposed by the applicant of the present invention has a large circuit configuration and cannot be inexpensively constructed.

The present invention does not separate Y / C by an average value like a conventional comb filter, but uses a simple circuit configuration by combining MAX, MIN, an adder, a subtracter, etc. An object of the present invention is to provide a video signal processing circuit which does not cause dot interference, C signal halftone and color shift.

[Means for solving problems]

In FIG. 1, the band-pass filter 12 is a first circuit for separating a composite video signal to obtain a color signal partially including a luminance signal component, and the logic circuit 25 is a second circuit for extracting the luminance signal component from the color signal. The subtractor 24 uses the correlation of the luminance signal component to subtract the luminance signal component extracted from the second circuit from the color signal to obtain the color signal having no separation error signal. The 1H delay circuit 2 Is the fourth circuit that delays the color signal obtained by the bandpass filter 1H by 1H, and MAX13 is the color signal obtained by the bandpass filter 12 and 1
The fifth circuit, MIN14, which outputs the higher potential of the signal obtained by the H delay circuit 2, is lower than the color signal obtained by the bandpass filter 12 and the signal obtained by the 1H delay circuit 2. The sixth circuit that outputs the lower potential, the MIN16 is the seventh circuit that outputs the lower potential of the output of MAX13 and its average potential, MA.
X15 is the eighth circuit that outputs the higher potential of the MIN14 output and its average potential, and the adder 17 is the ninth circuit that combines the MIN16 output and the MAX15 output to extract the luminance signal component. This is an example.

[Action]

C including a part of the luminance signal component extracted by the first circuit
The signal a is extracted by the second circuit by detecting the correlation between the brightness signal components, and the third circuit subtracts the brightness signal component from the C signal d that partially contains the brightness signal components. Then, the C signal c having no separation error is taken out.
Therefore, with a simple circuit configuration
It is possible to obtain a high-quality reproduced image without causing color misregistration or dot interference of the Y signal in the transition part.

〔Example〕

FIG. 1 shows a block diagram of a first embodiment of the circuit of the present invention, in which the same components as those in FIGS. 8 and 12 are designated by the same reference numerals. In the figure, a band-pass filter 12 is a circuit for separating a composite video separation signal to obtain a color signal a (a color signal including a separation error signal) containing a part of a luminance signal component, and a logic circuit 25 surrounded by a broken line is a separation error. A subtracter 24 subtracts the luminance signal component f from the color signal a containing the separation error signal to obtain a separation error signal from the color signal a containing the signal This is a circuit for extracting a color signal c without a color.

Logic circuit 25 is 1H delay circuit 2, MAX13,15, MIN14,1
6 and adder 17, unlike the first logic circuit 10 shown in FIG. 12, the output of MAX13 to MIN16, MIN14
The output of each is supplied to the MAX15.

The composite video signal input to the terminal 1 is converted into the C signal a (including the Y signal component) (FIG. 2 (A)) by the bandpass filter 12 and supplied to the MAX13 and MIN14 of the logic circuit 25, while 1H The signal is delayed by 1H in the delay circuit 2 and becomes a signal b (FIG. 2 (B)). Here, MAX13 outputs the higher potential of signal a and signal b, and MIN14 outputs signal a.
Or the signal b, whichever is lower, is output.

The output of MAX13 is fed to MIN16 and compared to 0V, while the output of MIN14 is fed to MAX15 and compared to 0V.
MAX15 takes the output of the circuit on its input side (MIN14 in this case) when the output of MIN14 is higher than 0V, and MIN16 is MA
If the output of X13 is lower than 0V, take the output of the circuit (MAX13 in this case) on the input side.

The output of MAX15 and the output of MIN16 are added by the adder 17 to obtain a signal f (Fig. 2 (C)). In this case, the relationship among the signal a, the signal b, and the signal f is as shown in Table 6.

As is clear from the table, when the signals a and b have the same level and the same polarity, 1 is output as the Y signal.

The signal f extracted from the logic circuit 25 is supplied to the subtractor 24, where it is subtracted from the output signal a of the bandpass filter 12 to obtain a signal c (FIG. 2 (D)). Since the signal c is a signal obtained by subtracting the Y signal f from the color signal a including the separation error signal (Y signal), it is a color signal having no separation error signal and is taken out from the terminal 6. On the other hand, the signal c is supplied to the subtractor 8 where it is a Y signal e (FIG. 2 (E)) subtracted from the output composite video signal of the delay circuit 23.

Table 7 is a truth table showing the operations of the logic circuit 25 and the subtracters 24 and 8. That is, as is clear from the table, when the signal a is “1” and the signal b is “0”, and when the signal a is “1” and the signal b is “−1”, the C signal is “1”. Next to When the signal a is "-1" and the signal b is "1", the C signal is "-1", and when both the signals a and b are "1", the Y signal is "1". In the table, the portion marked with * does not cause the halftone of the C signal, the color shift, and the dot interference of the Y signal unlike the conventional example (marked with * in Table 1).

Therefore, as shown in FIG. 4, it is possible to obtain a high-quality image free from color misregistration and dot interference unlike the conventional example.
If there is no data of the current line signal a, the signal c outputs 0, so that when reproducing fine characters, a clear image can be obtained without vertical resolution deterioration as shown in FIG. 11 (B).

FIG. 5 shows a block diagram of a second embodiment of the circuit of the present invention, and the same components as those in FIGS. 8, 12, and 1 are designated by the same reference numerals. In the second embodiment, the logic circuit 25 in FIG. 1 is replaced with a logic circuit 26 having a different structure. The logic circuit 26 is composed of MAX27, 28, 29 performing the same operation as the MAX13, 15 shown in FIG. 1 and MIN30, 1H delay circuit 2 so as to perform the same operation as the MIN14, 16 shown in FIG. , The same operation as that of the logic circuit 25 shown in FIG. 1 is performed, and the truth table is as shown in Table 7.

In each logic circuit of the first and second embodiments,
The same effect can be obtained even if MAX and MIN are used interchangeably (reversely).

FIG. 6 shows a block diagram of a third embodiment of the circuit of the present invention. In FIG. 6, the same components as those in FIGS. 1, 5, 6, 8 and 12 are designated by the same reference numerals. The description is omitted. This one uses two 1H delay circuits (2 ₁ , 2 ₂ )
This is a line-type comb filter. The logic circuit 31 has the configuration of the logic circuit 25 shown in FIG.
Signal a MAX33, b, are input signals g 'obtained by inverting the output signal g of the 1H delay circuit 2 ₂ inverting amplifier 32, MIN34, and, MA
It is composed of a MIN35 for comparing the output of X33 with 0V, a MAX36 for comparing the output of MIN34 with 0V, an adder 37, and a subtractor 38.

FIG. 7 shows a block diagram of a fourth embodiment of the circuit of the present invention. In FIG. 7, the same components as those in FIGS. 1, 5, 6, 8 and 12 are designated by the same reference numerals. The description is omitted. In the logic circuit 39 in the figure, the difference from the logic circuit 31 shown in FIG. 6 is that the output of the adder 37 is compared with the signal inverted by the inverting amplifier 40, instead of being compared with 0V for MIN16 and MAX15. , And the subtraction circuit 38 is omitted. Other configurations are similar to those shown in FIG.

The truth table of the signals a, b, g and the output h (correction output) of the adder 37 in the third and fourth embodiments is as shown in Table 8. In the table, The part marked with * indicates a state in which the hue is inverted, for example, green on the upper side and magenta on the lower side with a certain line on the screen as a boundary. In the first and second embodiments, C is used for the two-line system. The signal output Cout becomes "0" (different from the current line) to cause dot interference, but in the third and fourth embodiments, the C signal output Cout is "1" (same as the current line) due to the 3-line method. Therefore, the dot interference in the hue reversal portion can be eliminated.

Further, in the third and fourth embodiments, the predetermined output can be obtained without delaying the signal of the current line by 1H for calculation, so that it is particularly necessary to add a 1H delay circuit to the Y signal side. Absent.

Although the above embodiment is applied to the NTSC system, if a 2H delay circuit is provided instead of the 1H delay circuits 2, 2 ₁ and 2 ₂ ,
Applicable to AL method.

〔The invention's effect〕

According to the present invention, attention is paid to the frequency distribution of the color signal and the luminance signal forming the composite video signal, and the luminance signal having a poor S / N is positively separated by using the correlation, so that the color bar signal, etc. Y in the Vertical Transition part of
When reproducing fine characters, etc. without causing signal dot interference, C signal halftone and color shift, etc.
It is possible to improve the vertical resolution deterioration that has occurred in the conventional comb-shaped filter, and since it can be configured with a relatively simple circuit, it is small in size and low in cost, and in principle, a control signal is not required. However, there is no need for adjustment, and since there is no part that causes group delay other than the input band filter, a large delay circuit for time adjustment of the Y and C signals is not required.

[Brief description of drawings]

FIG. 1 is a block diagram of the first embodiment of the circuit of the present invention, FIG. 2 is a signal waveform diagram of the circuit of the present invention, and FIG. 3 is the MAX and MIN of FIG.
FIG. 4 is a concrete circuit diagram of FIG. 4, FIG. 4 is a reproduced image of a color bar signal obtained by the present invention, FIGS. 5 to 7 are block diagrams of second to fourth embodiments of the circuit of the present invention, and FIG. A block diagram of an example of the circuit, FIG. 9 is a signal waveform diagram of the circuit shown in FIG. 8, FIG. 10 is a reproduced image of a color bar signal obtained by a conventional circuit, FIG. 11 is a reproduced image of fine characters, and FIG.
The figure is a block diagram of the circuit previously proposed by the applicant. 1 …… Composite video signal input terminal, 2,2 ₁ , 2, ₂ …… 1H
Delay circuit, 6 ... C signal output terminal, 8,24,38 ... Subtractor, 9 ... Y signal output terminal, 12 ... Band filter, 13,1
5,27 ~ 29,33,36 ...... High potential detection circuit (MAX), 14,16,30,
34,35 …… Low potential detection circuit (MIN), 17,37 …… Adder, 2
3 ... Δt delay circuit, 25, 26, 31, 39 ... Logic circuit, 3
2,40 …… Inverting amplifier.

Claims (5)

(57) [Claims] 1. A first circuit for separating a composite video signal to obtain a color signal including a part of a luminance signal component, a second circuit for extracting the luminance signal component from the color signal, and the color signal And a third circuit for subtracting the luminance signal component extracted from the second circuit to extract a color signal having no separation error signal, the second circuit being obtained by the first circuit. 4th to delay color signal by 1H
Circuit, a fifth circuit for outputting the higher potential of the color signal obtained by the first circuit and the signal obtained by the fourth circuit, and the first circuit A sixth circuit that outputs the lower potential of the obtained color signal and the signal obtained by the fourth circuit, and a lower potential of the output of the fifth circuit and its average potential A seventh circuit for outputting, an eighth circuit for outputting the higher potential of the output of the sixth circuit and its average potential, an output of the seventh circuit and an output of the eighth circuit A video signal processing circuit comprising: 2. A first circuit for separating a composite video signal to obtain a color signal including a part of a luminance signal component, a second circuit for extracting the luminance signal component from the color signal, and the color signal And a third circuit for subtracting the luminance signal component extracted from the second circuit to extract a color signal having no separation error signal, the second circuit being obtained by the first circuit. 4th to delay color signal by 1H
Circuit, a fifth circuit for outputting the higher potential of the color signal and its average potential obtained by the first circuit, and the signal obtained by the fourth circuit and its average potential And a sixth circuit for outputting the higher potential of the color signal obtained by the first circuit and the sixth circuit for outputting the higher potential of the signal obtained by the fourth circuit. Circuit, and an eighth circuit that outputs the lower potential of the output of the fifth circuit, the output of the sixth circuit and the output of the seventh circuit to take out the luminance signal component. A video signal processing circuit characterized by the above. 3. A first circuit for separating a composite video signal to obtain a color signal including a part of a luminance signal component, a second circuit for extracting the luminance signal component from the color signal, and the color signal And a third circuit for subtracting the luminance signal component extracted from the second circuit to extract a color signal having no separation error signal, the second circuit being obtained by the first circuit. 4th to delay color signal by 1H
Circuit, a fifth circuit for outputting the lower potential of the color signal and its average potential obtained by the first circuit, and the signal obtained by the fourth circuit and its average potential And a sixth circuit for outputting the lower potential of the color signal obtained by the first circuit and the sixth circuit for outputting the lower potential of the signal obtained by the fourth circuit. Circuit, and an eighth circuit for outputting the higher potential of the output of the fifth circuit, the output of the sixth circuit and the output of the seventh circuit to extract the luminance signal component. A video signal processing circuit characterized by the above. 4. A first circuit for separating a composite video signal to obtain a color signal including a part of a luminance signal component, a second circuit for extracting the luminance signal component from the color signal, and the color signal from the color signal. And a third circuit for subtracting the luminance signal component extracted from the second circuit to extract a color signal having no separation error signal, the second circuit being obtained by the first circuit. 4th to delay color signal by 1H
Circuit, a fifth circuit for outputting the higher potential of the color signal obtained by the first circuit and the signal obtained by the fourth circuit, and the first circuit A sixth circuit for outputting the lower potential of the obtained color signal and the signal obtained by the fourth circuit, and an output of the fifth circuit and its average potential and the lower potential. A seventh circuit, an eighth circuit for outputting the output of the sixth circuit and an average potential thereof, whichever is higher, and an output of the seventh circuit and an output of the eighth circuit. And a tenth circuit for further delaying the output of the fourth circuit by 1H, an eleventh circuit for inverting the output signal of the tenth circuit, and a tenth circuit A twelfth circuit for outputting the highest potential of the color signal, the output signal of the fourth circuit, and the output signal of the eleventh circuit; and the first circuit. A color signal, the output signal of the fourth circuit, and the output signal of the eleventh circuit, whichever has the lowest potential, and the output of the twelfth circuit and its output. A fourteenth circuit that outputs a potential lower than the average potential, a fifteenth circuit that outputs the output of the thirteenth circuit and a higher one of the average potential, and an output of the fourteen circuit A video signal processing circuit comprising: the sixteenth circuit for combining the output of the fifteenth circuit and subtracting the combined signal from the output signal of the ninth circuit. 5. A first circuit for separating a composite video signal to obtain a color signal partially including a luminance signal component, a second circuit for extracting the luminance signal component from the color signal, and the color signal And a third circuit for subtracting the luminance signal component extracted from the second circuit to extract a color signal having no separation error signal, the second circuit being obtained by the first circuit. 4th to delay color signal by 1H
Circuit, a fifth circuit for outputting the higher potential of the color signal obtained by the first circuit and the signal obtained by the fourth circuit, and the first circuit A sixth circuit for outputting the lower potential of the obtained color signal and the signal obtained by the fourth circuit, and a seventh circuit for further delaying the output of the fourth circuit by 1H, An eighth circuit that inverts the output signal of the seventh circuit, a color signal obtained by the first circuit, an output signal of the fourth circuit, and an output signal of the eighth circuit The ninth circuit that outputs the highest potential, the lowest one of the color signal obtained by the first circuit, the output signal of the fourth circuit, and the output signal of the eighth circuit A tenth circuit for outputting the electric potential of No. 11, an eleventh circuit for outputting the lower electric potential of the output of the ninth circuit and its average electric potential, and the tenth circuit A circuit that outputs the higher potential of the output of the above and its average potential, and a thirteenth circuit that combines the output of the eleventh circuit and the output of the twelfth circuit to invert the combined signal. Circuit, a fourteenth circuit for outputting the lower potential of the output of the fifth circuit and the output of the thirteenth circuit, an output of the sixth circuit and an output of the thirteenth circuit A video signal processing circuit, comprising: a fifteenth circuit for outputting the higher potential of the above, and a sixteenth circuit for coupling the output of the fourteenth circuit and the output of the fifteenth circuit.