JP2551064B2 - Manufacturing method of ceramic multilayer substrate - Google Patents
Manufacturing method of ceramic multilayer substrateInfo
- Publication number
- JP2551064B2 JP2551064B2 JP62321005A JP32100587A JP2551064B2 JP 2551064 B2 JP2551064 B2 JP 2551064B2 JP 62321005 A JP62321005 A JP 62321005A JP 32100587 A JP32100587 A JP 32100587A JP 2551064 B2 JP2551064 B2 JP 2551064B2
- Authority
- JP
- Japan
- Prior art keywords
- ceramic
- substrate
- layer
- multilayer substrate
- base material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000919 ceramic Substances 0.000 title claims description 36
- 239000000758 substrate Substances 0.000 title claims description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000004020 conductor Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 12
- 239000012212 insulator Substances 0.000 claims description 10
- 238000007639 printing Methods 0.000 claims description 9
- 238000010304 firing Methods 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 3
- 238000002788 crimping Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 30
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 18
- 238000000034 method Methods 0.000 description 10
- 229910052709 silver Inorganic materials 0.000 description 4
- 238000003854 Surface Print Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、いわゆる厚膜法によるセラミック多層基
板の製造方法に関する。The present invention relates to a method for manufacturing a ceramic multilayer substrate by a so-called thick film method.
第2図は、従来の厚膜法によるセラミック多層基板の
一例を示す断面図である。FIG. 2 is a sectional view showing an example of a conventional ceramic multilayer substrate by a thick film method.
このセラミック多層基板1は、例えばアルミナのよう
な焼結セラミック基板あるいはセラミックグリーンシー
ト等のセラミック基材2上に、導体層3と絶縁体層4を
交互に印刷して積層した後、全体を所定の雰囲気と温度
で焼成することによって製造したものである。そしてそ
の表面には、必要に応じて、例えばLSIチップ6の搭載
およびワイヤボンディング、チップコンデンサ7の搭載
および半田付け、抵抗体8の厚膜印刷等の加工が施され
る。This ceramic multi-layer substrate 1 is obtained by alternately printing conductor layers 3 and insulating layers 4 on a ceramic base material 2 such as a sintered ceramic substrate such as alumina or a ceramic green sheet, and then laminating the whole. It is manufactured by firing in the atmosphere and temperature. Then, the surface thereof is subjected to processing such as mounting of the LSI chip 6 and wire bonding, mounting of the chip capacitor 7 and soldering, and thick film printing of the resistor 8 as necessary.
ところが上記のような従来の製造方法だと、セラミッ
ク基材2上に導体層3と絶縁体層4を次々に重ねて印刷
していくため、凹凸が徐々に拡大され、最上層が非常に
凹凸の大きいものとなる。このため、従来の方法では通
常、層数が5層程度のものしか作れなかった。However, according to the conventional manufacturing method as described above, since the conductor layer 3 and the insulating layer 4 are sequentially printed on the ceramic base material 2, the unevenness is gradually enlarged, and the uppermost layer is extremely uneven. Will be a big one. For this reason, in the conventional method, normally, only about 5 layers can be produced.
また、セラミック基材2にセラミックグリーンシート
や、絶縁体層4が焼結する温度領域で軟化するセラミッ
ク基板を用いる場合、セラミック基材2と絶縁体層4の
収縮率の違いから、セラミック多層基板1に反りが発生
し易いという問題もある。When a ceramic green sheet or a ceramic substrate that softens in the temperature range where the insulator layer 4 is sintered is used as the ceramic base material 2, the ceramic base material 2 and the insulator layer 4 have different shrinkage rates, and thus the ceramic multilayer substrate. There is also a problem that 1 is likely to be warped.
そこでこの発明は、これらの点を改善したセラミック
多層基板の製造方法を提供することを目的とする。Therefore, an object of the present invention is to provide a method for manufacturing a ceramic multi-layer substrate that improves these points.
この発明の製造方法は、セラミック基材上に導体層お
よび絶縁体層を交互に印刷して積層する工程と、それに
よって得られたものの最上層に他のセラミック基材を重
ねて全体を圧着する工程と、それによって得られたもの
を焼成する工程とを備えることを特徴とする。The manufacturing method of the present invention comprises a step of alternately printing and laminating conductor layers and insulator layers on a ceramic base material, and another ceramic base material is superposed on the uppermost layer of the resulting product and pressure-bonded as a whole. The method is characterized by including a step and a step of firing a product obtained thereby.
導体層と絶縁体層を交互に印刷して積層したものを両
側からセラミック基材で挟んで圧着するため、厚さ方向
の対称性が高まり、これによってセラミック多層基板の
反りが減少する。また、セラミック基材が最外層となる
ため、表面の平坦性も良くなる。Since the conductor layers and the insulator layers are alternately printed and laminated and sandwiched from both sides by the ceramic base material and pressure-bonded, symmetry in the thickness direction is increased, and thereby warpage of the ceramic multilayer substrate is reduced. Further, since the ceramic base material is the outermost layer, the flatness of the surface is improved.
前述したセラミック基材としては、焼結セラミック基
板やセラミックグリーンシート等が採り得る。As the ceramic base material described above, a sintered ceramic substrate, a ceramic green sheet, or the like can be used.
まず前者を用いた例を第1図を参照して説明すると、
ここでは焼結セラミック基板として0.5mm厚のアルミナ
基板12を用いた(同図(A))。このアルミナ基板12に
は既に、所定のスルーホール12hが公知の手段であけら
れている。First, an example using the former will be described with reference to FIG.
Here, an alumina substrate 12 having a thickness of 0.5 mm was used as the sintered ceramic substrate (FIG. 7A). Predetermined through holes 12h are already formed in this alumina substrate 12 by a known means.
そして当該アルミナ基板12に、導体ペースト(例えば
Ag、Ag・Pd、Au、Cu、Ni、W、Mo等)13を用いて、スル
ーホール印刷と導体層を形成する表面印刷とを行った
(同図(B))。Then, on the alumina substrate 12, a conductive paste (for example,
(Ag, Ag / Pd, Au, Cu, Ni, W, Mo, etc.) 13 was used to perform through-hole printing and surface printing for forming a conductor layer (FIG. 2B).
次いでその上に、絶縁体ペースト(例えばアルミナペ
ースト等)14を印刷して絶縁体層を形成した(同図
(C))。14hはビアホール(Via Hole)である。な
お、絶縁体ペーストとしてアルミナペーストのように高
温で焼成するときは、導体ペーストとしてW、Moの各ペ
ーストを用いる。また、絶縁体ペーストとして800〜100
0℃で焼成可能なものを用いる場合は、導体ペーストと
してAg、Ag・Pd、Au、Cu、Ni等の各ペーストを用いる。Then, an insulating paste (for example, an alumina paste) 14 was printed thereon to form an insulating layer (FIG. 2C). 14h is a via hole. When firing at a high temperature like alumina paste as the insulator paste, W and Mo pastes are used as the conductor paste. Also, as an insulator paste 800-100
When the one that can be fired at 0 ° C. is used, each paste such as Ag, Ag / Pd, Au, Cu, and Ni is used as the conductor paste.
次いで更に、前記と同様の導体ペースト13の印刷工程
(同図(D))と絶縁体ペースト14の印刷工程を繰り返
して行い、10層の絶縁体層を形成した(同図(E)。但
し図には2層のみを示す。)。Next, the same printing step of the conductor paste 13 (the same figure (D)) and the printing step of the insulating paste 14 were repeated to form 10 insulating layers (the same figure (E)). Only two layers are shown in the figure.).
次いでその最上層に、前記アルミナ基板12と同様の所
定のスルーホール15hを設けたアルミナ基板15を乗せ、
全体を金型に入れ、150℃、20Kg/cm2にて熱圧着を行っ
た(同図(F))。Then, on the uppermost layer, put the alumina substrate 15 provided with a predetermined through hole 15h similar to the alumina substrate 12,
The whole was put into a mold and thermocompression bonded at 150 ° C. and 20 kg / cm 2 (FIG. (F)).
次いで、導体ペースト13を用いてアルミナ基板15のス
ルーホール15hにスルーホール印刷を行うと共に表面印
刷を行った。またこの例ではアルミナ基板12側にも表面
印刷を行った(同図(G))。Next, the conductor paste 13 was used to perform through-hole printing on the through-holes 15h of the alumina substrate 15 and surface printing. Further, in this example, surface printing was also performed on the alumina substrate 12 side ((G) in the same figure).
そして最後に、使用した導体ペースト13に合わせて所
定の雰囲気で全体を焼成することにより、セラミック多
層基板を得た(同図(H))。Then, finally, a ceramic multilayer substrate was obtained by firing the whole in a predetermined atmosphere in accordance with the used conductor paste 13 (FIG. 2H).
このセラミック多層基板は、導体層と絶縁体層を積層
したものを上下両側からアルミナ基板12、15で挟んで圧
着したものであるため、厚さ方向の対称性が高く、従っ
てその反りは通常のアルミナ基板と同等であった。This ceramic multi-layer substrate is one in which a conductor layer and an insulator layer are laminated and sandwiched between the alumina substrates 12 and 15 from the upper and lower sides, and has a high symmetry in the thickness direction. It was equivalent to an alumina substrate.
また、最外層がアルミナ基板12、15であるため、従来
の場合のように大きな凹凸が生じることはなく、通常の
アルミナ基板と同等の平坦度であった。In addition, since the outermost layers are the alumina substrates 12 and 15, there is no large unevenness as in the conventional case, and the flatness is equivalent to that of a normal alumina substrate.
また、平坦性が高いため、前記(G)工程後の最上層
に対して、再び前記(C)〜(G)工程を繰り返すこと
も可能であることが分かった。Further, it has been found that it is possible to repeat the steps (C) to (G) again for the uppermost layer after the step (G) because of the high flatness.
一方他の例として、前記アルミナ基板12、15の代わり
に、スルーホールを設けたセラミックグリーンシートを
用い、前記と同様の工程(B)〜(H)によりセラミッ
ク多層基板を得たところ、その反りおよび表面の平坦度
は通常のアルミナ基板と同等であった。On the other hand, as another example, when a ceramic green sheet having through holes was used instead of the alumina substrates 12 and 15 and a ceramic multilayer substrate was obtained by the same steps (B) to (H) as described above, the warpage thereof was observed. And the surface flatness was equivalent to that of a normal alumina substrate.
尚、導体層および絶縁体層を両側から挟み込むのに用
いるセラミック基材は、一方がアルミナのような焼結セ
ラミック基板で他方がセラミックグリーンシートであっ
ても良いのは勿論である。Of course, the ceramic base material used for sandwiching the conductor layer and the insulator layer from both sides may be a sintered ceramic substrate such as alumina and the other may be a ceramic green sheet.
以上のようにこの発明によれば、厚膜法により製造さ
れるセラミック多層基板の欠点であった反りおよび表面
の平坦性を改善することができる。As described above, according to the present invention, it is possible to improve the warpage and the flatness of the surface, which are the drawbacks of the ceramic multilayer substrate manufactured by the thick film method.
その結果、従来の厚膜法における印刷層数の上限(約
5層)を越える多層化が可能になる。As a result, it is possible to form a multilayer that exceeds the upper limit (about 5 layers) of the number of printing layers in the conventional thick film method.
また、表面の平坦性が高まることから、LSIチップ、
チップコンデンサ等のチップ部品の搭載が容易になると
共に、それらと表面導体とのワイヤボンディングや半田
付け等の接続不良も減少する。In addition, since the flatness of the surface is improved, LSI chips,
Chip components such as chip capacitors can be easily mounted, and connection defects such as wire bonding and soldering between them and surface conductors can be reduced.
また、表面層への抵抗体等の厚膜印刷が容易になると
共に、均一な膜厚が得られるようになるためその特性の
ばらつきも小さくなる。Further, it becomes easy to print a thick film of a resistor or the like on the surface layer, and a uniform film thickness can be obtained, so that variations in the characteristics are reduced.
第1図は、この発明の一実施例に係るセラミック多層基
板の製造方法を示す工程図である。第2図は、従来の厚
膜法によるセラミック多層基板の一例を示す断面図であ
る。 12,15……アルミナ基板、13……導体ペースト、14……
絶縁体ペースト。FIG. 1 is a process drawing showing a method for manufacturing a ceramic multilayer substrate according to an embodiment of the present invention. FIG. 2 is a sectional view showing an example of a conventional ceramic multilayer substrate by a thick film method. 12,15 …… Alumina substrate, 13 …… Conductor paste, 14 ……
Insulator paste.
Claims (1)
を交互に印刷して積層する工程と、それによって得られ
たものの最上層に他のセラミック基材を重ねて全体を圧
着する工程と、それによって得られたものを焼成する工
程とを備えることを特徴とするセラミック多層基板の製
造方法。1. A step of alternately printing and laminating a conductor layer and an insulator layer on a ceramic base material, and a step of superimposing another ceramic base material on the uppermost layer of the obtained product and crimping the whole. And a step of firing the product obtained thereby, the method for producing a ceramic multilayer substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62321005A JP2551064B2 (en) | 1987-12-18 | 1987-12-18 | Manufacturing method of ceramic multilayer substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62321005A JP2551064B2 (en) | 1987-12-18 | 1987-12-18 | Manufacturing method of ceramic multilayer substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01161893A JPH01161893A (en) | 1989-06-26 |
| JP2551064B2 true JP2551064B2 (en) | 1996-11-06 |
Family
ID=18127724
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62321005A Expired - Lifetime JP2551064B2 (en) | 1987-12-18 | 1987-12-18 | Manufacturing method of ceramic multilayer substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2551064B2 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5513438B2 (en) * | 1973-12-19 | 1980-04-09 |
-
1987
- 1987-12-18 JP JP62321005A patent/JP2551064B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01161893A (en) | 1989-06-26 |
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