JP2551348B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a compound semiconductor device.

[0002]

2. Description of the Related Art As a structure of a Schottky barrier type gate field effect transistor (hereinafter referred to as MESFET) made of a compound semiconductor, a gate electrode formation region of an operation layer made of a compound semiconductor formed on a semi-insulating GaAs substrate is etched. A recess gate structure is used to form a recess and adjust the channel thickness.

FIG. 3 is a sectional view showing a first example of a conventional semiconductor device.

As shown in FIG. 3, an operating layer 2 is formed on a semi-insulating GaAs substrate 1 by a molecular beam epitaxy method (MBE method), a photoresist film 21 is applied thereon, and alignment exposure is performed. The post-exposure heat treatment, development, and heat treatment are sequentially performed to form the recess forming opening 22.

Next, using the photoresist film 21 as a mask, the operating layer 2 is formed to a thickness of 50 nm by a wet etching method.
Etch to a depth to form a recess structure.

Generally, HMDS (hexamethyldisilazane) treatment is carried out in order to improve the adhesion between the photoresist film and the underlying substrate. In this method, in this method, MESFE is used.
HMDS processing cannot be performed because the characteristics of T are adversely affected.

[0007]

In this conventional method for manufacturing a semiconductor device, the photoresist film shrinks due to heat treatment after development, and especially when the space between the patterns in the blank pattern is large, the edge of the photoresist film is A tensile stress is applied to the outside of the pattern in the portion, and the adhesion between the photoresist film and the substrate is reduced. For this reason, when wet etching is performed, side etching strongly proceeds at the boundary between the photoresist film and the substrate.

For example, in the case of a MESFET having a single gate finger of the pattern shown in FIG. 3, the recess forming opening 22 of the photoresist film is an open pattern which is isolated from the adjacent pattern by 300 μm or more. Yes, side etching occurs due to the above reason. As a result, there arises a problem that the width of the slopes at both ends of the recess becomes wide.

When a plurality of gate fingers as shown in FIG. 4 are to be arranged in parallel at intervals of 15 to 30 μm in the high power FET, the photoresist of the gate forming opening 23 at the outermost side is formed. Of the two side walls of the film, the side wall outside the row of gate fingers is more strongly stressed, so that the side etch also proceeds more strongly. As a result, due to the arrangement of the recess forming openings 23 of the photoresist film, there arises a problem that recesses which are asymmetrical to the left and right are formed.

[0010]

According to a first method of manufacturing a semiconductor device of the present invention, a single or a plurality of layers are formed by applying a photoresist film onto an operating layer formed on a semi-insulating semiconductor substrate and patterning the photoresist layer. A step of forming parallel recess forming openings and dummy openings arranged on both outer sides of the recess forming openings in proximity to each other; and wet etching the surface of the operating layer using the photoresist film as a mask to form recesses And a step of forming.

A second method of manufacturing a semiconductor device according to the present invention is
A step of forming an insulating film on the operating layer formed on the semi-insulating semiconductor substrate; a step of selectively etching the insulating film to expose the surface of the recess forming region of the operating layer; A photoresist film is applied to the surface including the operating layer and patterned to form recess forming openings on the exposed operating layer, and dummy openings are formed on the insulating film on both outer sides of the recess forming opening. And a step of forming a recess by wet etching the surface of the operation layer using the photoresist film and the insulating film as a mask.

[0012]

Next, the present invention will be described with reference to the drawings.

1 (a) to 1 (d) are cross-sectional views showing steps in order to explain the first embodiment of the present invention.

First, as shown in FIG. 1A, n-type GaAs is formed on the semi-insulating GaAs substrate 1 by the MBE method.
Is formed to a thickness of 100 nm, and a positive photoresist for i-line (for example, PFI-15A manufactured by Sumitomo Chemical Co., Ltd.) film 3 is spin-coated to a thickness of 1 μm on the i-line ( After exposure with a reduction projection exposure device (wavelength 365 nm), heat treatment is performed on a hot plate (conditions: 105 to 120).
Appropriate temperature is 30 to 120 seconds). Next, after developing with an alkaline developer (for example, NMD-3 manufactured by Tokyo Ohka Co., Ltd.) for 60 seconds, it is heat-treated for 240 seconds on the hot plate at the same temperature as the heat treatment after the exposure, and the recess 4a for forming recesses is formed. And dummy openings 4b are formed close to both outsides of the openings 4a. Here, the size of the recess forming opening 4a is 1 μm, the size of the dummy opening 4b is 1 μm, and the distance between the opening 4a and the dummy opening 4b is 5 μm.

Next, using the photoresist film 3 as a mask, the operating layer 2 is etched to a depth of 50 nm by a wet etching method using sulfuric acid and hydrogen peroxide,
Form a recess structure.

Next, after removing the photoresist film 3 as shown in FIG. 1B, the entire surface is covered with SiO ₂ by the CVD method.
After depositing the insulating film 5 made of, the insulating film 5 is selectively subjected to reactive ion etching to form an opening 6 for forming a gate electrode in the recess step.

Next, as shown in FIG. 1C, the opening 6
WSi film and TiN by sputtering on the surface containing
A film, a Pt film, an Au film, and a TiN film are sequentially deposited and patterned to form a gate electrode 7.

Next, as shown in FIG. 1D, the insulating film 5
Then, the insulating film 8 is deposited on the entire surface, the insulating film 8 is selectively etched by the wet etching method, and the source electrode 9 and the drain electrode 10 made of AuGe and Ni are formed by the lift-off method.

Here, the operating layer 2 formed by the dummy openings 4b.
It is necessary that the level difference be under the source electrode 9 or the drain electrode 10, and thus the influence on the FET characteristics due to the etching of the operating layer 2 can be avoided.

In this embodiment, the method of manufacturing the MESFET having a single gate finger has been described. However, in the case of a high output FET in which a plurality of gate fingers are arranged in parallel at intervals of 15 to 30 μm. , A dummy opening is arranged close to the outermost opening of the plurality of parallel recess forming openings. At this time, the interval between the recess forming opening and the dummy opening is set to be the same as the interval between the recess forming openings so that the recess formed at the outermost portion and the recess formed therebetween have the same shape. Can be

2 (a) to 2 (c) are sectional views showing steps in order to explain the second embodiment of the present invention.

First, as shown in FIG. 2A, C is formed on the entire upper surface of the operating layer 2 formed on the semi-insulating GaAs substrate 1.
After depositing an insulating film 11 made of SiO ₂ by the VD method, a photoresist film 12 is applied and patterned,
The opening 13 is formed.

Next, as shown in FIG. 2B, the insulating film 11 is etched by a wet etching method using buffered hydrofluoric acid using the photoresist film 12 as a mask to form an opening 14 having a width of 2 μm. Form.

Next, as shown in FIG. 2C, the opening 1
The photoresist film 3 is applied to the surface including 4 and patterned to form a recess forming opening 4a located on the opening 14 of the insulating film 11 and a dummy opening 4b located on the insulating film 11. To do. At this time, the size of the recess forming opening 4a is 1 μm, the size of the dummy opening 4b is 1 μm, and the distance between the recess forming opening 4a and the dummy opening 4b is 5 μm.

Next, using the photoresist film 3 as a mask, the operating layer 2 is etched to a depth of 50 nm by a wet etching method using sulfuric acid and hydrogen peroxide,
Form a recess structure.

In this embodiment, since the operating layer 2 under the dummy opening is protected by the insulating film 11 when the recess is formed, only the recess structure is formed.

[0027]

As described above, according to the present invention, the dummy openings are arranged close to both outsides of the single or plural parallel recess forming openings formed in the photoresist film. Since the tensile stress applied to the opening end of the film is reduced and the stress is uniformized, the adhesiveness of the photoresist film is improved and made uniform, and as a result, side etching when wet etching is performed is prevented, which is good. Recesses with various shapes and uniform dimensions are obtained.
In ESFET, characteristics such as breakdown voltage are stabilized.

Further, even when the gates are arranged close to each other on a substrate such as a high-power FET or IC, a MESFET having uniform characteristics can be obtained.

[Brief description of drawings]

1A to 1D are cross-sectional views showing a process sequence for explaining a first embodiment of the present invention.

2A to 2D are sectional views showing a process sequence for explaining a second embodiment of the present invention.

FIG. 3 is a sectional view showing a first example of a conventional semiconductor device.

FIG. 4 is a sectional view showing a second example of a conventional semiconductor device.

[Explanation of symbols]

 1 Semi-insulating GaAs substrate 2 Working layer 3, 12, 21 Photoresist film 4a, 6, 13, 14, 14, 22, 23 Opening part 4b Dummy opening 5, 8, 11 Insulating film 7 Gate 9 Source electrode 10 Drain electrode

Claims (2)

(57) [Claims] 1. A single or a plurality of parallel recess forming openings and both outsides of the recess forming openings, which are formed by applying a photoresist film on an operating layer formed on a semi-insulating semiconductor substrate and patterning the photoresist film. A method of manufacturing a semiconductor device, the method comprising: forming a dummy opening disposed in close proximity to a substrate; and forming a recess by wet etching the surface of the operation layer using the photoresist film as a mask. . 2. A step of forming an insulating film on an operating layer formed on a semi-insulating semiconductor substrate, and a step of selectively etching the insulating film to expose a surface of a recess forming region of the operating layer. And coating a photoresist film on the exposed surface including the operating layer to form an opening for forming a recess on the exposed operating layer, and insulating the insulating material on both sides of the opening for forming the recess. A method of manufacturing a semiconductor device, comprising: a step of forming a dummy opening on the film; and a step of forming a recess by wet etching the surface of the operation layer using the photoresist film and the insulating film as a mask.