JP2551795B2 - IC test equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention supplies a digital pattern from a digital pattern generating section to an IC element under test, takes the output of the IC element under test into a measuring section, and measures the measured value. The present invention relates to an IC test device that processes data taken in by a data processing unit.

[Prior Art] In a conventional IC test apparatus, as shown in FIG. 2, an analog waveform from an analog waveform generator 11 is supplied to an IC element under test 12, or a digital pattern from a digital pattern generator 13 is a waveform formatter. It is supplied to the IC element under test 12 through 14. The output of the IC device under test 12 is the time interval measuring unit 16 of the measuring unit 15, the waveform acquisition unit 17, or the buffer memory.
Taken in 18. The data given to the measuring unit 15 is processed by the data processing unit 19.

The signal from the control unit 21 that enables the acquisition is the measurement unit 15
When the data acquisition start signal is supplied from the digital pattern generating section 13 to the measuring section 15 in the state of being supplied to the measuring circuit 15, the output digital data of the IC element under test 12 is stored in the buffer memory 18
Be taken into. When the data processing start command is input from the control unit 21 to the data processing unit 19, the data processing unit 19 starts data processing.

Conventionally, the control unit 21 starts processing for each unit,
I managed everything such as waiting for processing. Therefore, the processing program basically has to be in a sequential format, and it is difficult to increase the overall processing speed.

[Means for Solving Problems] According to the present invention, an event matrix is provided, and the event matrix receives an input terminal to which a trigger signal from the digital pattern generating unit is input and an end signal from the measuring unit. It has an input terminal, an output terminal for giving a measurement start instruction to the measuring section, and an output terminal for giving a data processing start instruction to the data processing section.The input terminal and the output terminal are arbitrarily set by a command from the control section. Connection is possible.

As described above, according to the present invention, each unit is connected through the event matrix, and the processing procedure of each unit is quickly performed by hardware.

[Embodiment] FIG. 1 shows an embodiment of the present invention, in which parts corresponding to those in FIG. 2 are designated by the same reference numerals. In the present invention, an event matrix 23 is provided. The event matrix 23 has an input terminal 25 to which a timing trigger signal from the internal sync signal generator 24 of the digital pattern generator 13 is input and an input terminal to which a periodic signal from the analog waveform generator 11 is input.
26, an input terminal 27 to which an end signal is input from the measuring unit 15, an input terminal 28 to which a clock is input, and an input terminal 31 to which the output of the timer 29 is input, and this event matrix
23 is an output terminal 32 for outputting a signal for activating the analog waveform generator 11, an output terminal 33 for outputting a signal for activating the digital pattern generator 13, an output terminal 34 for giving a measurement start instruction to the measuring unit 15, An output terminal 35 for giving a data processing start instruction to the data processing section 19 and an output terminal 36 for giving an output to the timer 29 are provided.

The input terminal and the output terminal of the event matrix 23 are appropriately connected, but the connection state is changed by an instruction given from the control unit 21 to the controller 38, or by a command from the output terminal 37 of the event matrix 23. Be changed.

With this configuration, for example, when a timing trigger signal from the digital pattern generator 13 is applied to the input terminal 25 of the event matrix 23, its output terminal
A start signal is generated at 32, and the analog waveform generating section 11 is started. The analog waveform from the analog waveform generator 11 is supplied to the IC device under test 12, and the analog waveform generator 11
The periodic signal from is input to the input terminal 26 of the event matrix 23 and the measurement start command is output to the output terminal 34,
The output of the IC device under test 12 is captured by the waveform capturing section 17 of the measuring section 15. When the capture is completed, a capture end signal is input from the measurement unit 15 to the input terminal 27 of the event matrix 23, a data processing start command is output to the output terminal 35, and the data processing unit 19 starts data processing.

Conventionally, the control unit 21 issued a command one by one, but according to the present invention, the processing is sequentially performed by the hardware through the event matrix 23. Event matrix 23
In the case of delaying the processing in, the output from the event matrix 23 to the timer 29 may be output, and the output from the timer 29 may be input to the event matrix 23 again. The control unit 21 sets the state of the event matrix 23 according to a certain test so that the processing is performed in a predetermined procedure. Event matrix
The output of the output terminal 37 of 23 can be input to the controller 38 to change the connection state of the event matrix 23. For example, when the measuring unit 15 has a plurality of acquisition units and the acquisition to one unit is completed, the completion signal is input to the controller 38 through the event matrix 23, and the next acquisition is performed to the second unit. You can choose to be invited.

"Effects of the Invention" As described above, in the past, the control unit issued a processing command to each unit one by one, but according to the present invention, the control unit 21 sets in the event matrix 23 what test is to be performed. For example, the sequential processing of each unit is performed by hardware through the event matrix 23. Therefore, according to the present invention, the overall processing speed can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an example of an IC test apparatus according to the present invention, and FIG. 2 is a block diagram showing a conventional IC test apparatus.

Claims (1)

(57) [Claims] 1. A digital pattern from a digital pattern generating section is supplied to an IC element under test, the output of the IC element under test is taken into a measuring section, and the data taken into the measuring section is processed by a data processing section. In the IC test apparatus, an input terminal to which the trigger signal from the digital pattern generation unit is input, an input terminal to which an end signal from the measurement unit is input, and an output terminal that gives a measurement start instruction to the measurement unit, It has an output terminal for giving an instruction to start data processing to the data processing section, and the input terminal and the output terminal are provided with an event matrix which can be arbitrarily connected by a command from the control section. IC test equipment.