JP2555874B2 - Resist pattern simulation method - Google Patents
Resist pattern simulation methodInfo
- Publication number
- JP2555874B2 JP2555874B2 JP63130939A JP13093988A JP2555874B2 JP 2555874 B2 JP2555874 B2 JP 2555874B2 JP 63130939 A JP63130939 A JP 63130939A JP 13093988 A JP13093988 A JP 13093988A JP 2555874 B2 JP2555874 B2 JP 2555874B2
- Authority
- JP
- Japan
- Prior art keywords
- dissolution rate
- resist
- resist pattern
- exp
- concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置製造のリソグラフィー工程におけ
るレジストパターンのシミュレーション方法に関する。The present invention relates to a method for simulating a resist pattern in a lithography process for manufacturing a semiconductor device.
従来この種のレジストパターンのシミュレーション方
法としては、アイ、イー、イー、イー・トランサクショ
ンズ・オン・エレクトロン・デバイシス(IEEE Transac
tions on Electron Devices)誌、第ED−26巻,第4号,
4月,1979年,第717頁〜第722頁に開示されているSAMPLE
が広く用いられてきた。この種のシミュレーションプロ
グラムではレジスト膜の溶解速度特性を記述するモデル
としては、アイ、イー、イー、イー・トランサクション
ズ・オン・エレクトロン・デバイシス(IEEE Transacti
ons on Electron Devices)誌、第ED−22巻,第7号,7
月,1975年,第445頁〜第452頁に開示されているディル
(Dill)の式 R(M)=exp(E1+E2M+E3M2) が用いられてきた。ここでRは溶解速度、Mはインヒビ
ター濃度、E1,E2,E3はレジストによってフィッティング
する定数である。Conventionally, as a method for simulating a resist pattern of this type, there have been known methods such as eye, e, e, eTransactions on electron device (IEEE Transac).
tions on Electron Devices), Volume ED-26, No. 4,
April, 1979, SAMPLE disclosed on pages 717-722
Has been widely used. In this type of simulation program, as a model for describing the dissolution rate characteristic of the resist film, i, e, e, and eTransactions on electron devices (IEEE Transacti
ons on Electron Devices), Vol. ED-22, No. 7, 7
Dill's formula R (M) = exp (E 1 + E 2 M + E 3 M 2 ) disclosed in Mon, 1975, pp. 445-452 has been used. Here, R is the dissolution rate, M is the inhibitor concentration, and E 1 , E 2 , and E 3 are constants fitted by the resist.
上述した従来のレジストパターンのシミュレーション
方法は、溶解速度式として溶解速度が単に2次の多項式
で表現されているものを使用しているため、実際のレジ
スト膜の溶解速度特性に対応していない場合があるとい
う欠点があった。In the above-described conventional resist pattern simulation method, since the dissolution rate expression is simply expressed by a quadratic polynomial, it is not possible to correspond to the actual dissolution rate characteristics of the resist film. There was a drawback that there is.
特に近年デバイス寸法の微細化に対応して、レジスト
の解像度を向上させるために、後述する様に溶解速度R
(M)の変化量が大きく、かつ複雑になってくると、従
来のディルの式では全く現象に対応していないという場
合がほとんどであり、従って、最近のレジストパターン
の形状シミュレーションが行えないという欠点があっ
た。In particular, in order to improve the resolution of the resist in response to the miniaturization of device dimensions in recent years, as described later, the dissolution rate R
When the amount of change in (M) becomes large and becomes complicated, it is almost the case that the conventional Dill's formula does not correspond to the phenomenon at all, and therefore, the recent resist pattern shape simulation cannot be performed. There was a flaw.
本発明のレジストパターンのシミュレーション方法
は、半導体装置構造のリソグラフィー工程におけるレジ
ストパターンのシミュレーションプログラムに関し、レ
ジスト膜の現像液中での溶解速度Rをレジスト中の規格
化したインヒビタ濃度Mと反応生成物濃度P(=1−
M)の関数として表す際、前述したノボラック中にイン
ヒビタだけが濃度Mだけ混入している場合の溶解速度RI
(M)および反応生成物だけが濃度Pだけ混入している
場合の溶解速度RE(P)とノボラックベース単体の溶解
速度RBの間に (0M1,P=1−M) なる関係が成立することを利用し、RE,RIの実験式とし
て、 RE(P)=exp{E1+E2P+E3P2} E1,E2,E3は定数 Rn=exp(anM+bn) n=1,2,3 an,bnは定数 なる式を用いて溶解速度特性R(M)を記述するという
ものである。A resist pattern simulation method according to the present invention relates to a resist pattern simulation program in a lithography process of a semiconductor device structure, wherein a dissolution rate R of a resist film in a developing solution is a normalized inhibitor concentration M and a reaction product concentration in a resist. P (= 1-
When expressed as a function of M), the dissolution rate R I when only the inhibitor is mixed in the novolak at the concentration M
(M) and between the dissolution rate R E (P) when only the reaction product is mixed in the concentration P and the dissolution rate R B of the novolac base alone By using the fact that the relation (0M1, P = 1-M) is established, as an empirical formula of R E , R I , R E (P) = exp {E 1 + E 2 P + E 3 P 2 } E 1 , E 2 and E 3 are constants R n = exp (a n M + b n ) n = 1,2,3 a n , b n is to describe the dissolution rate characteristic R (M) using an equation of a constant.
本発明のレジストパターンのシミュレーション方法
は、インヒビタ濃度Mおよび反応生成物濃度Pの関数と
して表わした溶解濃度R(M,P)(インヒビタと反応生
成物がレジスト中に混在する場合)に対するインヒビタ
濃度Mと反応生成物濃度P(=1−M)の効果を検討し
た結果より得られたものである。第2図はレジストのノ
ボラックベース単体の溶解速度RBに対して、ノボラック
中にインヒビタだけが濃度Mだけ混入している場合の溶
解速度RI(M)(P=0),および反応生成物だけが濃
度Pだけ混入している場合の溶解速度RE(P)(M=
0)を示している。通常のリソグラフィ工程の様にノボ
ラックベース中にインヒビタと反応生成物が混在する場
合、溶解速度R(M,P)はRE(P)とRI(M)両者の積
として なる関係式が成立することを見い出した。The resist pattern simulation method of the present invention is based on the inhibitor concentration M with respect to the dissolution concentration R (M, P) (when the inhibitor and the reaction product are mixed in the resist) expressed as a function of the inhibitor concentration M and the reaction product concentration P. And the result of examining the effect of the reaction product concentration P (= 1-M). Figure 2 shows the dissolution rate R B of the resist novolak base alone, the dissolution rate R I (M) (P = 0), and the reaction product when only the inhibitor is mixed in the novolac at a concentration M. Dissolution rate R E (P) (M =
0) is shown. When the inhibitor and reaction product are mixed in the novolac base as in the ordinary lithography process, the dissolution rate R (M, P) is the product of both R E (P) and R I (M). We found that the following relational expression holds.
さらにRE(P)およびRI(M)実験式として、第2図
により、 RE(P)=exp{E1+E2P+E3P2} E1,E2,E3は定数 ここでRn(M)=exp(anM+bn) n=1,2,3 an,bnは定数 なる実験式で記述できることがわかった。Further, as an empirical formula for R E (P) and R I (M), according to FIG. 2, R E (P) = exp {E 1 + E 2 P + E 3 P 2 } E 1 , E 2 , and E 3 are constants. Here, it was found that R n (M) = exp (a n M + b n ) n = 1,2,3 a n , b n can be described by an empirical formula that is a constant.
本発明では前述した、溶解現象に基づく溶解速度式を
用いることにより、従来モデルでは不可能であった高解
像レジストの溶解速度特性が容易に記述でき、従ってSA
MPLEシミュレーションが可能である。In the present invention, by using the above-described dissolution rate equation based on the dissolution phenomenon, it is possible to easily describe the dissolution rate characteristic of a high resolution resist, which was impossible with the conventional model, and therefore SA
MPLE simulation is possible.
次に本発明について図面を参照して説明する。第1図
は本発明の第1の実施例である高解像レジストAの溶解
速度を示す特性図である。第1図における○印はレジス
トAの溶解速度の測定値であり実線は より求めた計算値である。ここで用いたRE,RIは実験に
より第2図のように求まっており、それぞれ、実験式 RE(1−M)=exp{−1.19+4.98(1−M)+ 4.23(1−M)2} (μm/sec) ただし R1(M)=exp{−3.89M+4.25) R2(M)=exp{−41.5M+1.75) R3(M)=exp{−1.81M+0.442) によって表されている。またRBは7×10-3(μm/sec)
である。第1図から本発明による溶解速度式が測定値と
極めて良く一致していることがわかる。Next, the present invention will be described with reference to the drawings. FIG. 1 is a characteristic diagram showing the dissolution rate of the high resolution resist A according to the first embodiment of the present invention. The circles in Fig. 1 are the measured values of the dissolution rate of resist A, and the solid line is This is the calculated value. The R E and R I used here have been experimentally obtained as shown in FIG. 2, and the empirical formulas R E (1-M) = exp {−1.19 + 4.98 (1-M) +4.23 (1 -M) 2 } (μm / sec) However, R 1 (M) = exp {−3.89M + 4.25) R 2 (M) = exp {−41.5M + 1.75) R 3 (M) = exp {−1.81M + 0.442) R B is 7 × 10 -3 (μm / sec)
Is. It can be seen from FIG. 1 that the dissolution rate equation according to the present invention matches the measured values very well.
第3図(a)〜(c)は本発明の溶解速度式をSAMPLE
シミュレータに導入することによって、得られたレジス
トパターン形状である。露光はUVg線を190mJ/cm2照射
し、現像はテトラメチルアンモニウムハイドロオキサイ
ド(TMAH)水溶液中で1分間行なった場合について示し
た。もちろん他の露光,現像条件におけるレジストパタ
ーン形状も容易にシミュレーション可能である。このよ
うなシミュレーション結果に基づいて最適のレジストを
選定しプロセス設計を効率よく行なうことができる。3 (a) to 3 (c) show the dissolution rate equation of the present invention as SAMPLE.
This is the resist pattern shape obtained by introducing it into the simulator. The exposure was performed by irradiating with UVg rays of 190 mJ / cm 2 and the development was performed in an aqueous solution of tetramethylammonium hydroxide (TMAH) for 1 minute. Of course, it is possible to easily simulate the resist pattern shape under other exposure and development conditions. The optimum resist can be selected based on such a simulation result, and the process design can be efficiently performed.
第4図は本発明の第2の実施例である他の高解像レジ
ストBの溶解速度を示す特性図である。第4図における
○印はレジストBの溶解速度の測定値であり、実線は より求めた計算値である。ここで用いたRE,RIは実験に
より RE(1−M)=exp{−1.19+2.99(1−M) +2.54(1−M)2} (μm/sec) ただし R1(M)=exp{−2.33M+4.25) R2(M)=exp{−24.9M+1.75) R3(M)=exp{−1.09M+0.442) なる実験式で表わされる。またRBは7×10-3(μm/se
c)である。FIG. 4 is a characteristic diagram showing the dissolution rate of another high resolution resist B which is the second embodiment of the present invention. The circles in FIG. 4 are the measured values of the dissolution rate of resist B, and the solid line is This is the calculated value. The R E and R I used here are R E (1-M) = exp {-1.19 + 2.99 (1-M) +2.54 (1-M) 2 } (μm / sec) However, R 1 (M) = exp {−2.33M + 4.25) R 2 (M) = exp {−24.9M + 1.75) R 3 (M) = exp {−1.09M + 0.442) R B is 7 × 10 -3 (μm / se
c).
第5図(a)〜(c)は第4図の溶解速度式R(M)
を用いてシミュレーションプログラムSAMPLEによりレジ
ストパターン形状のシミュレーションを行なった結果を
示す特性図である。露光条件はUVg線,180mJ/cm2,現像時
間は60秒である。もちろん本発明はシミュレータSAMPLE
にのみ有効なわけではなく、その他のリソグラフィーシ
ミュレータ例えば、エス・ピー・アイ・イー(SPIE)
誌,第538巻,1985年,第207頁〜220頁に記載の論文,オ
プティカル・マイクロリソグラフィIV(Optical Microl
ithography IV)に述べられているPROLITHにも適用でき
ることは明らかである。5 (a) to 5 (c) are dissolution rate equations R (M) of FIG.
FIG. 6 is a characteristic diagram showing a result of simulating a resist pattern shape with a simulation program SAMPLE using. The exposure conditions are UVg rays, 180 mJ / cm 2 , and the development time is 60 seconds. Of course, the present invention is a simulator SAMPLE
Not only valid for other lithography simulators, such as SPE (SPIE)
Journal, Volume 538, 1985, pp. 207-220, Optical Microlithography IV (Optical Microl
It is clear that it can also be applied to PROLITH described in ithography IV).
以上説明したように本発明は、半導体製造工程の特に
リソグラフィ工程のシミュレーションを行なうプログラ
ムにおいて、溶解速度Rをレジストの規格化したインヒ
ビター濃度Mで表す際、Rのインヒビタ濃度依存性R
I(M)と、Rの反応生成物依存性RE(1−M)、およ
び、ボラックベース単体の溶解速度RBの間に なる関係が成立することを利用し、RE,RIの実験式とし
て RE(1−M) =exp{E1+E2(1−M)+E3(1−M)2} E1,E2,E3は定数 ただしRn(M)=exp(anM+bn) n=1,2,3 an,bnは定数 なる式を用いることによって、近年開発されたあらゆる
高解像レジストの溶解速度特性をリソグラフィーシミュ
レータに容易に取り入れることができ、その結果レジス
トの形状シミュレーションが有効かつ適切にできるの
で、プロセス設計が容易に行える効果がある。As described above, according to the present invention, when the dissolution rate R is represented by the standardized inhibitor concentration M of the resist in the program for simulating the semiconductor manufacturing process, particularly the lithography process, the inhibitor concentration dependence R of R
Between I (M) and R E (1-M), the reaction product dependence of R, and the dissolution rate R B of the simple substance of the volac base. The relationship is utilized to establish, R E, R E as empirical formula of R I (1-M) = exp {E 1 + E 2 (1-M) + E 3 (1-M) 2} E 1, E 2 and E 3 are constants However, R n (M) = exp (a n M + b n ) n = 1,2,3 a n , b n is a constant. It can be easily incorporated into a simulator, and as a result, resist shape simulation can be performed effectively and appropriately, which has the effect of facilitating process design.
第1図は本発明の第1の実施例であるレジストAに対す
る溶解速度を示す特性図、第2図は第1図の溶解速度式
に用いたRE,RIの特性図であり、第3図(a)〜(c)
は第1図の溶解速度式を用いてレジストAの形状シミュ
レーションを行なった結果を示す特性図、第4図は本発
明の第2の実施例のレジストBに対する溶解速度を示す
特性図、第5図(a)〜(c)は第4図を用いてレジス
トBの形状シミュレーションを行なった結果を示す図で
ある。FIG. 1 is a characteristic diagram showing the dissolution rate for resist A which is the first embodiment of the present invention, and FIG. 2 is a characteristic diagram of R E and R I used in the dissolution rate equation of FIG. Figure 3 (a) ~ (c)
Is a characteristic diagram showing the result of shape simulation of resist A using the dissolution rate equation of FIG. 1, FIG. 4 is a characteristic diagram showing dissolution rate of resist B in the second embodiment of the present invention, and FIG. FIGS. 9A to 9C are diagrams showing the results of shape simulation of the resist B using FIG.
Claims (2)
けるレジストパターンのシミュレーション方法に関し、
レジスト膜の原像液中での溶解速度Rをレジスト中の規
格化したインヒビタ濃度Mと反応生成物濃度P(=1−
M)の関数として表す際、溶解速度Rのインヒビタ濃度
依存性RI(M)と溶解速度Rの反応生成物濃度依存性RE
(P)およびノボラックベース単体の溶解速度RBを用い
て (0M1,P=1−M) なる式を用いてシミュレーションすることを特徴とする
レジストパターンのシミュレーション方法。1. A method of simulating a resist pattern in a lithography process of a semiconductor device structure,
The dissolution rate R of the resist film in the original image liquid is determined by standardizing the inhibitor concentration M and the reaction product concentration P (= 1-
When expressed as a function of M), dissolution rate R depends on inhibitor concentration R I (M) and dissolution rate R depends on reaction product concentration R E
(P) and the dissolution rate R B of the novolac base alone (0M1, P = 1-M) A method of simulating a resist pattern, which is characterized in that a simulation is performed using the formula:
を用いることを特徴とする請求項1記載のレジストパタ
ーンのシミュレーション方法。2. R E (P) = exp (E 1 + E 2 P + E 3 P 2 ) as R E (P) and R I (M) However, R n (M) = exp (a n M + b n ), n = 1,2,3 where E 1 , E 2 , E 3 , a n , b n are characterized by using empirical formulas that are fitting constants. The method for simulating a resist pattern according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63130939A JP2555874B2 (en) | 1988-05-27 | 1988-05-27 | Resist pattern simulation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63130939A JP2555874B2 (en) | 1988-05-27 | 1988-05-27 | Resist pattern simulation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01300253A JPH01300253A (en) | 1989-12-04 |
| JP2555874B2 true JP2555874B2 (en) | 1996-11-20 |
Family
ID=15046218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63130939A Expired - Lifetime JP2555874B2 (en) | 1988-05-27 | 1988-05-27 | Resist pattern simulation method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2555874B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3087675B2 (en) * | 1997-02-06 | 2000-09-11 | 日本電気株式会社 | Post bake simulation method |
| CN113094866B (en) * | 2021-02-25 | 2022-08-26 | 全芯智造技术有限公司 | Simulation method of semiconductor process |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01188859A (en) * | 1988-01-22 | 1989-07-28 | Matsushita Electric Ind Co Ltd | Resist shape simulation method |
| JPH01209723A (en) * | 1988-02-17 | 1989-08-23 | Nec Corp | Simulation method for resist pattern |
-
1988
- 1988-05-27 JP JP63130939A patent/JP2555874B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01300253A (en) | 1989-12-04 |
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