JP2556723B2 - Quantizer - Google Patents

Description

The present invention relates to a quantizer that performs noise shaping processing of a noise shaping type A / D, D / A converter, and a high gain by varying the gain of the quantizer. It is intended to improve accuracy.

"Conventional Technology" The conventional technology will be explained using a D / A converter. The A / D converter is technically the same except that the constituent elements (integrator, adder, etc.) are analog circuits. When a conventional D / A converter using a counting type or weighting network is used as a variable gain, as shown in FIG. All I had to do was input the output of circuit 13 to 14. Here, 11 is a digital input and 12 is an analog output.

FIG. 11 shows the configuration of a Δ−Σ type D / A converter which is generally well known as a noise shaping type D / A converter, and the digital input 11 is a digital subtraction inside the Δ−Σ quantizer 20. Input to the digital integrator 22 and its output is the digital integrator 22.
The output of the integrator 22 is converted into a low-bit digital value by the digital comparator 23, and the converted output is supplied to the digital subtractor 21 and the D / A for converting the low-bit digital value into an analog value. It is supplied to the converter 24.

FIG. 12 shows the addition of the variable n-fold circuit 13 to the input of the Δ-Σ type D / A converter shown in FIG.

[Problems to be Solved by the Invention] Consider the operation of the variable n-fold circuit 13 in FIG. In the noise shaping quantizer 20, the output of the integrator 22 is quantized by the digital comparator 23, and then the quantized value is negatively fed back to the integrator 22 by subtraction. Then, the quantizing noise generated in the digital comparator 23 is integrated in the integrator 22, and this is added to the next input, and further quantized, so that the quantizing noise has a characteristic opposite to the integral characteristic and high frequency. Distribute the quantization noise in the region. Therefore, if the input value is changed to n times the scaling factor during operation of the quantizer, the quantization noise before the scaling factor remains in the integrator 22 at the time of the change, whereas the input value is changed to the input value. Since the data in which the magnification is changed comes in, the difference in the magnification remains in the integrator 22 as an error, which causes noise. If the input data X is expressed as 2X when the gain of the quantizer 22 is 2, the quantizer from the initial state to the (n-1) th quantizer
The error in the integrator 22 when the gain of 20 is 1 and the data is input is (X: quantizer input, Y: quantizer output)
Similarly, the error in the integrator 22 when the gain of the quantizer 20 is 2 from the initial state and the data comes in is Becomes Here, the error in the integrator 22 when the quantization gain is 1 from the initial state to the n-1th and the gain is 2 from the nth to the n + mth is Is. However, in order to perform normal noise shaping, the error of the (n + m) th integrator 22 must appear as if the gain of the quantizer 20 was 2 from the initial state to the (n + m) th, and its amount is Must be because of this Occurs as an extra error in the integrator 22, which causes S /
Deteriorate N.

Therefore, the conventional technique has not been able to realize a highly accurate variable gain quantizer.

An object of the present invention is to provide a noise shaping type variable gain quantizer which eliminates an error generated in an integrator at a gain change point.

[Means for Solving the Problem] According to the first aspect of the present invention, the first circuit that multiplies the input signal by A times (A is a real number), and when A of the first circuit is changed, is integrated in the integrator. And a second circuit for multiplying the analog value or the digital value by ΔA corresponding to the change in A.

According to the second aspect of the present invention, a first circuit for multiplying the output of the integrator by A is provided, and a second circuit for multiplying the output of the comparator by 1 / A and feeding back to the integrator is provided.

That is, according to the present invention, in order to eliminate the error generated in the integrator at the gain change point of the quantizer, the gain equal to the change amount of the quantizer is set to the integrator at the time of the gain change of the quantizer. By multiplying the error within, the error that occurs when the gain changes is completely eliminated.

"Embodiment" FIG. 1 shows an embodiment of the first invention. Digital input 11
Is multiplied by the multiplier A from the terminal 26 at the multiplier 25, the output of the multiplier 25 is supplied to the subtractor 21, the output of the subtractor 21 is supplied to the adder 27, and the output of the adder 27 is the comparator 23. The output of the comparator 23 is supplied to the quantizer output 28, which is supplied to the subtractor 21 via the 1-timing delay unit 29. The output of the adder 27 is supplied to the 1-timing delay device 31, the output of the delay device 31 is directly supplied to the terminal 1 of the selector 32, and the terminal 2 of the selector 32 is supplied via the multiplier 33.
Supplied to The multiplier 33 multiplies the multiplier ΔA from the terminal 34. Selector 32 selects terminal 1 or 2 from the control signal of terminal 35.
Is connected to the output terminal 3, and the output terminal 3 of the selector 32 is connected to the adder 27. When the input terminal 1 is connected to the output terminal 3 by the selector 32, the adder 27 and the delay device 31 are gain 1 integrators.
Works the same as 22. 1 Timing delay device 29,31 is D
Type flip-flop can be easily configured.

The operation of this circuit will be described. A is 1 and selector 32
When the input terminal 1 of 1 is connected to the output terminal 3, it operates as a normal gain shaping 1 noise shaping quantizer. Next, when changing the gain, the change amount ΔA of A is first set in the multiplier 33 of the integrator and multiplied by the error remaining in the integrator. Connect input terminal 2 of selector 32 to output terminal 3
The value multiplied by A is taken as the error in the new integrator. After this, the selector 32 connects the input terminal 1 to the output terminal 3. Thereafter, the input data multiplied by the gain A is integrated by the integrator, converted into a low bit digital value by the comparator 23, and the output is fed back to the integrator.

This will be described using equations (1) to (5). As in the description of the prior art, the condition is that the gain is 1 from the initial state to the n-1th data input, and the gain is 2 from the nth to n + mth data.

The error remaining in the integrator after processing the (n-1) th data is the same as equation (1). Is. However, after this, in the circuit of the present invention, the difference between the nth data input gain and the gain at the (n-1) th input is multiplied by the error in the integrator. Therefore, the gain difference in this case is 2. The error within Can be replaced by a new one. Next, a gain of 2 operates from the nth to the n + mth. Then, the extra error ΔN at the n + mth is Therefore, the extra error that occurs in the conventional technique does not occur. As a result, a highly accurate noise shaping type variable gain quantizer can be realized by using the present invention.

FIG. 2 is an example of a D / A converter using the present invention. 11
Is a digital input and 12 is an analog output. The quantizer 36 of the present invention is inserted into the input side of the D / A converter 14, and the analog variable attenuator 37 is inserted into the output side of the D / A converter 14. . The terminal 38 is a gain control input of the quantizer 36, and the terminal 39 is an attenuation amount control input of the attenuator 37.

In this circuit, when the input value becomes small, the terminal 38 is controlled, the gain is multiplied by the quantizer 36, it is D / A converted, and the gain applied by the quantizer 36 by the attenuator 37 to the analog value of the output. Apply the same amount of attenuation. Then, the noise generated by the D / A converter 14 is also attenuated by the attenuation of the attenuator 37, and the S / N is improved.

Figure 3 shows the improvement of this S / N. General D
The A / A converter 14 is S / N proportional to the input level as shown by the line 41.
Becomes smaller. However, using Fig. 2, the gain of the quantizer 36 is 2 when the input becomes -6 dB, the gain of the quantizer 36 is 4 when the input becomes -12 dB, and the gain when the input becomes -18 dB. When the attenuation amount of the attenuator 37 is equal to the gain, the S / N of the entire input / output characteristic is as shown by the line 42.

In this way, the gain is applied to the quantizer 36 and the signal is attenuated by the attenuator 37 added to the output of the D / A converter 14, so that the noise generated by the D / A converter itself is also attenuated and reduced. S / N higher than S / N of D / A converter 14 at the input level
It becomes possible to obtain N.

FIG. 4 shows a detailed embodiment of the present invention for application to a D / A converter, and parts corresponding to those in FIG. 1 are designated by the same reference numerals. The gain input 38 is fed directly to the subtractor 43 and is also fed through the 1 timing delay 44. Subtractor
The output of 43 is added by 1 in the adder 45 and supplied to the multiplier 33. Local quantizer 47 used in place of comparator 23
Converts the input digital signal into a low bit digital signal. The circuit 46 eliminates the selector 32 shown in FIG. 1 by generating ΔA + 1 for A input from the gain input terminal 38 and producing ΔA + 1. The operating principle of this circuit is the same as in FIG. As described above, the circuit of the present invention can be easily realized by the existing circuit. If only a power of 2 is entered in A, a bit shift circuit can be used for the multiplier 25.

FIG. 5 shows a detailed embodiment of the present invention for application to an A / D converter, and parts corresponding to those in FIG. 4 are designated by the same reference numerals. The analog input from the terminal 51 is input to a switched capacitor type input variable gain circuit 52 corresponding to the multiplier 25, the switch of the input variable gain circuit 52 is controlled by a switch control circuit 53, and a gain A is obtained with respect to the analog input. Is multiplied. The multiplication output is integrated by the integrator 54. The integrator 54 is configured as a variable gain integrator 55, controlled by the switch control circuit 56, and multiplied by ΔA + 1. The output of the integrator 55 is supplied to the comparator 23, and the output of the comparator 23 becomes the digital output 28 and the variable gain.
It is supplied to the D / A converter 57, and the output of the D / A converter 57 is the integrator 54.
Returned to. The switch of the D / A converter 57 is controlled by the switch control circuit 58 based on the digital output 28 and the gain input A. In this circuit, the gain input A can be changed to 1,2,3,4.

The operating principle of this circuit is the same as in FIG. Thus, the present invention can be implemented as an A / D converter by combining a simple switched capacitor circuit.

FIG. 6 shows an embodiment of the second invention, and parts corresponding to those in FIG. 1 are designated by the same reference numerals. In this example, the output of the integrator 61 is multiplied by A in the multiplier 62 and supplied to the comparator 23. The output of the comparator 23, that is, the local quantizer is multiplied by the multiplier 63.
It is multiplied by 1 / A and returned to the subtracter 21. In this case (1)
When the extra error ΔN at the (n + m) th is calculated using the equation (5), And no noise is generated.

FIG. 7 shows an example in which the present invention is applied to a D / A conversion quantizer, and parts corresponding to those in FIGS. 4 and 6 are designated by the same reference numerals.

FIG. 8 shows an example in which the second invention is applied to a quantizer for A / D conversion, and parts corresponding to those in FIG. 5 are designated by the same reference numerals. The analog input from the terminal 51 is supplied to the integrator 54 through the switched capacitor circuit 65, and the output of the integrator 54 is supplied to the analog multiplier 66. The analog multiplier 66 is controlled by the switch control circuit 67 according to the gain input A at the terminal 38, and performs 1 ×, 2 ×, 3 ×, and 4 × analog multiplication. The output of the analog multiplier 66 is supplied to the comparator 23.
The D / A converter 57 that feeds back the output of the comparator 23 is controlled by the switch control circuit 58 by the output of the comparator 23 and 1 / A. The analog multiplier 66 may be configured as a variable attenuator as shown in FIG. 9 in addition to the variable gain amplifier.

If the comparator 23 is a binary comparator that determines whether the input is larger or smaller than 0 level, the analog multiplier 66 is not necessary.

[Advantages of the Invention] As described above, the use of the present invention has a feature that a quantizer of a noise shaping system can be made to have a variable gain with high accuracy.

Further, the use of the configuration as shown in FIG. 2 has a feature that it is possible to obtain S / N characteristics higher than those of the D / A converter used. Further, in the circuit of the present invention, if the variable gain is limited to a power of 2, multiplication can be realized only by bit-shifting data, a multiplier is not required, and the circuit is small and suitable for LSI implementation.

[Brief description of drawings]

1 is a block diagram showing an embodiment of the first invention, FIG. 2 is a block diagram showing a D / A converter using the circuit shown in FIG. 1, and FIG. 3 is a D / A shown in FIG. FIG. 4 is a characteristic diagram of a converter, FIG. 4 is a block diagram showing an example in which the first invention is applied to a D / A conversion quantizer, and FIG. 5 is a block diagram showing the first invention applied to an A / D conversion quantizer. FIG. 6 is a circuit diagram showing an example, FIG. 6 is a block diagram showing an embodiment of the second invention, FIG. 7 is a block diagram showing an example in which the second invention is applied to a quantizer for D / A conversion, FIG. FIG. 9 is a circuit diagram showing an example in which the second invention is applied to a quantizer for A / D conversion, FIG. 10 is a block diagram showing a conventional variable gain D / A converter, and FIG. Noise shaping quantizer and D /
FIG. 12 is a block diagram in which an A converter is combined, and FIG. 12 is a block diagram in which a conventional variable gain noise shaping quantizer and a D / A converter are combined.

Claims (2)

(57) [Claims] 1. An analog / digital input signal is integrated by an integrator, the integrated output is quantized by a comparator, and the comparator output is negatively fed back to the integrator to distribute quantization noise in a high frequency region. In a noise shaping quantizer for D conversion or D / A conversion, a first circuit that multiplies an input signal by A (A is a real number) and an integration in the integrator when A of the first circuit changes And a second circuit that multiplies the calculated value by a change amount of A, ΔA. 2. An analog / digital input signal is integrated by an integrator, the integrated output is quantized by a comparator, and the comparator output is negatively fed back to the integrator to distribute quantization noise in a high frequency region. In the noise shaping quantizer for D converter or D / A converter, a first circuit for multiplying the integrator output by A and a second circuit for multiplying the comparator output by 1 / A and feeding back to the integrator. And a quantizer.