JP2562870B2 - Phototransistor signal detector - Google Patents
Phototransistor signal detectorInfo
- Publication number
- JP2562870B2 JP2562870B2 JP60200532A JP20053285A JP2562870B2 JP 2562870 B2 JP2562870 B2 JP 2562870B2 JP 60200532 A JP60200532 A JP 60200532A JP 20053285 A JP20053285 A JP 20053285A JP 2562870 B2 JP2562870 B2 JP 2562870B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- phototransistor
- signal
- voltage signal
- emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000010586 diagram Methods 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は，応答速度の速い，フオトトランジスタの
信号検出器に関するものである。The present invention relates to a phototransistor signal detector having a high response speed.
フオトトランジスタを使用した信号検出器として第３
図に示すようなものが知られている。すなわち，第３図
（ａ）に示すようにフオトトランジスタ１のコレクタ，
エミツタに抵抗R1,RLを接続したもの，第３図（ｂ）に
示すようにフオトトランジスタ１のコレクタ，エミツタ
に抵抗R1,RLを接続し，フオトトランジスタ１と抵抗RL
をツエナーダイオードでバイパスしたものである。いず
れも，抵抗RLの両端の出力電圧を信号として検出するも
のである。また，フオトトランジスタ１の受光量を増加
していくとフオトトランジスタ１は飽和領域に達し電圧
Vceを発生する。電源電圧をVcc,ツエナー電圧をVzとす
ると，抵抗RLの出力電圧Voutの最大値は，第３図（ａ）
で（Vcc−Vce）×RL÷（R1＋RL），第３図（ｂ）でVz−
Vceである。そして，出力電圧Voutの最大値を電源電圧V
ccに対して任意の電圧で制限したい場合，抵抗R1または
ツエナー電圧Vzの値を変えることにより行っていた。Third as a signal detector using a phototransistor
The one shown in the figure is known. That is, as shown in FIG. 3A, the collector of the phototransistor 1,
The resistors R 1 and R L are connected to the emitter, the collector of the phototransistor 1 and the resistors R 1 and R L are connected to the emitter as shown in FIG. 3B, and the phototransistor 1 and the resistor R L are connected.
Is a bypass with a zener diode. In both cases, the output voltage across the resistor R L is detected as a signal. Further, as the amount of light received by the phototransistor 1 increases, the phototransistor 1 reaches the saturation region and the voltage
Generate Vce. When the power supply voltage is Vcc and the zener voltage is Vz, the maximum value of the output voltage Vout of the resistor R L is shown in Fig. 3 (a).
In in (Vcc-Vce) × R L ÷ (R 1 + R L), FIG. 3 (b) Vz-
Vce. Then, the maximum value of the output voltage Vout is the power supply voltage V
When it is desired to limit cc to any voltage, the value of resistor R 1 or zener voltage V z is changed.
第３図（ａ）においては第４図（ａ）に示すようにフ
オトトランジスタ１のコレクタ・ベース間には接合容量
Ccbが存在し，等価回路にて示した第４図（ｂ）のよう
に抵抗R1,RLと容量Ｃ（接合容量Ccb×電流増幅率hfe）
とが並列になり，抵抗RLに抵抗R1が加算された分だけ時
定数が大きくなつて出力電圧Voutの応答速度が遅くなつ
てしまうという問題点がある。また第３図（ｂ）におい
ては応答速度の改善にはなるが，出力電圧Voutの最大値
を5V以下に制限したい時には5V以下のツエナーダイオー
ドを必要とするため，ツエナーダイオードの電圧−電流
特性が悪くなつてしまい実用が難しいという問題点があ
る。In FIG. 3 (a), as shown in FIG. 4 (a), there is a junction capacitance between the collector and base of the phototransistor 1.
Ccb exists, and resistances R 1 and R L and capacitance C (junction capacitance Ccb × current amplification factor hfe) are shown in the equivalent circuit of Fig. 4 (b).
Since and become parallel, the time constant becomes large by the amount of addition of the resistance R 1 to the resistance R L, and the response speed of the output voltage Vout becomes slow. Also, in Fig. 3 (b), although the response speed is improved, when it is desired to limit the maximum value of the output voltage Vout to 5 V or less, a zener diode of 5 V or less is required, so the voltage-current characteristic of the zener diode is There is a problem that it becomes bad and it is difficult to put it into practical use.
この発明は，このような従来の技術の問題点を解決す
る目的でなされたものである。The present invention has been made for the purpose of solving the problems of the conventional techniques.
上記問題点を解決するための手段を，実施例に対応す
る第１図を用いて以下説明する。この発明は，フオトト
ランジスタ１のエミッタに信号検出用抵抗RLの一端を接
続し，その接続点にフオトトランジスタ１の受光量に応
じた電圧信号を得るフオトトランジスタの信号検出器に
おいて，フオトトランジスタ１のコレクタに電圧信号の
最大値を制限する電圧信号制限用トランジスタTrのエミ
ッタを接続して，電圧信号制限用トランジスタTrとフオ
トトランジスタ１と信号検出用抵抗RLとの直列回路を構
成し，電圧信号制限用トランジスタTrのコレクタを電源
電圧の一端に接続し，信号検出用抵抗RLの他端を電源電
圧の他端に接続し，電圧信号制限用トランジスタTrのベ
ース回路に，前記電圧信号の最大値を制限するベース電
圧設定回路を設けたことを特徴とするものである。Means for solving the above problems will be described below with reference to FIG. 1 corresponding to the embodiment. This invention relates to a phototransistor signal detector in which one end of a signal detection resistor R L is connected to the emitter of the phototransistor 1 and a voltage signal corresponding to the amount of light received by the phototransistor 1 is obtained at the connection point. The emitter of the voltage signal limiting transistor Tr that limits the maximum value of the voltage signal is connected to the collector of, and a series circuit of the voltage signal limiting transistor Tr, the phototransistor 1 and the signal detecting resistor R L is configured, The collector of the signal limiting transistor Tr is connected to one end of the power supply voltage, the other end of the signal detecting resistor RL is connected to the other end of the power supply voltage, and the base circuit of the voltage signal limiting transistor Tr is connected to the voltage signal It is characterized in that a base voltage setting circuit for limiting the maximum value is provided.
このように構成されたものにおいては，電圧信号制限
用トランジスタTrのベース電圧を可変すれば，フオトト
ランジスタ１の出力電圧Voutの最大値を簡単に調整でき
るので，第３図の抵抗R1が不要となる。また一般に電圧
信号制限用トランジスタTrのエミッタの出力インピーダ
ンスが非常に小さいがため，フオトトランジスタ１のコ
レクタにトランジスタTrのエミッタを接続したエミッタ
ホロワ接続では，上記の特性を生かすことができ（第２
図の場合，（R2R3）/hfeとなる。），第３図の抵抗R1
にあたる抵抗が小さくなるため，時定数の増加が非常に
少なく，応答速度が速くなる。また，この回路では，一
般的なトランジスタで良いため，応答速度が速い高価な
トランジスタを使用する必要がなく，部品選択の自由度
も向上する。In such a configuration, the maximum value of the output voltage Vout of the phototransistor 1 can be easily adjusted by changing the base voltage of the voltage signal limiting transistor Tr, so that the resistor R 1 in FIG. 3 is unnecessary. Becomes Moreover, since the output impedance of the emitter of the voltage signal limiting transistor Tr is generally very small, the above characteristics can be utilized in the emitter follower connection in which the emitter of the transistor Tr is connected to the collector of the phototransistor 1 (second
In the figure, it is (R 2 R 3 ) / hfe. ), Resistance R 1 in FIG. 3
Since the corresponding resistance becomes small, the increase in the time constant is very small and the response speed is fast. In addition, since a general transistor is sufficient in this circuit, it is not necessary to use an expensive transistor having a high response speed, and the degree of freedom in component selection is improved.
第１図はこの発明の一実施例を示す図である。第１図
においてTrは電圧信号制限用トランジスタで，そのコレ
クタは電源電圧Vccの電源に，そのエミツタはフオトト
ランジスタ１のコレクタに，そのベースは可変電圧Ｅの
電源を介してグランドGNDに接続されている。フオトト
ランジスタ１のエミツタは信号検出用抵抗RLを介してグ
ランドGNDに接続されている。電圧信号制限用トランジ
スタTr,フオトトランジスタ１及び信号検出用抵抗RLか
らなる直列回路には，電源電圧VccからグランドGNDに向
かってフオトトランジスタ１の受光量に応じた電流が流
れ，この電流に応じた電圧信号がフオトトランジスタ１
のエミッタと信号検出用抵抗RLとの接続点に発生する。
前記可変電圧Ｅは，ベース電圧設定回路であって，この
設定電圧によって前記電圧信号の最大値が制限される。
すなわち，電圧信号制限用トランジスタTrのベース・エ
ミツタ電圧をVbeとすると，信号検出用抵抗RLの出力電
圧Voutの最大値は,E−Vbe−Vceで与えられ，電圧信号制
限用トランジスタTrのベース電圧E,すなわち，可変電圧
Ｅを調整すれば自由に出力電圧Voutの最大値を調整でき
る。この結果，第３図の従来例に示す如くの抵抗R1が不
要になり，電圧信号制限用トランジスタTrのエミッタの
出力インピーダンスが非常に小さいことから，第３図
（ａ），（ｂ）に示す従来例と比べ応答速度が向上す
る。また，第３図（ｂ）に示す如くのツエナーダイオー
ドを用いた従来例では，ツエナー電圧が5V以下になる
と，電圧一電流特性が悪くなってしまうが，この方式で
は,5V以下にしても全く特性は変わらない。FIG. 1 is a diagram showing an embodiment of the present invention. In FIG. 1, Tr is a voltage signal limiting transistor, the collector of which is connected to the power supply of the power supply voltage Vcc, the emitter of which is connected to the collector of the phototransistor 1 and the base of which is connected to the ground GND through the power supply of the variable voltage E. There is. The emitter of the phototransistor 1 is connected to the ground GND via the signal detecting resistor R L. In the series circuit consisting of the voltage signal limiting transistor Tr, the phototransistor 1 and the signal detecting resistor R L , a current according to the amount of light received by the phototransistor 1 flows from the power supply voltage Vcc to the ground GND, Voltage signal is photo transistor 1
It occurs at the connection point between the emitter of and the signal detection resistor R L.
The variable voltage E is a base voltage setting circuit, and the maximum value of the voltage signal is limited by this setting voltage.
That is, assuming that the base-emitter voltage of the voltage signal limiting transistor Tr is Vbe, the maximum value of the output voltage Vout of the signal detecting resistor R L is given by E-Vbe-Vce, and the base of the voltage signal limiting transistor Tr is given. By adjusting the voltage E, that is, the variable voltage E, the maximum value of the output voltage Vout can be freely adjusted. As a result, the resistor R 1 as shown in the conventional example of FIG. 3 is no longer necessary, and the output impedance of the emitter of the voltage signal limiting transistor Tr is very small. The response speed is improved as compared with the conventional example shown. Further, in the conventional example using the Zener diode as shown in FIG. 3 (b), when the Zener voltage becomes 5V or less, the voltage-current characteristic deteriorates. The characteristics do not change.
以上の実施例では，電圧信号制限用トランジスタTrの
ベース電圧設定回路として可変電圧Ｅの電源を用いてい
るが，第２図に示すように，電源電圧Vccを抵抗R2,R3で
分圧して電圧信号制限用トランジスタTrのベース電圧設
定回路としてもよい。In the above embodiment, the power source of the variable voltage E is used as the base voltage setting circuit of the voltage signal limiting transistor Tr. However, as shown in FIG. 2, the power source voltage Vcc is divided by the resistors R 2 and R 3. May be used as the base voltage setting circuit of the voltage signal limiting transistor Tr.
以上説明してきたように，この発明は，フオトトラン
ジスタのエミッタに信号検出用抵抗の一端を接続し，そ
の接続点にフオトトランジスタの受光量に応じた電圧信
号を得るフオトトランジスタの信号検出器において，前
記フオトトランジスタのコレクタに電圧信号の最大値を
制限する電圧信号制限用トランジスタのエミッタを接続
して，前記電圧信号制限用トランジスタと前記フオトト
ランジスタと前記信号検出用抵抗との直列回路を構成
し，前記電圧信号制限用トランジスタのコレクタを電源
電圧の一端に接続し，前記信号検出用抵抗の他端を電源
電圧の他端に接続し，前記電圧信号制限用トランジスタ
のベース回路に，前記電圧信号の最大値を制限するベー
ス電圧設定回路を設けたことを特徴とするものである。
それゆえ，第３図（ａ），（ｂ）に示す如くの抵抗R1が
ないので，時定数が小さくなり、応答速度が速くなる。
また，第３図（ｂ）に示す従来例とは異なり，ツェナー
ダイオードを使用しないため，出力電圧の最大値を自由
に調節することができる。As described above, the present invention provides a phototransistor signal detector in which one end of a signal detection resistor is connected to the emitter of the phototransistor and a voltage signal corresponding to the amount of light received by the phototransistor is obtained at the connection point. The emitter of the voltage signal limiting transistor for limiting the maximum value of the voltage signal is connected to the collector of the phototransistor to form a series circuit of the voltage signal limiting transistor, the phototransistor and the signal detecting resistor, The collector of the voltage signal limiting transistor is connected to one end of the power supply voltage, the other end of the signal detecting resistor is connected to the other end of the power supply voltage, and the base circuit of the voltage signal limiting transistor is connected to the base of the voltage signal. It is characterized in that a base voltage setting circuit for limiting the maximum value is provided.
Therefore, since there is no resistance R 1 as shown in FIGS. 3 (a) and 3 (b), the time constant becomes smaller and the response speed becomes faster.
Further, unlike the conventional example shown in FIG. 3B, since the Zener diode is not used, the maximum value of the output voltage can be freely adjusted.
第１図はこの発明の一実施例を示す図，第２図はこの発
明の他の実施例を示す図，第３図（ａ），（ｂ）は従来
技術を示す図，第４図（ａ）は接合容量を考慮した従来
技術を示す図，第４図（ｂ）は第４図（ａ）の等価回路
を示す図である。 １……フオトトランジスタ,Tr……トランジスタFIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing another embodiment of the present invention, FIGS. 3 (a) and 3 (b) are diagrams showing a conventional technique, and FIG. FIG. 4A is a diagram showing a conventional technique considering the junction capacitance, and FIG. 4B is a diagram showing an equivalent circuit of FIG. 4A. 1 ... Phototransistor, Tr ... Transistor
Claims (1)
用抵抗の一端を接続し，その接続点にフオトトランジス
タの受光量に応じた電圧信号を得るフオトトランジスタ
の信号検出器において，前記フオトトランジスタのコレ
クタに電圧信号の最大値を制限する電圧信号制限用トラ
ンジスタのエミッタを接続して，前記電圧信号制限用ト
ランジスタと前記フオトトランジスタと前記信号検出用
抵抗との直列回路を構成し，前記電圧信号制限用トラン
ジスタのコレクタを電源電圧の一端に接続し，前記信号
検出用抵抗の他端を電源電圧の他端に接続し，前記電圧
信号制限用トランジスタのベース回路に，前記電圧信号
の最大値を制限するベース電圧設定回路を設けたことを
特徴とするフオトトランジスタの信号検出器1. A signal detector of a phototransistor, wherein one end of a signal detecting resistor is connected to the emitter of the phototransistor, and a voltage signal corresponding to the amount of light received by the phototransistor is obtained at the connection point thereof. The voltage signal limiting transistor for limiting the maximum value of the voltage signal is connected to the emitter to form a series circuit of the voltage signal limiting transistor, the phototransistor and the signal detecting resistor, and the voltage signal limiting transistor is connected. Is connected to one end of the power supply voltage, the other end of the signal detecting resistor is connected to the other end of the power supply voltage, and the base circuit of the voltage signal limiting transistor limits the maximum value of the voltage signal. A phototransistor signal detector characterized by being provided with a voltage setting circuit
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60200532A JP2562870B2 (en) | 1985-09-12 | 1985-09-12 | Phototransistor signal detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60200532A JP2562870B2 (en) | 1985-09-12 | 1985-09-12 | Phototransistor signal detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6262565A JPS6262565A (en) | 1987-03-19 |
| JP2562870B2 true JP2562870B2 (en) | 1996-12-11 |
Family
ID=16425869
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60200532A Expired - Fee Related JP2562870B2 (en) | 1985-09-12 | 1985-09-12 | Phototransistor signal detector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2562870B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5434701A (en) * | 1977-08-24 | 1979-03-14 | Pioneer Electronic Corp | Tuning pulse generating light receiving circuit for electronic tuning receiver |
| JPS583792U (en) * | 1981-06-30 | 1983-01-11 | 松下電工株式会社 | Transistor inverter base driver circuit |
| JPS60124126U (en) * | 1984-01-28 | 1985-08-21 | 林 福治 | Phototransistor voltage output circuit |
-
1985
- 1985-09-12 JP JP60200532A patent/JP2562870B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6262565A (en) | 1987-03-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |