JP2565234B2 - Solid-state imaging device - Google Patents

Description

The present invention relates to a solid-state imaging device.

[Outline of Invention]

According to the present invention, the vertical transfer section composed of the charge-coupled device is divided into a plurality of packets composed of a plurality of gate electrode sections of the same number, and the signal charges obtained in the light-receiving element are divided into a plurality of packets for one or two light-receiving elements. In a so-called self-scan type solid-state imaging device which is configured to read out and transfer a predetermined packet among packets, regarding unnecessary signal charges among the signal charges obtained in the light receiving element, 1 or 2 is set. For each light-receiving element, a variable electronic shutter mechanism is configured by reading out a predetermined packet of these plurality of packets and sweeping it out to the smear charge absorption section, and when applying this to a video camera, for example, The size and weight of such a video camera can be reduced.

[Conventional technology]

Conventionally, as a solid-state image pickup device, a device whose schematic plan view is shown in FIG. 15 has been proposed.

This solid-state imaging device employs a so-called interline transfer system. In FIG. 15, (1) is a P-type silicon substrate, and (2) is a matrix on the surface side of the P-type silicon substrate (1). 2 shows a light receiving element composed of a photodiode formed in a shape, and signal charges corresponding to subject light are generated in each of these light receiving elements (2), and these signal charges are accumulated in each of these light receiving elements (2). .

Reference numeral (3) denotes a vertical transfer section composed of charge-coupled devices (CCD) vertically arranged for each column of the light receiving element (2), and the signal charge accumulated in the light receiving element (2) is, for example, 1
It is read to the vertical transfer unit (3) all at once for each field,
Each horizontal line is transferred to the horizontal transfer unit (4) provided on the output side of the vertical transfer unit (3). The horizontal transfer section (4) is composed of a charge-coupled device, and converts the signal charges transferred through the vertical transfer section (3) to a signal charge detection section (5) provided on the output side of the horizontal transfer section (4). Transfer to The signal charge detection unit (5) is composed of, for example, a floating diffusion amplifier, detects the signal charge transferred through the horizontal transfer unit (4), and converts the signal charge into an electrical video signal. Convert. Reference numeral (6) is an output terminal for outputting this video signal.

On the one hand, the solid-state imaging device adopting such an interline transfer method has an advantage of low noise, but on the other hand, the saturation charge amount of the vertical transfer unit (3) is small, so that a high dynamic range is required. The disadvantage was that it could not be obtained. In this case, it is conceivable to increase the dynamic range by increasing the area of the vertical transfer portion (3), that is, the channel width. However, in this case, the aperture ratio of the light receiving element (2) becomes small, and such a solid There is a disadvantage in that it is not possible to downsize the imaging device and increase the resolution.

Therefore, as a solid-state image pickup device that solves the above-mentioned inconvenience, a so-called charge-sweep method solid-state image pickup device (Image Sensor with a Charge Sweep Device) has been proposed (Television Society Technical Report, February 1985). Issued on 27th, Vol.18, No.44, TEBS101-6, ED841).

In this solid-state imaging device, the vertical transfer section is composed of a charge sweep device, and the vertical transfer section is used as one large potential well to read out only the signal charges accumulated in a single light receiving element. It was done like this.

According to such a solid-state image pickup device, a large amount of signal charges can be transferred even if the channel width of the charge sweeping element forming the vertical transfer unit is narrowed. Can be realized.

However, in such a solid-state imaging device, all the smear charges generated in the charge sweeping element are mixed with the signal charges and transferred.
r).

Therefore, as a solution to such a problem,
Line address CCD image sensor (Line Address
A solid-state imaging device called CCD Image Sensor was proposed (International Solid Stitch Circuit Conference [Intern] issued on February 25, 1987.
ational Solid-State Circuit Conference.ISSCC] Proceedings).

In this solid-state imaging device, the vertical transfer section is composed of charge-coupled devices, and a smear charge absorption section is provided on the output side of the vertical transfer section. A plurality of, for example, potential wells extending over three, for example, three gate electrode portions are formed in this packet, and the signal charge obtained in one light receiving element is read into the potential well of this packet. Move
The signal charge is transferred to the horizontal transfer unit in packet units.
In this case, a plurality of potential wells formed in a plurality of packets move to the horizontal transfer unit during one horizontal period, but only one of the plurality of potential wells has a signal charge. Used to transfer

Therefore, in this solid-state imaging device, the potential wells other than the potential wells that transfer the signal charges are used to transfer the smear charges, and the smear charges transferred by the potential wells other than the potential wells that transfer the signal charges are used. With regard to (1), this is swept out to the smear charge absorption part to form a vertical transfer part having a high charge transfer capability, and the influence of smear charge generated in this vertical transfer part is effectively suppressed.

By the way, in such a solid-state image pickup device, configuring a variable electronic shutter mechanism does not require a mechanical shutter mechanism in, for example, a video camera provided with such a solid-state image pickup device, thus reducing the size and weight of the video camera. There is a benefit of being able to

However, conventionally, no self-scanning solid-state imaging device having an electronic shutter mechanism has been proposed.

[Problems to be solved by the invention]

The present invention has been made in view of the above problems, and an object thereof is to provide a self-scanning solid-state imaging device including an electronic shutter mechanism.

[Means for solving problems]

The solid-state image pickup device according to the present invention includes, as shown in FIGS. 1 to 14, charge-coupled with light receiving elements (11) arranged in a matrix in a vertical direction and a horizontal direction on a semiconductor substrate (10). The vertical transfer section (12), which is composed of an element and vertically transfers the signal charge obtained in the light receiving element (11), and the signal charge, which is composed of a charge-coupled element and is transferred through the vertical transfer section (12), in the horizontal direction. The horizontal transfer section (13) for transferring to the horizontal transfer section, the signal charge detection section (14) for detecting the signal charge transferred through the horizontal transfer section (13), and the smear charge generated in the vertical transfer section (12). The smear charge absorption section (15) is provided, and the vertical transfer section (12) is divided into a plurality of packets P ₁ , P ₂ ... P ₇ each including a plurality of gate electrode sections G ₁ , G ₂ ... G _{8 of the} same number. Light receiving element (1
1) or 2 light receiving elements (11)
In a solid-state image pickup device in which a predetermined packet of a plurality of packets P ₁ , P _2, ... P ₇ is read for each and transferred to a horizontal transfer section (13), a signal charge obtained in a light receiving element (11) Of the unnecessary signal charges among the one or two light receiving elements (11), a predetermined packet of the plurality of packets P ₁ , P _2, ... P ₇ is read out and swept to the smear charge absorption section (15). It was done like this.

[Action]

According to the present invention, the unnecessary signal charges among the signal charges obtained in the light receiving element (11) include a plurality of packets P ₁ , P _2, ... P for each one or two light receiving elements (11). _{Since it} is designed to read out a predetermined packet out of ₇ and sweep it out to the smear charge absorption part (15), it is possible to change the read-out point of the unnecessary signal charge out of the signal charges obtained in the light receiving element (11). Thus, the signal charge detected as a video signal can be accumulated in the light receiving element (11) for any desired time. Therefore, according to the present invention, it is possible to control the exposure time by changing the read-out point of unnecessary signal charges among the signal charges obtained in the light receiving element (11).

〔Example〕

One embodiment of the solid-state image pickup device of the present invention will be described below with reference to FIGS.

1 and 2 are a schematic plan view and a schematic partially enlarged plan view of the solid-state imaging device of this example, respectively. In FIGS. 1 and 2, (10) indicates that P-type impurities are relatively small. A thin P ^- type silicon substrate is diffused, and (11) is a light receiving element composed of a photodiode. Light receiving element (11)
504 in a matrix on the surface side of the P ^- type silicon substrate (10)
(Vertical) x 760 (horizontal) pieces are provided.

Further, a vertical transfer section (12) is provided for each column of these light receiving elements (11) via a read gate section (16). As shown in FIG. 3, the vertical transfer section (12) is composed of a buried channel type charge coupled device (BCCD). That is, an N-type region (17) forming a signal charge transfer path is provided on the surface side of the P ⁻ type silicon substrate (10), and an insulating layer (18) made of SiO ₂ is provided on the N-type region (17).
520 gate electrodes g ₁ , g ₂ ‥‥ g ₈ are provided. These gate electrodes g ₁ , g _2, ..., G ₈ are provided in common over the respective vertical transfer parts (12), and in particular, the ninth electrode
The 512th to 512th gate electrodes g ₁ , g ₂ ... G ₈ are provided so that one electrode corresponds to one light receiving element in each vertical transfer portion (12). These gate electrodes g _1, g ₂ ‥‥ g ₈ vertical operation pulses phi _V1 shown in Fig. 5 in, φ _V2 ‥‥ φ _V8 are supplied. Also, the ninth to 512th gate electrodes g ₁ and g ₂
‥‥ g ₈ is made so as serving as a gate electrode of the read gate portion (15), these ninth second 512th gate electrodes from g _1, g ₂ ‥‥ g ₈ vertical scanning pulse phi _V1 to, φ _V2
In addition to _V8 , a signal charge read pulse φ _ROG and an unnecessary charge read pulse φ ′ _ROG are supplied.

This vertical transfer unit (12) is, as shown in FIG.
It is composed of ten blocks B ₁ , B ₂ ... B ₁₀ . The first block B ₁ from the ninth block B ₉ here consists respective seven packets _{P 1, P 2 ‥‥ P 7} , 10th block B ₁₀ is composed of two packets P _1, P ₂ You. And
One packet is composed of eight gate electrode portions G ₁ , G ₂ ‥‥ G ₈ .

Further, in FIGS. 1 and 2, (19) shows a vertical transfer drive circuit for driving the vertical transfer section (12), and this vertical transfer drive circuit (19) has the above-mentioned packets P ₁ , P ₂ ... P ₇ ‥‥ P
65 packet driver circuits PD ₁ , PD ₂ ... PD ₇ ... PD ₁ , PD ₂ provided corresponding to ₁ and P ₂ . These packet driver circuits PD ₁ , PD ₂ ... PD ₇ ...
PD ₁ and PD ₂ are vertical scanning pulses φ _V1 , φ _V2, ... Shown in FIG. 5, respectively.
.. has 8 output terminals for outputting φ _V8 , and these 8 output terminals are gate electrodes of the corresponding packets.
They are connected to g ₁ , g ₂・ ・ ・ g ₈ respectively.

FIG. 6 shows the vertical scanning pulse φ _V1 , φ shown in FIG.
The change in the potential level of the vertical transfer path (17) _{when V2} ‥‥ phi _V8 is supplied to the gate electrode _{g 1, g 2 ‥‥ g 8} , a portion of the second block B ₂ and the third block B ₃ It is shown as an example. That As in T = t ₀ shown in FIG. 5 shown in Figure 6 A, each packet P _1, P ₂ first to ‥‥ P ₇ gate electrode portions G ₁
To the seventh gate electrode portion G ₇ are formed. After that, the potential well changes as shown in FIG. 6B at T = t ₁ , becomes as shown in FIG. 6C at T = t ₂ , and becomes as shown in FIG. 6D at T = t ₀ + 1 / 7H. becomes as shown, the first gate electrode portion G ₁ from the seventh gate electrode portion first from the gate electrode unit G ₁ seventh gate electrode portion G of the packet has been the potential wells next formed across G ₇ of each packet Go to ₇ . Therefore, during one horizontal period (H), as shown in FIG. 6E, it moves by 7 packets, that is, by 1 block. The solid-state imaging device according to the present embodiment intends to transfer signal charges and smear charges by utilizing the movement of the potential well.

Further, in FIG. 1 and FIG. 2, (20) is a line address shift register for supplying the signal charge read pulse φ _ROG and the unnecessary charge read pulse φ ′ _ROG to the read gate section (16). Address shift
The register (20) has 504 output terminals, and these output terminals are the ninth to 512th gate electrodes g ₁ , g ₂ provided corresponding to the light receiving element (11). It is connected to the g _8. The signal charge read pulse φ _ROG and the unnecessary charge read pulse φ ′ _ROG have a voltage value higher than the high level voltage of the vertical scanning pulse as shown in FIG. 5, and the signal charge read pulse φ _ROG and When the unnecessary charge read pulse _φ'ROG is supplied to the read gate section (16), the signal charge accumulated in the light receiving element (11) can be read to the vertical transfer section (12). The line address shift register (20) has a signal charge read pulse φ _ROG and an unnecessary charge read pulse φ ′ _ROG so that so-called field reading can be performed as shown in FIG.
_Are supplied to the read gate section (16). In this case, the signal charge read pulse φ _ROG and the unnecessary charge read pulse φ ′ _ROG are supplied in the horizontal blanking period.

Further, in this example, a horizontal transfer section (13) is provided on the output side of the vertical transfer section (12) via the memory section (21) and the vertical read gate (22). As shown in FIG. 3, the memory section (21) has an N ^- type area (23) forming a memory gate area and an N ^- type forming a memory area following the N-type area (17) of the vertical transfer section (12). provided with a region (24), these N ^-
Electrodes (25) and (26) are provided on the mold region (23) and the N-type region (24) via an insulating layer (18). A memory control signal φ _MC is supplied to these electrode electrodes (25) and (26). In addition, the vertical read gate section (2
2) provides an N ^- type region (27) following the N-type region (24) of the memory section (21), and an electrode () is provided on the N ^- type region (27) via an insulating layer (18). 28) is provided. A vertical read gate signal φ _VOG is supplied to this electrode (28).

The memory section (21) has a signal charge read pulse φ
_When the signal charges read by _ROG are not transferred, as shown in FIG. 7A, the charges (25) and (2
A low level voltage is supplied to 6) and the memory gate area (2
Although a potential barrier is formed in 3) and it is in an OFF state, the signal charge Q _S read by the signal charge read pulse φ _ROG is stored in the first block B ₁ as shown in FIG. 7B. The first gate electrode portion G ₁ to the 7th portion of the first packet P ₁
When transferred to the gate electrode section G ₇ , a high level voltage is supplied to the electrodes (25) and (26) as shown in FIG. 7C, and this memory section (21) is turned on (ON), The potential levels of the memory gate region (23) and the memory region (24) are made deeper than the potential level of the signal charge transfer path (17) to which the high-level voltage is supplied, and are shown in FIGS. 7D and 7E. After the process shown, the transferred signal charges are accumulated in the memory region (24), and when this accumulation is completed, the memory electrodes (25) and (26) are accumulated as shown in FIG. 7F.
Is supplied with a low level voltage to turn off the memory section (21), and the potential level of the memory gate region (23) is changed to the potential of the signal charge transfer path (17) to which the high level voltage is supplied. The signal charge accumulated in the memory region (24) is held by making the level shallower than the level.
Then, in the horizontal blanking period, as shown in FIG. 7G, a high level voltage is supplied to the gate electrode (28) of the vertical read gate section (22), and the vertical read gate section (22) is turned on (ON). ) State, and the signal charges accumulated and held in the memory area (24) are transferred to the horizontal transfer section (13).

The horizontal transfer section (13) is composed of a so-called two-phase drive type charge-coupled device which is well known in the art. In Fig. 2, S
_t1 and T _r1 are storage electrodes and transfer electrodes to which one drive pulse φ _H1 of the two-phase drive pulses is supplied respectively, and S _t2 and T _r2 are storage electrodes to which the other drive pulse φ _H2 is supplied respectively. And a transfer electrode.

The signal charge detection unit (1) is connected to the output side of the horizontal transfer unit (13).
4) is provided. The signal charge detection section (14) is constituted by a floating diffusion amplifier, detects a signal charge transferred to the horizontal transfer section (13), and converts the signal charge into an electric video signal. Incidentally, (29) is an output terminal for outputting this video signal.

Further, in this example, the smear control gate section is adjacent to the third gate electrode section G ₃ to the sixth gate electrode section G ₆ of the first packet P ₁ of the first block B ₁ of the vertical transfer section (12). A smear / drain region (15) is provided through (30). The smear control gate section (30)
As shown in FIG. 8, a P-type region (32) is provided adjacent to the N-type region (17) forming a vertical transfer path, and a gate is formed on the P-type region (32) via an insulating layer (18). It is configured by providing an electrode (33). The smear control gate signal φ _SCG is supplied to the gate electrode (33). In addition, the smear drain area (15) has smear control
It is configured by providing an N ⁺ type region (34) adjacent to the P type region (32) of the gate portion (30). Here, in the smear control gate section (30), the signal charge Q _S read by the signal charge read pulse φ _ROG is the first
While passing through the third gate electrode part G ₃ to the sixth gate electrode part G ₆ of the first packet P ₁ of the block B ₁ , the gate electrode (33)
Is supplied with a low level voltage, and as shown in FIG. 9A, the potential level is made shallower than the potential level of the signal charge transfer section (17) to which the high level voltage is supplied, and turned off. Signal charge readout pulse φ _ROG
The signal charge read by is prevented from being swept out to the smear / drain region (34). In addition, the signal charge read by the signal charge read pulse φ _ROG is the first
A high level voltage is supplied to the gate electrode (33) while the third packet electrode portion G ₃ of the first packet P ₁ of the block B ₁ is not passing through the sixth gate electrode portion G _6, as shown in FIG. 9B. As shown, the potential level is made deeper than the potential level of the signal charge transfer path (17) to which the high-level voltage is supplied to turn it on (ON), and the smear charge Qsmear and the unnecessary charge read pulse φ transferred. The signal charges read by the _ROG 'can be _swept out to the smear / drain region (15). In FIG. 2,
(35) is the channel stopper region.

Next, referring to FIGS. 10 to 14, in the normal mode of the solid-state imaging device of this example, that is, the exposure time is 1 field (1/60 second).
The operation in the case of doing will be described.

FIG. 10 is a diagram showing the timing at which the signal charge read pulse φ _ROG is supplied, and FIG. 11 is a diagram schematically showing how the signal charges are transferred in an odd field. In FIG. The solid line X indicates the potential level of the vertical transfer path (17) at the time when the signal charge read pulse φ _ROG is supplied, and the hatched portion indicates the signal charge read at that time, and the dotted pattern The portion indicated by indicates the signal charge that has already been read and is in the process of being transferred. Qk, k + 1 represents the signal charges read from the kth horizontal line and the k + 1th horizontal line.

First, during the first horizontal period (H) of the odd field, the signal charges are not read out, and only the vertical scanning pulses φ _V1 , φ _V2, ... φ _V8 shown in FIG. 5 are gate electrodes g ₁ , g _{2 ,. 8}
Is supplied to. Therefore, each packet P _1, P ₂ ‥‥ P ₇ potential well extending over the first gate electrode portion G ₁ to the seventh gate electrode portion G ₇ are formed as shown in FIG. 6, which is the output side To one block. At this time, the potential well transfers only the smear charge, but the memory section (21) outputs the signal charge read pulse φ as shown in FIG.
_It is turned on only when the signal charge read by the _ROG is transferred, and the smear control gate section (30) is changed by the signal charge read pulse φ _{ROG as} shown in FIG. When the read signal charge is not transferred, it is turned off, so that all the smear charges transferred are swept out to the smear / drain region (15). The same operation is performed during the following second horizontal period, third horizontal period, ... Eighth horizontal period. Thus, during the first horizontal period to the eighth horizontal period, only smear charges generated in the signal charge transfer path (17) are transferred and swept.

In the ninth horizontal period, as shown in FIG. 10, at the beginning of the horizontal blanking period, that is, at time T = t _{0 in} FIG. 5, the first block B _{1 is transferred} from the line address shift register (20). The signal charge read pulse φ _ROG is supplied to the first gate electrode g ₁ of the second packet P ₂ , that is, the gate electrode corresponding to the light receiving element (11) of the first horizontal line, and as shown in FIG. The signal charge Q ₁ accumulated in the light receiving element (11) on one horizontal line is read out to the second packet P ₂ of the first block B ₁ . Then, during the ninth horizontal period, each packet moves to the output side by one block. In this case, the memory section (21) outputs the signal charge read pulse φ as shown in FIG.
When the read signal charge transferred from the first gate electrode portion G ₁ of the first packet P ₁ of the first block B ₁ to the seventh gate electrode portion G ₇ by _ROG, turned on (ON) state , Otherwise, the smear control gate unit (30) outputs the signal charge read by the signal charge read pulse φ _ROG to the first packet P of the first block B ₁ . _It is designed to be in an off (OFF) state while passing from the third gate electrode part G ₃ to the sixth gate electrode part G ₆ of 1 and to be in an on state (ON) during the other time. stored in the device (11), the signal charge Q ₁ read the second packet P ₂ of the first block B ₁ represents stored in the memory unit (21), the first block B ₁ second packet
The smear charges transferred by the packets P ₁ , P _{3 to} P ₇ other than P ₂ are swept out to the smear / drain region (15). Next, in the tenth horizontal period, the signal charges Q ₂ , ₃ are read out and transferred as described above. Thus, the signal charge Qk, K + 1 according to the signal charge read pulse φ _ROG shown in FIG.
Is read out.

The signal charge is read out and transferred in this way,
For example, in the 32nd horizontal period, the signal charges Q ₄₆ , ₄₇ stored in the light receiving elements on the 46th horizontal line and the 47th horizontal line.
Reads the the first block seventh packet P ₇ of B _1,
The signal charges Q ₄₈ and ₄₉ accumulated in the light receiving elements on the 47th horizontal line and the 49th horizontal line are transferred to the first packet P ₁ of the second block B ₂ .
To be read. Here, FIGS. 12A and 12B show vertical scanning pulses φ _{V1 to} φ _V8 supplied to the seventh packet P ₇ of the first block B ₁ and the first packet of the second block B ₂ , respectively.
The vertical scanning pulses φ _{V1 to} φ _V8 supplied to P ₁ are shown. In this case, as shown in FIGS. 12A and 12B, T =
At t ₀ ′, the signal charge read pulse φ _{ROG is applied} to the first block B ₁
Of the seventh packet P ₇ to the seventh gate electrode g ₇ and the eighth gate electrode g ₈ , and as shown in FIG. 13A, the signal charges accumulated in the light receiving elements of the 46th horizontal line and the 47th horizontal line. Q ₄₆ , ₄₇
Is read into the seventh packet P ₇ of the first block B ₁ . By doing so, the signal charge is T = t ₁ ′ and the first gate electrode portion of the seventh packet P ₇ of the first block B ₁ is shown in FIG. 13B.
It is accumulated in the potential well formed from G ₁ to the seventh gate electrode portion G ₇ . Then, next, at T = t ₂ ′, the signal charge read pulse φ _ROG is supplied to the first gate electrode g ₁ and the second gate electrode g ₂ of the first packet P ₁ of the second block B ₂ .
As shown in FIG. 13C, the signal charges Q ₄₈ and ₄₉ accumulated in the light receiving elements of the 48th horizontal line and the 49th horizontal line are blocked in the second block.
Read the first packet P ₁ of B ₂ . By doing so, the signal charge is T = t ₃ ′, and the second block as shown in FIG. 13D.
The first packet P ₁ of B ₂ is accumulated in the potential well formed from the first gate electrode portion G ₁ to the seventh gate electrode portion G ₇ . After that, these signal charges are respectively transferred to the memory section (21). Thus, when the signal charge to be read last in the 7th packet P ₇ of the nth block is read in this 7th packet, the 1st packet of the n + 1th block
The signal charge to be read first for P ₁ is read during the same horizontal blanking period.

In this solid-state imaging device, the signal charges are read out and transferred by the above-mentioned operation, but the final line,
That is, the signal charge Q ₅₀₄ of the light receiving element on the 504th horizontal line is
It is read in the horizontal period, and the horizontal transfer unit (1
3) transferred to. In the even field, the first
As shown in FIG. 0, when the 271st horizontal period is reached, the signal charges are read out from the signal charges accumulated in the light receiving elements of the first horizontal line and the second horizontal line. The action is taken.

Next, referring to FIG. 14, in the shutter mode, that is, when the exposure time is 1 field (1/60 second) or less, for example, 4 horizontal periods (about 1/350 second) are set as the exposure time. A case will be described as an example.

In this case, as shown in FIG. 14, and supplies an unnecessary charge read-out pulse phi _'ROG to 4 before horizontal period and supplies the signal charge read pulse phi _ROG. In this way, the light receiving element (1) is supplied from when the signal charge read pulse φ _ROG one field before is supplied to when the unnecessary charge read pulse φ ′ _{ROG is} supplied.
The signal charge accumulated in 1) is read out to the vertical transfer path (17) and transferred to the output side. In this case, the memory section (21)
As shown in FIG. 8, the signal charges read by the signal charge read pulse φ _ROG are the first gate electrode portion G ₁ to the seventh gate electrode portion G ₇ of the first packet P ₁ of the first block B ₁ .
Is turned off (OFF) except when it is transferred to
Further, the smear control gate section (30) has a third gate electrode section of the first packet P ₁ of the first block B ₁ whose signal charge read by the signal charge read pulse φ _ROG
It is turned on (O) except during the period from G ₃ to the sixth gate electrode part G _6.
Since it is set to the N) state, all the signal charges read by the unnecessary charge read pulse _φ'ROG are swept out to the smear / drain region (15). Therefore,
When the signal charge read pulse φ _ROG is supplied after four horizontal periods of the unnecessary charge read pulse φ ′ _ROG , the signal charge accumulated in the light receiving element (11) during the four horizontal periods is read. In the memory section (21), the signal charges read by the signal charge read pulse φ _ROG are transferred from the first gate electrode section G ₁ to the seventh section of the first packet P ₁ of the first block B ₁ .
When transferred to the gate electrode section G ₇ , it is turned on, and the smear control gate section (3
0) is off while the signal charge read by the signal charge read pulse φ _ROG passes from the third gate electrode G ₃ to the sixth gate electrode part G ₆ of the first packet P ₁ of the first block B ₁ . Since it is in the (OFF) state, the signal charge read by this signal charge read pulse φ _ROG is to be accumulated in the memory area (24). 1/35 in this way
A signal charge based on 0 second exposure can be obtained.

Further, in this example, various exposure times can be taken by changing the read-out point of unnecessary signal charges among the signal charges obtained in the light receiving element (11).
When the unnecessary charge read pulse φ ′ _ROG is supplied, it is necessary to select a time point when the packet including the gate electrode to be supplied does not transfer the signal charge read by the signal charge read pulse φ _ROG .

Thus, according to the solid-state imaging device of this example, the light receiving element (1
By changing the read-out time point of the unnecessary signal charge in the signal charge obtained in 1), the signal charge detected as a video signal can be accumulated in the light receiving element (11) for any desired time. Therefore, the exposure time can be controlled with this, and a mechanical shutter mechanism is not required, and when this is applied to, for example, a video camera, it is possible to reduce the size and weight of the video camera. Have a profit

In addition, as a solid-state imaging device having an electronic shutter mechanism,
There is one in which a signal charge accumulated in the light receiving element is directly absorbed by the substrate by supplying a high voltage to the substrate. However, in such a solid-state image pickup device, since the voltage of the substrate is fluctuated, there is a disadvantage that noise or image drooling may occur due to this. In the solid-state imaging device of this example, the substrate voltage is constant, so there is no such inconvenience.

Further, according to the solid-state imaging device of this example, since the signal charges are read from the light receiving element (11) to the packets P ₁ , P _2, ... P ₇ within the horizontal blanking period, the horizontal effective period, that is, the signal During detection of the signal charge in the charge detection section (14), the potential of the substrate is not changed by the read pulse, and the voltage of the clock pulse is not changed.

Therefore, according to the solid-state imaging device of the present example, it is possible to avoid fixed pattern noise caused by supplying the read pulse during the horizontal effective period.

In the above embodiment, the case where the gate electrode is arranged so that one electrode corresponds to one pixel has been described, but instead of this, two electrodes may correspond to one pixel. Further, the number of blocks, the number of packets, and the number of gate electrode portions are not limited to the above-described cases.

Further, in the above-described embodiment, the P ⁻ -type silicon substrate (1
0), but instead of N
A P-well may be formed on the surface side of the N-type silicon substrate using a type silicon substrate, and a light receiving element, a vertical transfer section, and the like may be formed in the P-well.
It is possible to obtain the same effect as the above.

Further, the present invention is not limited to the above-described embodiments, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

〔The invention's effect〕

According to the present invention, the signal charge detected as a video signal can be detected for any desired time by changing the read-out point of unnecessary signal charge among the signal charges obtained in the light receiving element (11). The exposure time can be controlled with this, and a mechanical shutter mechanism is not required. For example, when this is applied to a video camera, such a video camera can be miniaturized. However, there is an advantage that the weight can be reduced.

[Brief description of drawings]

1 and 2 are a schematic plan view and a schematic partially enlarged plan view showing an embodiment of the solid-state imaging device of the present invention, FIG. 3 is a sectional view of a vertical transfer unit, and FIG. 4 is a vertical transfer unit. 5 is a waveform diagram showing a vertical scanning pulse, FIG. 6 is a diagram showing changes in the potential level of the vertical transfer portion, and FIG. 7 is a memory gate region, a memory region and vertical reading. A diagram showing changes in the potential level of the gate region, FIG. 8 is a sectional view showing the smear control gate portion and the smear drain region, and FIG. 9 is a potential level of the smear control gate region and the smear drain region. Of the signal read pulse in the normal mode, and FIG. 11 schematically shows the state of signal charge transfer in the odd field. Fig. 12, Fig. 12 and Fig. 13 are respectively
Waveform diagram and potential diagram for explaining the readout of the signal charge in 32 horizontal periods, FIG. 14 is a diagram showing the supply timing of the signal charge read pulse and the unnecessary charge read pulse in the shutter mode, and FIG. 15 is a conventional diagram. It is a schematic plan view which shows an example of a solid-state imaging device. (10) is a P ^- type silicon substrate, (11) is a light receiving element, (12)
Is a vertical transfer unit, (13) is a horizontal transfer unit, (14) is a signal charge detection unit, (15) is a smear / drain region, (16) is a read gate unit, (19) is a vertical transfer drive circuit, (20). ) Is a line address shift register, (21) is a memory section, (22) is a vertical read gate section, and (30) is a smear.
Control gates, B ₁ , B ₂・ ・ ・ B ₁₀ are blocks, P ₁ , P ₂・ ・ ・ P ₇ are packets, G ₁ , G ₂・ ・ ・ G ₈ are gate electrodes, g ₁ , g ₂・ ・ ・ G ₈ is the gate electrode, PD ₁ , PD ₂・ ・ ・
PD ₇ is a packet driver circuit, respectively.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Maki Sato Inventor, Maki Sato 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Within Sony Corporation (56) Reference JP-A-63-226177 (JP, A) JP-A-SHO 62-122383 (JP, A)

Claims (1)

(57) [Claims] 1. A vertical transfer unit, which comprises photodetectors arranged in a matrix in a vertical direction and a horizontal direction on a semiconductor substrate, and a charge-coupled device, which vertically transfers signal charges obtained in the photodetector. A horizontal transfer unit which is composed of a charge coupled device and horizontally transfers the signal charge transferred from the vertical transfer unit; and a signal charge detection unit which detects the signal charge transferred from the horizontal transfer unit. A smear charge absorption part that absorbs smear charges generated in the vertical transfer part, and divides the vertical transfer part into a plurality of packets composed of a plurality of gate electrode parts of the same number, and obtains the signal charge obtained in the light receiving element. In a solid-state imaging device in which one or two light receiving elements are read into a predetermined packet of the plurality of packets and transferred to the horizontal transfer unit. Unwanted signal charges of the above-mentioned signal charges are read into the predetermined packet of the plurality of packets for each of the one or two light receiving elements and are swept out to the smear charge absorption unit. Solid-state imaging device.