JP2578680B2 - Transmission line switching device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is used for a transmission line switching device for data communication.
The present invention relates to a transmission line switching device for performing instantaneous switching between an active system and a standby system of a transmission system having a redundant configuration.

[Conventional technology]

The transmission system is becoming more sophisticated than ever, such as automatic switching when a device fails. For this reason, as a requirement of the transmission system, not only the reduction of the transmission path cost but also the importance of the maintenance of the system is increasing.

Also, with the increase in the capacity of the transmission path due to the increase in the amount of information, the effect of the instantaneous interruption has not been limited to the transmission section, but has a large influence on the network.

Furthermore, as the transmission system having a redundant configuration becomes more complicated, the transmission line between the working system and the standby system is constantly monitored in order to maintain reliability and maintain reliability through preventive maintenance, and both systems are used on average. It is desirable.

As described above, in the future transmission system, switching between the active system and the standby system due to maintenance or the like needs to be performed without interruption. Further, in an ultra-large-capacity transmission system, since the effect of instantaneous interruption is great, it is necessary to use a 1: 1 redundant system and switch without interruption even when the line is interrupted.

Conventionally, a transmission line switching device has to switch not only a signal sequence but also a clock signal in order to perform switching of an active system and a standby system without an instantaneous interruption. It has been technically difficult to correct the phase difference between clock signals and perform switching without instantaneous interruption.

Further, in the case where the active / standby system switching is performed after the transfer from the transmission line clock signal to the intra-office clock signal, the frequency stuff processing and other signal processing become complicated and the feasibility is reduced.

For this reason, switching between the working system and the protection system in the current transmission system is performed without compensating the transmission line delay of the signal trains of the working system and the protection system, and without compensating for the phase shift of the transmission line clock signal. .

As described above, the switching between the working system and the protection system in the current transmission system is performed with an instantaneous interruption.

[Problems to be solved by the invention]

In such a conventional transmission line switching device, switching between the active system and the standby system during maintenance or switching between the active system and the standby system when the line of a transmission line system having a 1: 1 redundancy configuration is disconnected without instantaneous interruption. It is necessary to correct the phase difference of the transmission line clock signal between the active system and the standby system and perform the operation without any instantaneous interruption. Due to the difficulty, there is a drawback that an instantaneous interruption occurs without compensating for the phase shift of the transmission line clock signal.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned drawbacks and to provide a transmission line switching device capable of switching between a working system and a protection system of a transmission line system without an instantaneous interruption.

[Means for solving the problem]

The present invention relates to a dual-system receiving circuit for receiving a signal sequence of a two-system transmission line including a working system and a protection system and outputting the two-system signal sequence and a clock signal, respectively, And a signal sequence switching circuit that outputs a signal sequence of the operation system of the two systems based on the signal and the switching clock signal. A clock switching circuit for selecting an operation system clock signal from among the clock signals and outputting the selected signal as a switching clock signal; and a clock switching circuit provided at each output of the dual system receiving circuit to temporarily store a signal train with a corresponding clock signal. An elastic store read out by the switching clock signal and given to the signal string switching circuit, and the signal stored on the basis of the switching clock signal A phase detection circuit that detects a bit phase difference of the two-system signal example input to the switching circuit, outputs a delay control signal, and outputs the switching control signal when the bit phases match, and each of the elastic stores A delay compensating circuit provided at a preceding stage or a subsequent stage and compensating for a time difference between signal sequences input to the signal sequence switching circuit based on the delay control signal.

The clock switching circuit may further include a selection circuit that selects an operation system clock signal among the two system clock signals based on the switching control signal, and a phase locked loop that generates the switching clock signal. And the phase locked loop can use the clock signal from the selection circuit as a comparison input.

Further, according to the present invention, each of the delay compensating circuits can be constituted by an optical fiber type optical variable delay circuit provided at a stage preceding the two-system receiving circuit.

Further, each of the delay compensation circuits includes an optical fiber type optical variable delay circuit provided in a stage preceding the dual system receiving circuit and an electric circuit memory provided in a stage subsequent to the optical variable type delay circuit. Can be.

[Action]

The clock switching circuit selects an operating system clock signal from the clock signals from the two receiving circuits based on the input switching control signal, and outputs the selected clock signal as a switching clock signal. The second-system elastic store temporarily stores the signal train of the second-system receiving circuit by a corresponding clock signal, and supplies the read-out signal train switching circuit by a switching clock signal. The phase detection circuit detects the bit phase difference based on the frame signal of the two-system signal sequence input to the signal sequence switching circuit based on the switching clock signal, outputs a delay control signal, and outputs the switching control signal when the bit phases match. Output. The two-system delay compensation circuit is provided at the front or rear stage of each of the two-system elastic stores, and performs the bit delay operation of the signal sequence corresponding to the bit amount of the signal sequence input to the signal sequence switching circuit based on the delay control signal. To compensate for time differences.

The clock switching circuit selects an operating system clock signal among the two system clock signals based on the switching control signal in the selection circuit, and the phase locked loop uses the clock signal from the selection circuit as a comparison input and outputs the switching clock signal. Output.
Clock signal switching is performed so that a phase shift does not occur in the switching clock signal at the time of switching, and furthermore, the phase variation of the switching clock signal does not exceed the memory capacity of the elastic store for switching to the in-station clock signal. Then, it is performed with a time constant approximately equal to the jitter wander of the transmission path.

Further, when the input signal sequence is an optical signal sequence, the signal can be compensated by an optical fiber type optical variable delay circuit provided as a delay compensating circuit in the preceding stage of the receiving circuit.

In addition, rough delay correction is performed by an optical fiber type optical variable delay circuit provided before the two-system reception circuit, and minute delay correction is performed by an electric circuit memory provided after the optical variable delay circuit. The burden on the delay compensation circuit is reduced.

As described above, the switching between the active system and the standby system of the transmission path system can be performed without an instantaneous interruption.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a transmission line switching device according to an embodiment of the present invention. FIG. 2 is a block diagram of a clock switching circuit of the transmission line switching device of the present invention. In FIG. 1 and FIG. 2, the transmission line switching device receives the input signals of the two transmission lines of the active system and the standby system, respectively, and converts the two system signal trains S1, S2 and the clock signals CL1, CL2. Two-system receiving circuits 11 and 21 that output each, and a switching control signal that is input
A signal sequence switching circuit 40 that outputs a signal sequence of an operation system of the two systems based on the CNT4 and the switching clock signal CL3.

Here, the feature of the present invention is that, based on the input switching control signal CNT3, the operation system clock signal is selected as the switching clock signal CL3 from the clock signals CL1 and CL2 from the two receiving circuits 11 and 21. Output clock switching circuit 3
0, and the two-system elastic stores 12, 22 which temporarily store the signal trains S1 and S2 of the two-system receiving circuits 11 and 21 by the corresponding clock signals and respectively provide the read-out signal train switching circuit 40 by the switching clock signal CL3. And, based on the switching clock signal CL3, detects the bit phase difference of the two-system signal sequence input to the signal sequence switching circuit 40, outputs delay control signals CNT1, CNT2, and when the bit phases match, the switching control signal CNT3,
A phase difference detection circuit 50 that outputs CNT4, and a two-system signal that is provided between the elastic stores 12 and 22 and the signal string switching circuit 40 and is input to the signal string switching circuit 40 based on the delay control signals CNT1 and CNT2. Two-system delay compensation circuit that compensates for the time difference between columns
13 and 23.

In addition, the clock switching circuit 30 selects a clock signal of the operation system among the two clock signals CL1 and CL2 based on the switching control signal CNT3, and switches the clock signal from the selection circuit 41 as a comparison input. And a phase locked loop 42 for outputting a clock signal CL3.

Further, the phase locked loop 42 includes a phase comparator 43, a low-pass filter 44, and a voltage-controlled oscillator 45.

The operation of the transmission line switching device having such a configuration will be described. In FIG. 1, a receiving circuit of an active system and a standby system
The clock signals CL1 and CL2 of the transmission lines 11 and 21 are input to the clock switching circuit 30, respectively. The clock switching circuit 30
The clock signal CL1 is output when the active system is active, and the clock signal CL2 is output when the standby system is operating.

When switching from the active system to the standby system, the clock switching circuit 30 outputs a clock signal whose clock phase gradually changes from the phase of the clock signal CL1 to the phase of the clock signal CL2. The details of the clock switching circuit 30 will be described later.

Further, the elastic stores 12 and 22 temporarily store the signal trains S1 and S2 from the active and standby receiving circuits 11 and 21 with the clock signals CL1 and CL2 of the respective transmission lines and output the clock switching circuit 30. Read with the switching clock signal CL3. As a result, the transmission line clock phase fluctuation is absorbed, and the respective circuits operate with the same switching clock signal CL3.

Next, delay compensating circuits 13 and 23, which are configured by an electric circuit memory or the like and compensate for the time difference between the transmission line signal trains of the working system and the standby system in bit units, complete the bit phases of the respective signal trains S1 and S2. And outputs the signal to the signal sequence switching circuit 40 that switches the transmission line signal sequence between the active system and the standby system.

Further, a phase difference detection circuit 50 provided between the delay compensation circuits 13 and 23 and the signal sequence switching circuit 40 detects a phase difference between the signal trains of the working system and the protection system.

Next, a procedure for switching from the active system to the standby system will be described. When switching to the standby system is requested, the phase difference detection circuit 50 detects a reference signal such as a transmission line frame signal and calculates a bit amount corresponding to a transmission line delay difference between the active system and the standby system. I do. Further, a delay control signal CNT2 for performing delay correction is supplied to the delay compensation circuit 23 of the standby system so that the phase difference between the signal trains of the active system and the standby system is eliminated. The delay compensating circuit 23 performs a bit delay operation of the transmission path signal for the bit amount specified by the phase difference detecting circuit 50. Next, the phase difference detection circuit 50 checks that there is no phase difference between the signal trains of the working system and the protection system, and switches control signals CNT3 and CNT4 for switching to the clock switching circuit 30 and the signal sequence switching circuit 40. give. The clock switching circuit 30 responds to the clock switching command of the switching control signal CNT3 from the phase difference detection circuit 50 by using the clock signal CL of the active transmission line.
From the state where 1 is selected, the clock signal C of the standby transmission line
Switch to the state of selecting L2. In addition, the signal train switching circuit 40
Operates a circuit that switches in bit units in response to a signal sequence switching instruction of the switching control signal CNT4, and switches bits from the working transmission line signal sequence (signal sequence S1) to the standby transmission line signal sequence (signal sequence S2). Do. By performing the above operation, the instantaneous interruption switching from the active system to the standby system is completed.

Switching back from the standby system to the active system is performed in the same manner as described above based on the control signals CNT1 to CNT4.

In FIG. 2, the clock switching circuit 30 comprises a selection circuit 41 comprising a two-to-one selection switch and a phase locked loop 42 having a time constant approximately equal to the transmission line jitter wander. The phase locked loop 42 includes a phase comparator 43, a low-pass filter 44, and a voltage controlled oscillator (VCO) 45. The phase comparator 43 outputs a signal having the level of the phase difference between the signal input to the phase locked loop 42 and the output signal of the voltage controlled oscillator 45. The low-pass filter 44 converts the signal from the phase comparator 43 into a signal that changes with a time constant determined by the band of the low-pass filter 44, and outputs the signal to a voltage control oscillation decision 45 whose oscillation frequency changes according to the voltage level. . Therefore, the output signal of the voltage controlled oscillator 45 changes with a time constant determined by the band of the low-pass filter 44. By configuring the feedback system in this way, the phase difference between the signal input to the phase locked loop 42 and the output signal of the voltage controlled oscillator 45 gradually becomes "0" with a time constant determined by the band of the low-pass filter 44. Converges to The time constant of the phase locked loop 42 is set to a value on the order of the transmission line jitter wander by optimally designing the low-pass filter 44 and the like.
By using the above-described switching circuit for the clock switching circuit 30, the switching clock signal CL3 output from the clock switching circuit 30 even when switching from the clock signal CL1 of the working transmission line to the clock signal CL2 of the protection transmission line is performed. Varies with a time constant about the transmission line jitter wander.

FIG. 3 is a block diagram of a transmission line switching device according to a second embodiment of the present invention. A feature of the second embodiment is that the switching circuit portion and the delay compensation circuit portion are separated by placing the delay compensation circuit 13 in front of the elastic store 12. Other configurations are the same as those of the first embodiment shown in FIG. With such a configuration, it is possible to replace (upgrade) the delay compensation circuit portion when the amount of memory in the delay compensation circuit is insufficient.

FIG. 4 is a block diagram of a transmission line switching device according to a third embodiment of the present invention. The third embodiment is used in an optical transmission system, and is characterized in that the delay compensation circuit 13 is provided before the reception circuit 11. The delay compensation circuit 13 is configured by an optical variable delay circuit using an optical fiber or the like. Other configurations are the same as those of the first embodiment shown in FIG.

FIG. 5 is a block diagram of an optical variable delay circuit of the transmission line switching device according to the third embodiment of the present invention. The optical fiber is a series of a 2 × 2 optical switch and a pair of optical fibers having different lengths. By connecting, an optical variable delay circuit is formed. By operating each 2 × 2 optical switch based on the delay control signal CNT1 sent to the delay compensating circuits 13 and 23 for performing delay correction, it is possible to perform bit delay compensation.

FIG. 6 is a block diagram of a transmission line switching device according to a fourth embodiment of the present invention. This is a configuration in which two delay circuits are provided. With such a configuration, when performing the delay correction, the rough correction is performed using the delay compensation circuits 61 and 62 configured by an optical variable delay circuit or the like. The configured delay compensation circuits 13, 23
And the burden on the delay compensation circuit can be reduced.

〔The invention's effect〕

As described above, the present invention has an excellent effect that the signal and the clock signal of the transmission line of the working system and the protection system can be switched without an instantaneous interruption.

Further, when the working system and the standby system are configured in a 1: 1 ratio, by maintaining a switchable state at all times, there is an advantage that switching can be performed without an instantaneous interruption even when an abnormality such as a transmission path disconnection occurs.

[Brief description of the drawings]

FIG. 1 is a block diagram of a transmission line switching device according to a first embodiment of the present invention. FIG. 2 is a block diagram of a clock switching circuit of the transmission line switching device according to the first embodiment of the present invention. FIG. 3 is a block diagram of a transmission line switching device according to a second embodiment of the present invention. FIG. 4 is a block diagram of a transmission line switching device according to a third embodiment of the present invention. FIG. 5 is a block diagram of an optical variable delay circuit of a transmission line switching device according to a third embodiment of the present invention. FIG. 6 is a block diagram of a transmission line switching device according to a fourth embodiment of the present invention. 11, 21 ... receiving circuit, 12, 22 ... elastic store, 13, 23, 61, 62 ... delay compensation circuit, 30 ... clock switching circuit, 40 ... signal string switching circuit, 41 ... selection circuit , 42
…………………………………………………………………………………………………………………………………………………………………………………………………………….
S1, S2 ... signal train, CL1, CL2 ... clock signal, CL3 ...
... Switching clock signal, CNT1, CNT2, CNT5, CNT6 ... Delay control signal, CNT3, CNT4 ... Switching control signal.

Claims (4)

(57) [Claims] 1. A dual-system receiving circuit for receiving an input signal sequence of a two-system transmission line including a working system and a standby system and outputting the two-system signal sequence and a clock signal, respectively, And a signal sequence switching circuit for outputting a signal sequence of the operation system of the two systems based on the control signal and the switching clock signal. A clock switching circuit for selecting a clock signal of an operation system among the clock signals of the two systems and outputting the selected signal as a switching clock signal; An elastic store for storing and reading the clock signal of the operation system by the selected switching clock signal and applying the read signal to the signal string switching circuit; A phase detection circuit that detects a bit phase difference between the two-system signals input to the signal sequence switching circuit based on a switching clock signal, outputs a delay control signal, and outputs the switching control signal when the bit phases match. And a delay compensating circuit provided at a preceding stage or a succeeding stage of each of the elastic stores and compensating a time difference of a signal sequence input to the signal sequence switching circuit based on the delay control signal. apparatus. 2. The clock switching circuit according to claim 1, wherein the clock switching circuit includes a selection circuit for selecting an operation system clock signal of the two system clock signals based on the switching control signal, and a phase locked loop for generating the switching clock signal. 2. The transmission line switching device according to claim 1, wherein said phase locked loop receives a clock signal from said selection circuit as a comparison input. 3. The transmission line switching device according to claim 1, wherein each of said delay compensation circuits is provided in front of said two-system receiving circuit and comprises an optical fiber type optical variable delay circuit. 4. The delay compensating circuit includes an optical fiber type optical variable delay circuit provided before the two-system receiving circuit and an electric circuit memory provided after the optical variable type delay circuit. The transmission line switching device according to claim 1.