JP2582920B2 - DC-AC power converter - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC-AC power converter used in an AC power supply such as an uninterruptible power supply, and more particularly to a transformer for insulation. TECHNICAL FIELD The present invention relates to a high-frequency intermediate link type power converter in which high-frequency power is exchanged via a device.

[Prior Art] The configuration of a conventional apparatus will be described with reference to FIG. FIG. 17 is a block diagram of a conventional DC-AC power converter shown in, for example, IEEE PESC'88 Record, pp. 658-663, 1988.
In the figure, 1 is an inverter circuit, 8 is a transformer whose input side is connected to the inverter circuit 1, 3 is a cycloconverter circuit connected to the output side of the transformer 2, 4 is connected to the output side of the cycloconverter circuit 3 Filter circuit, 5
Is a current detector for detecting the output current of the cycloconverter circuit 3, 6 is a carrier signal generator, 7 is a reference voltage signal generation circuit, 8 is an absolute value circuit, 9 is a PWM circuit, 10 is an inverter switching circuit, and 11 is a cyclone. It is a converter switching circuit. The inverter circuit 1 includes four semiconductor switching elements S _{1 to} S ₄ , and the cycloconverter circuit 3 includes four semiconductor switching elements S ₅ , S ₆ ,
It is composed of S ₅ ′ and S ₆ ′. The filter circuit 4 is an LC filter circuit including a reactor and a capacitor.
Reference numerals 12 and 13 are a DC power supply and a load circuit connected to the DC-AC power converter.

Next, the operation of the above-described conventional device will be described with reference to FIG. First, as shown at the top of FIG. 18, the sine-wave reference voltage signal V ^* output from the reference voltage signal generation circuit 7 is converted into an absolute signal | V ^* | This absolute value signal | V ^* | is input to the PWM circuit 9 together with the carrier signal output from the carrier signal generator 6. As a result, the PWM circuit 9 has two types of binary signals T
_a and T _b are output. That is, a binary signal Ta whose level changes in synchronization with the timing at which the absolute value signal | V ^* | matches the amplitude of the carrier signal, and _a binary signal T whose level changes in synchronization with the falling edge of the carrier signal _b is output. Next, the binary signals T _a and T _b are input to the inverter switching circuit 10,
On / off signals T _{1 to} T _{4 of the four} semiconductor switching elements S _{1 to} S ₄ constituting the inverter circuit 1 are output. That is,
OFF signal T1, T ₃ is a binary signal T _b, a T _a same signal,
OFF signal T _2, T ₄ are each binary signal T _b, the code inverted signal of the T _a. Here, it is assumed that when the levels of the on / off signals T _{1 to} T ₄ are high, the corresponding semiconductor switching elements S _{1 to} S ₄ are turned on, and when they are low, they are turned off. Also, the semiconductor switching element from FIG. 17 S ₁ to S ₄ and the secondary voltage of the transformer 2
v relationship and _2, the following equation.

Here, v _dc is the DC output voltage of the DC power supply 12. Therefore, when turned on and off according to the semiconductor switching elements S ₁ to S ₄ constituting the inverter circuit 1 to the OFF signal T ₁ through T _4, v ₂ is the PWM modulated AC voltage as shown in FIG. 18.

On the other hand, the binary signal T _b , the reference voltage signal V ^*, and the output current of the cycloconverter circuit 3 output from the current detector 5
When i _cc is inputted to the cycloconverter switching circuit 11, four semiconductor switching devices S ₅ constituting the cycloconverter circuit _{3, S 6, S 5 '} , S 6' OFF signal T
₅ , T ₆ , T ₅ ′, and T ₆ ′ are output. First, _{assuming that} the polarity of the output current _icc is positive in the direction in which icc flows into the load circuit 13, _icc
Polarity is positive when the semiconductor switching element S ₅ or S ₆ is on-off operation, when the negative S ₅ 'or S _6' is turned on and off. Next, the relationship between the output voltage v _cc and the transformer 2 of the secondary voltage v ₂ of cycloconverter circuit 3 is expressed as follows by FIG. 17.

Therefore, 'as a binary signal T _b the same signal, off signal T ₆ or T _6' OFF signal T ₅ or T ₅ when the the binary signal T _b sign inverted signal, v polarity _cc is positive and Become. Conversely, on-off signal T ₅ or T ₅ 'to the sign-inverted signal of the binary signal T _b, OFF signal T ₆ or T _6' When the the binary signal T _b the same signal, v polarity _cc negative Becomes From the cycloconverter switching circuit 11 performs a polarity discrimination of the output current i _cc of the reference voltage signal generating circuit 7 and the current detector reference voltage signal inputted from each of 5 V ^* and cycloconverter circuit 3, of the above P depending on polarity
OFF signal T ₅ as shown in FIG. 18 from the binary signal T _b input from the WM circuit _{9, T 6, T 5 '} , T 6' generates. Accordingly, as the output voltage v _cc of cycloconverter circuit 3, PWM modulated sine wave voltage as shown at the bottom of FIG. 18 is obtained. Furthermore, by entering this output voltage v _cc to the filter circuit 4, a sine wave voltage v _L harmonic components by the PWM modulation has been removed is supplied to the load circuit 13. At this time, if the frequency of the carrier signal is made sufficiently higher than the frequency of the reference voltage signal v ^* , the load voltage v _L supplied to the load circuit 13 will have sufficiently removed harmonic components due to PWM modulation, and have an amplitude and a phase. The voltage becomes substantially equal to the reference voltage signal v ^* . FIG. 18 shows a switching pattern when the load circuit 13 is a linear load having a delayed power factor.

[Problems to be solved by the invention]

As described above, the conventional DC-AC power converter inputs DC power and outputs AC power according to a reference voltage signal. Such a DC-AC power converter is generally called a high-frequency intermediate link power converter because high-frequency power is exchanged via a transformer. It is known that when this high-frequency intermediate link type DC-AC power converter is used for an AC power supply such as an uninterruptible power supply, the size and weight of an insulating transformer and a filter circuit can be reduced. However, the conventional DC-AC power converter has a configuration in which PWM modulation is performed in the inverter circuit 1 as described above. Therefore, when multi-phase operation is performed, both the inverter circuit 1 and the cycloconverter circuit 2 are multiplied. There was a problem that it was necessary to phase. In addition, when the application to an uninterruptible power supply is considered, since the inverter circuit 1 and the cycloconverter circuit 3 must always be controlled as a pair, the flexibility of the system configuration with respect to power supply capacity change and battery power supply is lost. There was a problem that.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has a DC configuration excellent in system configuration flexibility for polyphase, power supply capacity change, and battery power supply which is indispensable for an uninterruptible power supply device. -To obtain an AC power converter.

[Means for solving the problem]

A DC-AC power changing apparatus according to the present invention includes a current polarity determining circuit that determines the polarity of an output current of a cycloconverter circuit, and an inverter switching circuit that generates an on / off signal to an inverter circuit in synchronization with a carrier signal having a constant frequency. A switching signal generating circuit that receives the reference voltage signal and the carrier signal to generate a switching signal, and a cyclo converter switching circuit that receives the switching signal and the current polarity determination signal and generates an on / off signal to the cyclo converter circuit. It is a thing.

(Operation)

The inverter switching circuit according to the present invention generates an on / off signal having a duty ratio of 50%,
The next voltage is a rectangular wave voltage having a duty ratio of 50%. or,
The switching signal generating circuit outputs a PWM-modulated switching signal. Further, the cycloconverter switching circuit outputs a PWM-modulated on / off signal, and in response thereto, the cycloconverter circuit outputs a PWM-modulated sine wave voltage.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1 to 6 show a first embodiment of the present invention, and FIG. 1 is a configuration diagram thereof. 2A is a transformer, 6A is a carrier signal generator, 14 is an inverter circuit, 15 is a cycloconverter circuit, 16 is a reference voltage signal generation circuit, 17A is an inverter switching circuit, 18A is a switching signal generation circuit, and 19 is a current polarity discrimination circuit. , 20 are cycloconverter switching circuits. Note that the filter circuit 4, the current detector 5,
The DC power supply 12 and the load circuit 13 are the same as in the related art.

FIG. 2 shows a detailed configuration of the inverter circuit 14, the transformer 2A, and the cycloconverter circuit 15. Inverter circuit 14
Are input terminals 141 and 142 connected to the DC power supply 12 and semiconductor switching elements S _{1 to} S such as transistors and MOS FETs.
₄ and these anti-parallel connected diodes D ₁ -D
₄ and output terminals 143 and 144. The transformer 2A includes primary-side winding terminals 21 and 22 connected to output terminals 143 and 144 of the inverter circuit 14, and secondary-side winding terminals 23 and 22.
Has 24. Cycloconverter circuit 15 includes an input terminal 151 and 152 connected to the secondary winding terminals 23 and 24, semiconductor switching elements such as transistors and MOS FET S ₅ ~S _8,
S ₅ ′ to S ₈ ′, diodes D _{5 to} D ₈ , D ₅ ′ to D ₈ ′ connected in anti-parallel to these switching elements, and output terminals 153 and 154 connected to the filter circuit 4. .
Note that two semiconductor switching elements S _n , S _n ′ (n = 5
8) and diodes D _n and D _n ′ connected in anti-parallel thereto.
(N = 5 to 8) constitutes a bidirectional switch capable of controlling the direction of conduction.

FIG. 3 shows a detailed configuration of the inverter switching circuit 17A, and an input terminal connected to the carrier signal generator 6A.
171, a 1/2 frequency divider 172 in which the polarity of the output signal is inverted in synchronization with the fall of the input signal input to the input terminal 171, a knot circuit 173 connected thereto, and output terminals 174 to 177 It is composed of

FIG. 4 shows a detailed configuration of the switching signal generating circuit 18A, in which an input terminal 20 connected to the carrier signal generator 6A is connected.
0 and the input terminal 201 connected to the reference voltage signal generation circuit 16
, An absolute value circuit 202, a comparator 203, and knot circuits 205 and 20
7,208,210, 1/2 frequency dividers 204,206 in which the polarity of the output is inverted in synchronization with the fall of the input signal, a polarity discrimination circuit 209,
AND circuits 211-218, OR circuits 219-222, and output terminals
223 to 226.

FIG. 5 shows a detailed configuration of the cycloconverter switching circuit 20. The input terminals 230 to 233 connected to the output terminals 223 to 226 of the switching signal generation circuit 18A and the input terminal 234 connected to the current polarity determination circuit 19 are shown. And the knot circuit 2
35, AND circuits 236 to 243, and output terminals 244 to 251.

Next, the operation of the above configuration will be described with reference to the timing chart of FIG. First, a carrier signal v _p sawtooth wave-like right up showing the carrier signal generator 6A at the top of Figure 6 is output. Next, the inverter switching circuit
50% duty cycle on-off signals T ₁ through T ₄ is output by the following operations from 17A. That is, when the carrier signal v _p is inputted through the input terminal 171, the signal T _x from 1/2 divider 172 Figure 6 signal T _b the same waveform is output, the signal from the NOT circuit 173 signal T _y of the T _x, sign inverted is output. This signal _Ty has the same waveform as the signal _Td in FIG. As a result, the signal _Tx becomes the output terminal 17 as the on / off signals T ₁ and T _4.
Is output from the 4,175, signal T _y is output from the output terminal 176 and 177 as a off signal T _2, T _3. On-off signal T _{1 to} T ₄
The corresponding semiconductor switching devices S ₁ to S ₄ of the inverter circuit 14 when the level is high in the turned on, and turned off when the signal is low. The semiconductor switching devices S ₁ ~ from Figure 2
The relationship between the secondary voltage v ₂ on-off and the transformer 2A of S ₄ is as follows.

Therefore, the secondary voltage v ₂ is the duty ratio, as shown in FIG. 6 is 50% of the rectangular wave voltage.

On the other hand, the reference voltage signal generating circuit 16 a reference voltage signal cycloconverter circuit 15 to be output ▲ v _c ^* _c ▼ is output from the switch signal generating circuit 18A together with a carrier signal v _P
Is input to The switching signal generation circuit 18A receives the signal and receives the PWM modulated switching signal _T5P as follows.
~ T _8P is output. First, through the input terminal 201 a reference voltage signal ▲ v _c ^* _c ▼ by absolute value circuit 202 the absolute value signal | is converted into | ▲ v _c ^* _c ▼. This absolute value signal | ▲ v _c
^* _C ▼ | is input to a comparator 203 with a carrier signal v _P input through the input terminal 200, the comparator 203 outputs a signal T _p shown in Figure 6. The signal T _p is input to the 分 frequency divider 204 and is converted into _a signal Ta. In addition, the signal _TP becomes the knot circuit 205
Is input to the 1/2 frequency divider 206 after the sign inverted by the signal T _b shown in FIG. 6 is output. Further, the signal T _a
Is input to the knot circuit 207, the signal _Tc is output, and the signal T
_{When b} is input to the knot circuit 208, a signal _Td is output. Here, a description will be given of the relationship between the output voltage v _cc signals T _a through T _d and cycloconverter circuit 15. If you want to the polarity of the output voltage v _cc positive, the switching signals T according to:
To determine the _5P ~T _8P.

T _5P = T _a , T _6P = T _d , T _7P = T _c , T _8P = T _b (4) The semiconductor switching element S constituting the bidirectional switch according to the switching signals T _{5P to} T _{8P. n} , S _n ′ (n
= 5 to 8) on or off signal _Tn or _Tn '(n =
5-8) are output from the cycloconverter switching circuit 20. Semiconductor switching elements S _{5 to} S ₈ , S ₅ ′ to
S ₈ ′ on / off and output voltage of cycloconverter circuit 15
The relationship with v _cc is shown by the following equation.

Therefore, from (4) and (5), the signal T _a in Figure 6, when T _b is high both v _cc = v _2, the signal T _c, T _d
V _cc = -v _2, the signal T _a, T _d or signal when but both high level
Since V _cc = 0 when T _b and T _c are at a high level, the output voltage v _cc of the cycloconverter circuit 15 is PWM-modulated and has a positive polarity as shown at the bottom of FIG. Conversely, if you want the polarity of the v _cc negative, it may be determined switching signal T _5P through T _8P according to the following equation.

_{T 5P = T c, T 6P} = T b, T 7P = T a, T 8P = T d ... (6) will now be described more in Operation of Figure 4. Reference voltage signal from the polarity discriminating circuit 209 ▲ v _c ^* _c ▼ polarity signal v _sgn of are output. Also, a signal obtained by inverting the sign of the polarity signal _vsgn is output from the knot circuit 210. These signals and signals T _a ~
T _d are input to an OR circuit 219 to 222 through the AND circuit 211 to 218, the reference voltage signal ▲ v _c ^* _c ▼ respective signals T _a from the AND circuit 211,214,216,217 when the polarity is positive, T _c, T _d since T _b is output, the switching signal T _5P through T _8P corresponding output terminal 223 - 226 to (4) below is output. Similarly, the reference voltage signal ▲ v _c ^* _c ▼ when polarity negative of, (6)
Switching signals T _5P through T _8P corresponding to formula is output.
Then, the output current i _cc of cycloconverter circuit 15 output from the current detector 5 are input to the current polarity determination circuit 19, the polarity signal i _sgn of the output current i _cc from the circuit 19 is output. Polarity signal i _sgn is input with the switching signal T _5P through T _8P output from the switching signal generating circuit 18A in the cycloconverter switching circuit 20, the cycloconverter switching circuit 20 output terminal 24 in accordance with the following formula
The semiconductor switching devices S ₅ to S ₈ of the cycloconverter circuit 15 from 4~251, S ₅ '~S _8' OFF signal T ₅ ~T _8, T in
And it outputs the ₅ '~T _8'.

When the polarity of i _cc is positive By the above operation, the reference voltage signal of the output AC from the reference voltage signal generating circuit 16 ▲ v _c ^* _c ▼ voltage v _cc of the PWM waveform is output from the cycloconverter circuit 15. Further, the filter circuit 4 connected to the output side of the cycloconverter circuit 15 removes harmonic components of the output voltage _vcc , and then supplies the output voltage _{vcc to} the load circuit 13.

Next, a second embodiment of the present invention will be described with reference to FIGS. FIG. 7 shows a block configuration of the second embodiment, wherein 6B is a carrier signal generator, 17B is an inverter switching circuit, 18B and 30 are first and second switching signal generation circuits, and the other configuration is This is the same as the first embodiment.

FIG. 8 shows a detailed configuration of the switching signal generation circuit 18B, in which the input terminal 30 connected to the carrier signal generator 6B is connected.
0 and the input terminal 301 connected to the reference voltage signal generation circuit 16
, An absolute value circuit 302, a comparator 303, and knot circuits 304 and 30
7,308,310, 1/2 frequency dividers 305,306 in which the polarity of the output signal is inverted in synchronization with the fall of the input signal, and the polarity discrimination circuit 30
9, AND circuits 311 to 318, OR circuits 319 to 322, and output terminals 323 to 327.

FIG. 9 (a) shows a detailed configuration of the second switching signal generating circuit 30, where 330 to 334 are input terminals connected to the output terminals 323 to 327 of the switching signal generating circuit 18B, and 335 is a current polarity discriminating circuit. Reference numeral 19 denotes an input terminal, 336 denotes a commutation mode selection circuit, 337 to 340 denote signal selection circuits, and 341 to 344 denote output terminals.

FIG. 9 (b) is a block diagram showing a detailed configuration of the commutation mode selection circuit 336.
Circuits (exclusive or circuits) 350 to 353. FIG. 9C is a block diagram showing a detailed configuration of one of the signal selection circuits 337 to 340. The signal selection circuit 337 includes a shift register circuit 354.
And OR circuits 355 and 359, knot circuit 356, and AND circuit
357,358. Incidentally, the inverter switching circuit 17B is provided with a 1/2 frequency divider 172 in which the polarity of the output signal is inverted in synchronization with the falling of the input signal of the inverter switching circuit 17A shown in FIG. The configuration is such that a 1/2 frequency divider in which the polarity of the output signal is inverted synchronously is used. Therefore, FIG. 3 is regarded as a block diagram showing a detailed configuration of the inverter switching circuit 17B. However, the 1/2 frequency divider 172 is a frequency divider in which the polarity of the output signal is inverted in synchronization with the rise of the input signal.

Next, the operation of the above-described second embodiment will be described with reference to FIG. First, the carrier signal generator 6B
Sawtooth waveform carrier signal v _P downward to the right as shown in the top row of FIG. 10 is outputted. Next, this carrier signal
v _P to the inverter switching circuit 1 via input terminal 171
If you type in 7B, 1/2-frequency divider 172 and the signal T _x and T _y as respectively shown in FIG. 10 from the NOT circuit 173 is outputted. Therefore, the on / off signal T ₁ obtained from these signals
When the _four semiconductor switching elements S _{1 to} S ₄ of the inverter circuit 14 are turned on and off in accordance with T ₄ , the secondary voltage v ₂ of the transformer 2A becomes as shown in FIG. A large duty ratio results in a rectangular wave voltage of 50%. The above operation is
Since the operation is the same as that of the first embodiment, a detailed description of the operation is omitted. Subsequently, the reference voltage signal ▲ V _{c of the} voltage to be output from the reference voltage signal generation circuit 16 to the cycloconverter circuit 15
^* _C ▼ is output, together with a carrier signal v _P output from the carrier signal generator 6B is input to the first switching signal generator circuit 18B, the first switching signal generator circuit 18B
From the following operation, the first switching signals T _{5q to} T _8q
Is output. First, the input terminal 301 is input via the reference voltage signal ▲ V _c ^* _c ▼ is input to an absolute value circuit 302, the absolute value signal | ▲ V _c ^* _c ▼ | is outputted. Subsequently, this absolute value signal | ▲ V _c ^* _c ▼ | is input to the comparator 303 together with the carrier signal v _P input via the input terminal 300, and the signal T as shown in FIG. _P is output. Further, when the input to the 1/2 frequency divider 305 after the sign inversion by inputting the signal T _P to the NOT circuit 304, signal T _a, as shown in FIG. 10 is outputted. Also, the signal T _P is divided by a 1/2 frequency divider 306
If you type, the signal T _b as shown in FIG. 10 is outputted. Further, each of the NOT circuit a signal T _a and T _b 307,30
When input to 8, signals _Tc and _Td are output. Subsequently, the reference voltage VV _c ^* _c入 力 input via the input terminal 301 is input to the polarity discrimination circuit 309, and the polarity signal V _sgn is output. Further, the AND circuit 311 to 318, the OR circuit 319 to 322 and the NOT circuit 310, the first switching signal T _5q through T _8q is obtained according to the following equation.

Then, these first switching signal T _5q through T _8q and polarity signal V _sgn is outputted from the output terminals 323-327.

By the way, the second switching signal generation circuit 30, which will be described next, is omitted, and the first switching signal _T5q
The through T _8q as the switching signal T _5P through T _8P respectively, entering the cycloconverter switching circuit 20, for example, ▲ V _c ^* _c ▼ polarity of the time positive, the PWM modulation, as shown at the bottom of FIG. 10 The fact that a voltage having a positive polarity is output from the cycloconverter circuit 15 is apparent from the operation of the above-described first embodiment. Then, before the description of the operation of the switching signal generating circuit 30, the eight semiconductor switching elements S ₅ ~ constituting the cycloconverter circuit 15
It explained the commutation operation _{S 8, S 5 '~S 8} '. First, the output voltage V _cc and output current i _{cc of} the cycloconverter circuit 15
The case where both polarities are positive will be described. In this case, the polarity of the output current i _cc is positive, the cycloconverter switching circuit 20 of eight constituting the cycloconverter circuit 15 semiconductor switching elements S ₅ ~
_{S 8, S 5 '~S 8} ' 4 two switching elements S ₅ to S ₈ of the
Perform an on / off operation. Further, since GokuTadashi output voltage V _cc is positive, i.e. the reference voltage signal ▲ V _c ^* _c ▼ polarity is positive, the signal T _a in Figure 10 from the relationship of equation (8), T _b, T _c , T
_The switching elements S ₅ , S ₈ , S ₇ , and S ₆ perform on / off operations according to _d . Next, commutation is performed between these switching elements at the timings indicated by 1 to 4 in FIG. That is, the S ₇ from S ₅ is first timing, the S ₆ in second timing to S _8, the S ₇ at third timing
To S _5, and the fourth timing commutation is performed respectively to S ₆ from S _8. Here, S ₇ from S ₅ in one of the timing
Examining the commutation to, from FIG. 10, the polarity of the secondary voltage v ₂ of the transformer 2A when commutation is negative, the S ₅ from Figure 2 can supply commutation because they are reverse biased You can see that there is. Similarly, it can be seen that power commutation is possible at the other timings 2 to 4.

Then, the polarity of the output voltage V _cc of the cycloconverter circuit 15 is a positive, the polarity of the output current i _cc will be described for the case of negative. Since this time the polarity of the output current i _cc is negative, the cycloconverter switching circuit 20, the eight semiconductor switching devices S ₅ to S ₈ constituting the cycloconverter circuit 15, of the S ₅ '~S _8' 4 The two switching elements S ₅ ′ to S ₈ ′ perform an on / off operation. Also, the output voltage V
_Since the polarity of _cc is positive, that is, the polarity of the reference voltage signal ▲ V _c ^* _c ▼ is positive, the signal in FIG.
According to T _a , T _b , T _c , T _d , the switching elements S ₅ ′,
S ₈ ′, S ₇ ′, and S ₆ ′ perform on / off operations. Next, commutation is performed between these switching elements at the timings indicated by 1 to 4 in FIG. That is, the 'S ₇ from' S ₅ in 1 timing, 'S ₈ from' S ₆ in second timing
At timing 3, commutation is performed from S ₇ ′ to S ₅ ′, and at timing 4, commutation is performed from S ₈ ′ to S ₆ ′. Here, when the commutation from S ₅ ′ to S ₇ ′ at the timing of 1 is examined, the polarity of the secondary voltage v ₂ of the transformer 2A at the time of commutation is negative from FIG. _{Since 5} 'is forward biased, it can be seen that power supply commutation is impossible. Similarly, the other two
It can be seen that power supply commutation is not possible even at timings 4 to 4. That is, in this case, commutation of each switching element needs to be performed by forced commutation. Similarly,
When the polarity of the output voltage v _cc is examined for the case of negative, when the polarity of the output voltage V _cc and the output current i _cc as a result is the same 4
It can be seen that the power commutation of the two switching elements S ₅ and S ₈ (or S ₅ ′ to S ₈ ′) is possible, and when the polarities are different, the power commutation is impossible. Incidentally, in the case of using a power commutation, the off timing of the switching signal (in FIG. 10, the timing signal T _a through T _d is changed from high to low)
May be delayed by at least the commutation time.

Next, the operation of the second switching signal generation circuit 30 will be described. First, a first switching signal generation circuit
Polarity signal _Vsgn output from 18B and current polarity determination circuit 1
The output current i of the cycloconverter circuit 15 output from 9
_{The cc} polarity signal _isgn is input through the input terminals 334 and 335, respectively, and further input to the commutation mode selection circuit 336. The commutation mode selection circuit 336 performs the XOR operation as shown in FIG.
Since the commutation mode selection circuit 336 has the same level of the polarity signals V _sgn and i _sgn (that is, the output voltage V _cc of the cycloconverter circuit 15 and the output current i _cc of the polarity the same time) is high level, the signal Y ₅ to Y ₈ at a low level when the polarity signal V _sgn and i _sgn levels are different are output. Subsequently, the switching signal T output from the switching signal generation circuit 18B
_5q through T _8q are respectively inputted via the input terminal 330-333, further together with the signal Y ₅ to Y _8, the signal selection circuit 337
~ 340. Next, the operation of the signal selection circuit 337 will be described with reference to FIG. First, the switching signal _T5q input from the input terminal 330 is
When input to the OR circuit 335 and the OR circuit 335, the OR circuit 335 outputs a signal T _5q ′ in which only the falling timing of the switching signal T _5q is delayed by the commutation time or more. Furthermore, by the knot circuit 356, the AND circuits 357 and 358, and the OR circuit 359,
The selection of which of the two signals T _5q and T _5q ′ is output as the second switching signal T _5P is performed according to the signal Y ₅ output from the commutation mode selection circuit 336.
By a similar operation, from the signal selection circuit 338 to 340 is a second switching signal T _6P through T _8P is output. In this way, the second switching signal T _5P through T _8P according to the commutation mode as described above is output from the output terminal 341 to 344.

Subsequently, when together with the polarity signal i _sgn output these switching signals T _5P through T _8P from the current polarity determination circuit 19 is input to the cycloconverter switching circuit 20, the eight semiconductor switching elements constituting the cycloconverter circuit 15 S _{5 ~S 8, S 5 '~S 8} ' each on-off signal T ₅ ~T _8, T ₅ of 'through T _8' is output. Furthermore, in accordance with these off signal _{T 5 ~T 8, T 5 '} ~T 8', the switching element _{S 5 ~S 8, S 5 '} ~S 8' performs the on-off operation.

By the above operation, the reference voltage signal of the output AC from the reference voltage generating circuit 16 ▲ V _c ^* _c ▼ voltage V _cc of the PWM waveform is output from the cycloconverter circuit 15. Further, the harmonic component of the output voltage _Vcc is removed by the filter circuit 4 connected to the output side of the cycloconverter circuit 15, and then supplied to the load circuit 13. In the second embodiment, which has the effect of the first embodiment, the semiconductor switching devices S ₅ to S ₈ of the second switching signal generating circuit 30 constitute a cycloconverter circuit 15, S ₅ 'to S ₈ 'performs the power commutation can determine whether or not the, and outputs the second switching signal according to the result, the switching element _{S 5 ~S 8, S 5'} ~S
₈ 'power supply commutation is possible, and the switching loss at the time of off can be reduced compared to the conventional forced commutation method.
A highly efficient DC-AC power converter can be obtained.

In the second embodiment, the carrier generator 6B
Has described the case of outputting a sawtooth-shaped carrier signal falling to the right, but may generate a sawtooth-shaped carrier signal or a triangular-wave-shaped carrier signal as described in the first embodiment. . However, depending on the carrier signal waveform, which of the eight semiconductor switching elements constituting the cycloconverter circuit 15 is capable of power commutation is different, and is included in the second switching signal generation circuit 30 by the carrier signal. Needless to say, the configuration of the commutation mode selection circuit 336 needs to be changed.

Further, cycloconverter switching circuit 20 in the first embodiment has a configuration for selecting the OFF signal T _n or T _{n '(n} = 5~8) by the polarity of the output current i _cc, the current detector 5 In addition, the configuration may be such that the on / off signal _Tn or _Tn ′ is the same signal regardless of the polarity of the output current _icc by omitting the current polarity determination circuit 19.

Further, when the DC-AC power converters according to the first and second embodiments are applied to an uninterruptible power supply or the like, for example, a reference value of an AC load voltage supplied to the load circuit 13 is given as a command, and the actual AC power is supplied. voltage difference obtained by amplifying the between the detected reference value the load voltage is supplied as ▼ reference voltage signal ▲ V _c ^* _c. Therefore, in such a case, the reference voltage signal generation circuit
16 is a reference signal generator for the AC load voltage supplied to the load circuit 13, a voltage detector for detecting the actual AC load voltage, and amplifies the deviation between the reference load voltage and the actual load voltage. reference voltage signal ▲ V _c ^* _c ▼ goes without saying that is composed of an amplifier for generating Te.

Next, a third embodiment of the present invention will be described with reference to FIGS. This embodiment is an example in which a three-phase AC voltage is output as an example of obtaining a multi-phase AC output. FIG. 11 shows a block configuration of the third embodiment. 4A is a filter circuit, 15A is a cycloconverter circuit, 16A is a reference voltage signal generation circuit, 18C is a first switching signal generation circuit, and 19A is current polarity discrimination. Circuit, 20A is a cycloconverter switching circuit, 30A is a second switching signal generation circuit, 13A is a three-phase load circuit connected to the DC-AC power converter, and other configurations are the same as those in the above embodiment. is there.

FIG. 12 shows a detailed configuration of the cycloconverter circuit 15A and the filter circuit 4A.
The input terminals 400 and 401 which are respectively connected to the secondary winding terminals 23, 24 of the transformer 2A, the transistors and the semiconductor switching element S ₅ to S _10, such as _{MOS FET, S 5 '~S 10} ', these Diode D _5- connected in anti-parallel with the switching element
D _10, and D ₅ '~D _10', and a connected output terminals 402 to 404 Metropolitan filter circuit 4A. The two semiconductor switching elements S _n , S _n ′ (n = 5 to 10) and the diodes D _n , D _n ′ (n = 5 to 10) connected in anti-parallel to each other control the energization direction. Constitutes a possible bidirectional switch. The filter circuit 4A is a cycloconverter circuit 15
Input terminals 405 connected to A output terminals 402 to 404, respectively
To 407, reactor L _F and converter C _F , and output terminal 4
08-410.

FIG. 13 shows a detailed configuration of the first switching signal generation circuit 18C, and input terminals 420 to 422 connected to the reference voltage signal generation circuit 16A, an input terminal 423 connected to the carrier signal generator 6B, Comparators 424 to 426, and 1/2 frequency dividers 427 to 429 in which the polarity of the output is inverted in synchronization with the rise of the input signal
, Knot circuits 430 to 432, polarity discrimination circuits 433 to 435,
It comprises output terminals 436 to 444.

FIG. 14 shows a detailed configuration of the second switching signal generation circuit 30A. The input terminals 450 to 455 connected to the output terminals 436 to 441 of the first switching signal generation circuit 18C, and the output terminals 422 to 444. Input terminals 456,458,46 connected to
0 and the input terminals 457, 45 connected to the current polarity determination circuit 19A
9,461 and XOR (exclusive or) circuits 462-464
And signal selection circuits 465 to 470 and output terminals 471 to 476.

FIG. 15 shows a detailed configuration of the cycloconverter switching circuit 20A, and a second switching signal generation circuit 30A.
Input terminals 480-485 connected to A output terminals 471-476
And input terminals 486 to 48 connected to the current polarity determination circuit 19A.
8, knot circuits 489-494, and AND circuits 495-506,
It comprises output terminals 507-518.

Next, the operation of the third embodiment will be described with reference to FIG. First, sawtooth carrier signal V _P downhill illustrating the carrier signal generator 6B at the top of Figure 16 is outputted. This carrier signal _VP is an inverter switching circuit
Is input to 17B, the inverter switching circuit 17B outputs the OFF signal T ₁ through T _4. Inverter circuit 14 according to this four semiconductor switching elements S ₁ to S ₄ is off, the duty ratio is the secondary voltage V ₂ shown in FIG. 16 of the transformer 2A is 50% of the rectangular wave voltage. The above operation is the same as in the second embodiment, and a detailed description will be omitted. continue,
From the reference voltage signal generation circuit 16A, three phases (u phase, v phase, w phase)
Phase) AC reference voltage signal ▲ V _cc ^* _u ▼, ▲ V _cc ^* _v ▼, ▲ V _cc ^*
_w ▼ is output and input together with the carrier signal V _P to the first switching signal generator circuit 18C.

Next, four semiconductor switching elements S ₅ included in the cycloconverter circuit 15A for controlling the voltage of the u phase,
The on / off operation of S ₆ , S ₅ ′, and S ₆ ′ will be described with reference to FIG. First, the first switching signal is input to the input terminal 420 of the generator circuit 18C u-phase reference voltage signal ▲ V _cc ^* _u ▼ is input to comparator 424 together with the carrier signal V _P input to the input terminal 423, comparing The signal T _Pu as shown in FIG. 16 is output from the device 424. This signal T _Pu is input to the 1/2 frequency divider 427, and the first switching signal _T5q shown in FIG. 16 is output from the output terminal 436. Also, the signal _T5q is the knot circuit 430
Input to the first switching signal T shown in FIG.
_6q is output from the output terminal 437. The polarity of ▲ _Vcc ^* _u is determined by the polarity determination circuit 433, and is output from the output terminal 442 as a u-phase voltage polarity signal _Vsgu . The first switching signals T _5q and T _6q are converted into the switching signals T _5P and T _6P via the second switching signal generation circuit 30A as polarity signals i of the u-phase current i _ccu output from the current polarity determination circuit 19A.
_sgu is input to a cycloconverter switching circuit 20A, and the circuit 20A receives an on / off signal T in accordance with the following equation:
₅ , T ₆ , T ₅ ′, and T ₆ ′ are output.

When the polarity of i _ccu is a positive (i _sgu level of is high): However, the polarity of _iccu is positive when a current flows from the cycloconverter circuit 15A to the filter 4A. OFF signal _{T 5, T 6, T 5} ', T 6' cycloconverter circuit 15A in accordance with the
The semiconductor switching elements S ₅ , S ₆ , S ₅ ′, and S ₆ ′ perform on / off operations, and the PWM-modulated voltage V _uo shown at the bottom of FIG. Since this V _uo is the output voltage from the output terminal 402 to the input terminal 401, the semiconductor switching element S ₆ or S ₆ 'is V _uo = 0 is turned on.

Next, the semiconductor switching element S ₅ of cycloconverter circuits _{15A, S 6, S 5 '} , S 6' will be described commutation of. First, the u-phase output voltage V of the cycloconverter circuit 15A
The case where the polarities of _ccu and u-phase output current i _ccu are both positive will be described. Here, u-phase output voltage V _ccu output neutral voltage V ₀ that is, the output terminal of the cycloconverter circuits 15A 402 to 404
Is the voltage of the output terminal 402 with respect to the voltage obtained by adding all the potentials and multiplying by 1/3.

That is, V _ccu = V _u0 −V ₀ (10) where V ₀ = (V _u0 + V _v0 + V _w0 ) / 3, and its fundamental wave component matches the u-phase reference voltage signal V _ccu . Now, since the polarities of V _ccu and i _ccu are both positive,
The semiconductor switching elements S ₅ and S ₆ are turned on and off according to the first switching signals T _5q and T _6q , respectively, based on the relationship of the equation (9). Next, between these switching elements, the 16th
Commutation is performed at the timings indicated by 1 and 2 in the figure. That is,
From S ₅ to S ₆ in the first timing, S ₆ in second timing
Each commutation to S ₅ is made from. Here, when examining the commutation to S ₆ from S ₅ in one of the timing, the polarity of the secondary voltage V ₂ of the transformer 2A when commutation by FIG. 16 is negative, S in FIG. 12 When turning on the ₆ S ₅ be turned off is reverse biased, it can be seen that that is, power can be commutated. Similarly, it can be seen that power commutation is also possible at the timing of 2.

Next, the u-phase output voltage V of the cycloconverter circuit 15A
In the polarity of _ccu positive, the polarity of u-phase output power i _ccu will be described for the case of negative. In this case, the semiconductor switching element
S ₅ ′ and S ₆ ′ are turned on and off according to the first switching signals T _5q and T _6q , respectively, based on the relationship of equation (9). next,
Between these switching elements S ₅ ′ and S ₆ ′, FIG.
Commutation is performed at the timings indicated by 3 and 4. That is, at the timing of 3, from S ₅ ′ to S ₆ ′, at the timing of 4,
Commutation is performed from S ₆ ′ to S ₅ ′. Here, when examining the commutation from S ₅ ′ to S ₆ ′ at the timing of 3,
Since the polarity of the secondary voltage V ₂ of the transformer 2A when commutation from FIG. 16 is negative, the 'S ₅ is turned on the' S ₆ in FIG. 12 is forward biased, S ₅ 'will not off It turns out that power commutation is impossible. Similarly, it can be seen that power commutation is not possible even at the timing of 4.

Similarly, when the polarity of the u-phase output voltage V _ccu is negative, the result is that if the polarity of the u-phase output voltage V _ccu and the polarity of the u-phase output current i _ccu are the same, two switching elements are used.
It can be seen that power supply commutation between S ₅ and S ₆ (or S ₅ ′, S ₆ ′) is possible, and when the polarity is different, power supply commutation is impossible.
When the power supply commutation is used, at least the off timing of the switching signal (the timing at which the signals T _5q and T _6q change from high to low in FIG. 16) is changed as described in the second embodiment. It only has to be delayed by the flow time.

Next, the operation of the second switching signal generation circuit 30A omitted in the above description will be described. First, the polarity signal i of u-phase output currents i _ccu of the first switching signal generator circuit 18C u-phase voltage outputted from the polarity signal V _sgu and current polarity discriminating circuit 19A is output from the cycloconverter circuit 15A
_sgu is input to the XOR circuit 462 via the input terminals 456 and 457,
Polarity signal V _sgu from the XOR circuit 462, when the level of the i _sgu are the same (i.e., when the polarity of u-phase output voltage V _ccu and the output current i _ccu of cycloconverter 15A is the same) is at a high level, the polarity signal V _sgu, Low level signal Y when the level of i _sgu is different
_u is output. Subsequently, the first switching signal generator circuit 18C output from the switching signal T _5q, T _6q is input through the input terminal 450 and 451, is inputted together with the signal Y _u to the signal selection circuit 465 and 466. In response, the signal selection circuits 465 and 466 output the second switching signals T _5P and T _6P corresponding to the commutation mode from the output terminals 471 and 472. The configuration and operation of the signal selection circuits 465 and 466 are the same as those of the second embodiment (see FIG. 9 (c)), and the description is omitted. Second switching signals T _5P, T _6P is inputted through the input terminal 480,481,486 with polarity signal i _sgu the u-phase output currents i _ccu output from the current polarity determination circuit 19A to the cycloconverter switching circuit 20A, (9) four semiconductor switching elements S ₅ of cycloconverter circuit 15A according to the relation of the _{formula, S 6, S 5 ',} S 6' from off signal _{T 5, T 6, T 5} ', T 6' is output 507-510 of Output, switching elements S ₅ , S
_{6, S 5 ', S 6} ' is turned on and off.

Next, the voltages of the v-phase and the w-phase are similarly controlled.
That is, the input terminal 4 is connected to the first switching signal generation circuit 18C.
The v-phase reference voltage signal V ^* _{c cv} ▼ and the w-phase reference voltage signal ▲ output from the reference voltage signal generation circuit 16A via 21,422.
If you type V _c ^* _{c w} ▼, respectively, the first switching signal T _7q through T _10q is output from the output terminals 438 to 441. The output terminals 443 and 444 output v-phase and w-phase voltage polarity signals V _sgv and V _sgw . Subsequently, the first switching signal T _7q through T _10q and the voltage polarity signal V _sgv, V _sgw the v-phase output currents i _ccv output from the current polarity determination circuit 19A output from the first switching signal generator circuit 18C and w-phase output currents i _ccw polarity signal i _sgv, with i _sgw inputted to the input terminal 452～455,458～461 of the second switching signal generating circuit 30A, rolling from the case as well as an output terminal 473 to 476 of u-phase second switching signals T _7P through T _10P corresponding to the flow mode is output. The second switching signal T _7P through T _10P polarity signal i _sgv output from the current polarity determination circuit 19A, i _sgw
Together with the input terminals 482 to 485, 487, 488 of the cycloconverter switching circuit 20A, and the output terminals 511 to 5
From 18 on-off signals T _{7 to} T ₁₀ of the semiconductor switching elements S _{7 to} S ₁₀ and S ₇ ′ to S ₁₀ ′ of the cycloconverter circuit 15A,
T ₇ ′ to T ₁₀ ′ are output, and the switching elements S _{7 to} S ₁₀ and S ₇ ′ to S ₁₀ ′ are turned on and off in accordance with the signals T _{7 to} T ₁₀ and T ₇ ′ to T ₁₀ ′.

By the above operation, the three-phase AC reference voltage signals ▲ V _cc ^* _u ， and VV _cc ^* _v output from the reference voltage signal generation circuit 16A.
^{_{▼, ▲ V cc * w ▼}} 3 -phase AC voltage V _ccu which are respectively PWM modulated in accordance with, V _ccv, V _ccw is output from the cycloconverter circuit 15A, 3-phase connected to the output side of the cycloconverter circuits 15A 3-phase AC voltage by the filter circuit 4A
After V _ccu, V _ccv, harmonic components contained in V _ccw is removed,
It is supplied to a three-phase load.

〔The invention's effect〕

As described above, according to the present invention, since the PWM modulation is performed by the cycloconverter circuit, the switching of the inverter circuit may be performed so that the duty ratio of the secondary voltage of the transformer becomes a rectangular wave voltage of 50%. Therefore,
When it is desired to output a polyphase AC voltage, only the cycloconverter circuits may be connected in parallel, and each cycloconverter circuit may be individually subjected to PWM modulation. In a conventional inverter circuit application device, a DC bus system in which a DC power supply input to the inverter circuit is shared is widely used. However, in the DC-AC power conversion device according to the present invention, the duty ratio is 50%. Is regarded as a common AC voltage, there is an effect that a highly flexible power supply system can be configured. Furthermore, when the reference signal of the AC voltage to be output from the cycloconverter circuit and the polarity of the output current of the cycloconverter circuit are the same, the switching of the cycloconverter circuit is performed by power supply commutation, so that the switch is forcibly set. The switching loss can be reduced, and the DC-AC power converter with high efficiency can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention, FIG. 2 is a block diagram showing an inverter circuit / transformer and a cycloconverter circuit of each embodiment of the present invention, and FIG. FIG. 4 is a block diagram showing an inverter switching circuit according to a first embodiment of the present invention, FIG. 4 is a block diagram showing a switching signal generating circuit according to a first embodiment of the present invention, and FIG. 5 is a cycloconverter switching circuit according to each embodiment of the present invention. FIG. 6 is an explanatory diagram of a switching pattern according to the first embodiment of the present invention, FIG. 7 is a block diagram illustrating a second embodiment of the present invention, and FIG. 8 is a second embodiment of the present invention. FIG. 9 is a block diagram showing a first switching signal generation circuit of the embodiment, FIG. 9 is a block diagram showing a second switching signal generation circuit of the second embodiment of the invention, and FIG. 10 is a second switching signal generation circuit of the invention. Real Examples switching pattern illustration of,
FIG. 11 is a block diagram showing a third embodiment of the present invention.
FIG. 12 is a block diagram showing a cycloconverter circuit and a filter circuit according to a third embodiment of the present invention, and FIGS.
FIG. 15 is a block diagram showing first and second switching signal generating circuits according to a third embodiment of the present invention. FIG. 15 is a block diagram showing a cycloconverter switching circuit according to a third embodiment of the present invention. FIG. 17 is a diagram illustrating a switching pattern of a third embodiment of the present invention, FIG. 17 is a block diagram illustrating a conventional DC-AC power converter, and FIG. 18 is a diagram illustrating a switching pattern of the conventional DC-AC power converter. It is. 2A: Transformer, 4, 4A: Filter circuit, 5: Current detector, 6A, 6B: Carrier signal generator, 12: DC power supply, 1
3,13A …… Load circuit, 14 …… Inverter circuit, 15,15A…
… Cycloconverter circuit, 16, 16A …… Reference voltage signal generation circuit, 17A, 17B …… Inverter switching circuit, 18A
... A switching signal generating circuit, 18B, 18C, a first switching signal generating circuit, 19, 19A, a current polarity discriminating circuit, 20, 20A, a cycloconverter switching circuit,
30,30A... Second switching signal generation circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

(57) [Claims] 1. An inverter circuit for converting DC to AC,
A cycloconverter circuit that exchanges frequencies, a transformer whose input side is connected to the inverter circuit and whose output side is connected to the cycloconverter circuit, a current detector that detects the output current of the cycloconverter circuit, and the polarity of this output current A current polarity discriminating circuit for discriminating a carrier signal, a carrier signal generator for generating a carrier signal of a constant frequency, an inverter switching circuit for generating an on / off signal to the inverter circuit in synchronization with the carrier signal, and a cyclo-converter circuit for output A reference voltage signal generation circuit that outputs a reference signal of an AC voltage; a switching signal generation circuit that receives a reference voltage signal, an output of a current polarity determination circuit and a carrier signal, and generates a switching signal by pulse width modulation; The output of the current polarity determination circuit is A switching circuit for generating an on / off signal to the converter circuit, wherein the switching signal generation circuit switches the cycloconverter circuit by power commutation when the polarity of the reference voltage signal and the output current is the same. A DC-AC power converter that outputs such a switching signal.