JP2583564B2 - Photoelectric conversion device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion device that removes sensor noise from a sensor output read from a photoelectric conversion element.

[Related Art] As a method of removing sensor noise from a sensor output, a method of refreshing a sensor after a read operation, reading a residual component after the refresh as sensor noise, and performing a difference process between the sensor output and the sensor noise is known. is there.

Various improvements by this method have been disclosed by the present applicant in Japanese Patent Application Nos. 61-229625, 62-1223872 and 62-1945.
It is described in No. 25 etc.

In these methods, in order to obtain an output with a high SN ratio, it is necessary to sufficiently remove the residual component of the signal read by the refresh operation. Further, the reading operation of the sensor noise is desirably performed by driving in the same manner as the reading operation of the sensor output because it is necessary to increase the correlation (approximation) between the noise component included in the sensor output and the read sensor noise. .

[Problems to be Solved by the Invention] However, it is difficult to perform such a sufficient refresh operation in a short time, and in particular, in the gate separated type sensor described in Japanese Patent Application No. 62-17150 by the present applicant. However, it takes time because the base resistance is large.

For example, when an NTSC area sensor is configured, one horizontal scanning period is 63.5 μsec, and about 10 μsec is a horizontal blanking period. Therefore, it is necessary to perform the read operation and the refresh operation of the sensor within about 10 μsec.

However, in the above-described gate-separated sensor, a sufficient refresh operation including the complete refresh and the transient refresh cannot be completed within 10 μsec.

Therefore, a method is considered in which one horizontal effective scanning period is set as a complete refresh operation period, and a time difference between the sensor output and the sensor noise in one horizontal period is compensated.

FIG. 5 is a schematic configuration diagram showing a method of delay compensation in a conventional photoelectric conversion device.

As shown in the figure, the sensor output S1 from the sensor unit 501
Is delayed by 1H by the delay unit 502, and the sensor noise N1
At the same time, it is input to the differential amplifier 503. As a result, the sensor noise N1 approximate to the noise component can be removed from the sensor output S1.

However, if the delay processing of the sensor output is performed by the delay unit 502 which is an external circuit of the sensor unit 501 as in the related art, since the dynamic range of the sensor output S1 is large, the signal level of the delay unit 502 is low when the NS ratio is poor. You need to make settings. In particular, at the time of low-illuminance imaging, if the gain is increased by a process circuit or the like in order to increase the sensitivity of the camera, there is a problem that the noise of the delay unit becomes more conspicuous than the sensor noise.

Further, conventionally, low-frequency noise and external low-frequency noise generated in an output amplifier cannot be effectively removed.

An object of the present invention is to effectively remove a noise component from a sensor output and obtain a sensor signal having a higher SN ratio than the conventional one and faithfully reflecting optical information.

[Means for Solving the Problems] To achieve the above object, a photoelectric conversion device according to the present invention comprises: a plurality of photoelectric conversion elements arranged in a row and a column direction; A first row memory for reading and accumulating the sensor outputs of the photoelectric conversion elements in a predetermined first row during a first horizontal blanking period, and thereafter storing the photoelectric conversion elements in the first row in one horizontal period A second row memory that refreshes and reads and accumulates sensor noise remaining in the photoelectric conversion elements of the first row in a subsequent second horizontal blanking period; and a second row memory in the second horizontal blanking period. A third row memory that accumulates sensor outputs of the photoelectric conversion elements in a row; and a differential processing of outputs from the first and second row memories in a second horizontal period after the second horizontal blanking period. Difference processing means, the second water The photoelectric conversion elements in the second row are refreshed for one horizontal period in a normal period, and sensor noise remaining in the photoelectric conversion elements in the second row is read out in a subsequent third horizontal blanking period to read out the second row. Accumulate in the row memory of
Control means for controlling output of the second and third row memories to be subjected to difference processing by the difference processing means in a third horizontal period after the third horizontal blanking period. I do.

[Operation] By providing the accumulation means for compensating the read time difference between the sensor output and the sensor noise for a desired scanning period, an external circuit for delay compensation becomes unnecessary, the external circuit noise is eliminated, and the SN ratio of the sensor signal is reduced. improves.

In addition, since the sensor output is temporarily stored in the row memory and the sensor noise is read out and subjected to the difference processing one horizontal period after that, the dispersion of each photoelectric conversion element can be corrected. Is stored in another row memory, it is possible to continuously perform such a difference process in the area sensor.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic circuit diagram of a first embodiment of the photoelectric conversion device according to the present invention.

The sensor cell in the present embodiment is a gate-separated sensor described in Japanese Patent Application No. 62-17150, in which n line sensors are arranged in m rows to form an m × n area sensor.

The control electrodes 4 of the sensors are connected in common for each horizontal line, and each horizontal line is connected to a parallel output terminal of the vertical scanning unit 1. The vertical scanning unit 1 includes a shift register and a buffer. The vertical scanning unit 1 drives the drive voltage Vr according to the timing of the pulses φv ₁ and φv ₂ input to the shift register.
Is sequentially output to each horizontal line to which the control electrode 4 is connected.

The output electrode 3 of each sensor is a vertical line VL for each column.
Are connected to each other. Each vertical line is a transistor
Qt ₁ ~Qt ₃ is connected to the capacitor CT ₁ to CT ₃ for storing via a further transistor Q ₁ to Q ₃ through the output line SL ₁ to S
They are respectively connected to L _3.

Here, the switching control pulse φt ₁ ~φt ₃ respectively input to the gate electrode of the transistor Qt ₁ ~Qt ₃ is performed. Also,
In transistors Q _{1 to} Q ₃ corresponding to each horizontal line,
Transistor to the gate electrode of the transistor Q ₁ and Q ₂
Scan pulses φh _{1 to} φhn from the horizontal scanning unit 2 are directly input to the gate electrode of the transistor Q ₃ via Qh ₁ and Qh ₂ , respectively, to perform opening / closing control.

Each gate electrode of the transistor Qh ₁ and Qh ₂ is commonly connected to each vertical line, pulse φh the transistor Qh ₂
But the pulse obtained by inverting the pulse φh by the inverter INV is input to the transistor Qh _1.

Note that both ends of each vertical line are transistors Qr and Qc
, And each transistor is controlled to open and close by pulses φvc and φc.

Output line SL ₃ is connected to the output amplifier 5 outputs the sensor noise N. The output lines SL ₁ and SL ₂ are connected to the output amplifier 6 via the transistors QL ₁ and QL ₂ and output a sensor output S.

Here, the gate electrodes of the transistors QL ₁ and QL ₂
A pulse obtained by inverting the pulse φh and the pulse φh are input, and opening / closing control is performed. The input terminal of the output lines SL ₁ to SL ₃ and the output amplifier 5 and 6 are grounded through a transistor Qhc which is opened and closed controlled by a pulse [phi] HC.

Next, the operation of the present embodiment having such a configuration will be described.

FIG. 2A is a timing chart for explaining the operation of the present embodiment, and FIG. 2B is an explanatory diagram showing signal read timing.

The timing chart in FIG (A), which has shown the period BLK1, fH ₁ and BLK2 in FIG (B), therefore, at the time the BLK1 starts the sensor output of the line sensor in the first row S1 It is already in a state of being accumulated in the capacitor CT _1. The line sensor of the first row indicates complete refresh is performed during a period fH _0, the base of the transistor Tr is set to an equipotential.

(Period T ₁ ) When the horizontal blanking period BLK1 starts, the pulse φt ₂
And φt ₃ rise, and transistors Qt ₂ and Qt ₃ are turned on. Since the pulse φc transistor Qc at high level in the ON state, the residual charge in the capacitor CT ₂ and CT ₃ are cleared.

(Period T ₂ ) Since the drive pulses φv ₁ and φv ₂ input to the vertical scanning unit 1 have not changed, the vertical scanning unit 1 is still in the first position.
You have selected a row.

Therefore, when the drive voltage Vr rises to a positive voltage, the transistor Qc is turned on by the pulse φc.
A transient refresh operation of the line sensor of the row is performed.

In the transient refresh operation, carriers remaining in the base after the complete refresh are removed using a transistor operation. That is, the positive drive voltage Vr
Is input to the control electrode 4, the base potential of the transistor Tr rises through the capacitor Cox of the sensor, the base-emitter is forward-biased, and the carriers (here, holes) accumulated in the base become the transistors Qc and It is removed to the emitter side grounded through Qr.

(Period T ₃ ) While maintaining the drive voltage Vr at a positive voltage, the pulse φc is set to the low level to turn off the transistor Qc. Thus, the signal after the refresh in each cell of the first row line sensor, i.e., sensor noise N1 is transferred to the capacitor CT ₃ through the transistor Qt _3.

Thus, the sensor outputs S1 transferred in front of the horizontal blanking period BLK0 is the capacitor CT _1, sensor noise N1
There are respectively stored in the capacitor CT _3.

Then, after a lapse of the period T _3, the drive voltage Vr falls to the ground potential, transistor Qt ₃ and pulse φt ₃ also fall of
Is turned off. Then, drive pulses φv ₁ and φv ₂
, The vertical scanning unit 1 selects the line sensor in the second row.

(Period T ₄ ) Pulses φt ₂ and φc rise and capacitor CT ₂
After clearing the, perform the operation in the period T _4. Here, the transistor Qt ₂ remains ON, and the pulse φc is at a low level, so that the vertical line is in a floating state.

In this state, the drive voltage Vr rises to a positive voltage, and the read operation of the line sensor in the second row is performed. That is, when a positive voltage is applied to the control electrode 4, the base potential of the transistor Tr increases. Thus the base-emitter is forward bias is read based storage voltage to the emitter side, is stored as a sensor output S2 in the capacitor CT ₂ through the transistor Qt _2.

The above operation is performed within the horizontal blanking period BLK1.

(Period T ₅₎ This period corresponds to the effective horizontal scanning period. That is,
A period sequentially reading outside in accordance with the timing of the scanning pulse φh of the sensor output S1 and sensor noise N1 which are respectively accumulated in the capacitor CT ₁ and CT ₃ in each vertical line from the horizontal scanning unit 2. In parallel with this, it is also a period during which the complete refresh operation of the line sensor in the second row is performed.

First, in this period, the pulse φh1 is in the ON state because a low level and the transistor QL ₁ which is connected to the transistor Qh ₁ and the output line SL ₁ corresponding to the vertical line.

First, when the scan pulse φh ₁ rises, the transistor Q ₁
And Q ₃ is turned ON, are respectively transferred to the sensor output S1 and sensor noise N1 is output lines SL ₁ and SL ₃ cells S ₁₁ that are respectively stored in the capacitor CT ₁ and CT _3, the external through the output amplifier 5 and 6 Are output simultaneously. That is, since the time difference of one horizontal scanning period between S1 and N1 is compensated in the sensor unit, it is not necessary to provide a delay unit as in the related art outside, and noise caused by the delay unit can be eliminated.

Hereinafter, similarly, at the timing of the scanning pulses φh _{2 to} φhn,
Sensor output S1 and sensor noise N1 of the sensor cell S ₁₂ to S ₁ n of the first row are sequentially output. Each time a signal is output, the transistor Qhc is turned on by the pulse φhc in order to reset the residual charge on the output line.

In still period T _5, by driving voltage Vr falls to a negative voltage, a complete refresh of the second row of sensors. Since the complete refresh can be performed for a sufficiently long time, the base potential of the line sensor in the second row can be made uniform regardless of the storage voltage.

Thus, the sensor output S1 and the sensor noise N1 in the first row
Is read, the sensor noise N2 of the cells in the second row and the sensor output N3 of the cells in the third row are transferred in the next horizontal blanking period BLK2.

At that time, because it is transferred to the capacitor CT ₂ accumulated in the second row of the sensor output S2 already period BLK1, clears the capacitor CT ₁ and CT _3, transient refresh of the second row of the sensor is performed later, sensor noise N2 in the second row are transferred to the capacitor CT _3.

Then, the vertical scanning unit 1 selects the third line is transferred to the capacitor CT ₁ reads the third row of the sensor output S3.

Thus, the sensor output S2 and the sensor noise N2 of the second row are output. At this time, since the pulse φh is at the high level, the transistor Qh ₂ corresponding to each vertical line is output.
A transistor QL ₂ connected to the output line SL ₂ and is ON. Therefore, the sensor output S2 and the sensor noise N2 in the second row are sequentially output to the outside by the scanning pulses φh and φhc.

Hereinafter, the same operation is repeated to output the sensor output and the sensor noise up to the m-th row.

Thus, in this embodiment, after performing a complete refresh in period T _5, in order to perform even transient refresh, the noise component included in the sensor output, the better the correlation between the sensor noise read, It greatly contributes to noise reduction.

FIG. 3 is a schematic configuration diagram of a second embodiment of the present invention.

As shown in the drawing, the horizontal shift register 306 and readout circuit 304 and the horizontal shift register 307 and readout circuit 305 are sequentially selected by the m × n sensor 301 by the vertical shift register 302 and the buffer 303.
Are used to alternately read even and odd columns.

With this configuration, the horizontal shift register 306
And 307 can be driven at a low frequency, and circuit design becomes easy.

FIG. 4A is a schematic configuration diagram of the third embodiment of the present invention, and FIG. 4B is a timing chart for explaining the operation.

3A, a sensor unit 401 has the configuration shown in FIG. 3, and its sensor Sa and sensor noise Na, and similarly Sb and Nb, are input to differential amplifiers 402a and 402b, respectively. Removed. Each of the sensor signals from which noise has been removed is synthesized by the adder 405 through the clamp circuits 403a and 403b and the sample and hold circuits 404 and 404b, and output as an NTSC signal through the low-pass filter 406 and the process circuit 407.

The timing of driving, clamping, and sample-and-hold of the sensor 401 is controlled by a clock pulse from the clock circuit 408.

Next, the operation of this embodiment will be described with reference to FIG.

First, the sensor noise Nb is removed from the sensor output Sb,
When the sensor signal is output from the clamp circuit 403b, the pulse CP1 is input to the clamp circuit 403a and the sample and hold circuit 404b.

As a result, in the clamp circuit 403a, the output line SL, the output amplifiers 5 and 6, the amplifier 402a, and other low-frequency noise caused by disturbances and the like are clamped. In the sample-and-hold circuit 404b, the low-frequency noise and the like are clamped in the clamp circuit 403b. The removed sensor signal is held.

The sample and hold circuit 404a can reduce capacitance division noise due to the capacitor CT, the output line SL, and the like.

Subsequently, when the driving pulse φH ₁ is input to the horizontal shift register 306 and the next scanning pulse is output, the next sensor output Sa and sensor noise Na are input to the differential amplifier 402a,
The low-frequency noise and the like are removed by the clamp circuit 403a, and output to the sample-and-hold circuit 404a.

In this state, the pulse CP2 is output from the clock circuit 408,
The sensor signal from which the low-frequency noise or the like has been removed is held by the sample-and-hold circuit 404a, and the low-frequency noise or the like of the differential amplifier 402b system is clamped by the clamp circuit 403b.

In the same manner, the sensor signal from which various noises have been removed is input to the adder 405 and the process circuit 4 outputs the NTSC signal.
Output from 07.

In this embodiment, after reading out the noise Nn, the sensor base is reverse-biased to shift to the accumulation state, and after accumulation, the forward bias driving is performed again to read out the signal Sn + ₁ .

However, the noise Nn included in the noise Nn and the signal Sn + ₁
Considering n ', the noise Nn is the first readout,
The noise Nn 'is the second reading. In such a multiple reading mode, the signal and the noise need to be considered separately.

First, in reading a signal a plurality of times, as the number of readings increases, a part of the base signal charge is destroyed, and the signal level decreases. Conversely, noise tends to increase as the number of readings increases. This is considered to be due to the feedback effect.

Since the present embodiment corresponds to reading noise multiple times,
In order to effectively remove noise, it is necessary to adjust the levels of each other.

As a method of adjusting the signal level, the second read output may be made smaller than the first read output, or conversely, the first read output may be made larger.
As another method, the level can be adjusted by shortening the second reading time with respect to the first reading time to lower the second reading efficiency.

Since the repetitive transfer of the pulses CP1 and CP2 can be set to 180 °, the hold duty becomes 50%, and a decrease in signal output can be prevented.

The present invention is also applicable to a multi-horizontal-line simultaneous reading system. For example, in the two-horizontal-line simultaneous reading method, it is sufficient to provide four capacitors for signal accumulation and two capacitors for noise accumulation corresponding to two horizontal lines.

[Effects of the Invention] As described above in detail, the photoelectric conversion device according to the present invention is provided with the accumulation means for compensating the read time difference between the sensor output and the sensor noise for a desired scanning period, thereby providing delay compensation. No external circuit is required, and external circuit noise is eliminated, and the SN ratio of the sensor signal is improved.

Further, since the sensor output is temporarily stored in the row memory, and the sensor noise is read out and stored in the row memory one horizontal period after that, and the output of each row memory is subjected to the difference processing, the variation of each photoelectric conversion element is corrected. Can be done,
Further, since the sensor output of the next row is stored in another row memory during the difference processing, it is possible to continuously perform such a difference processing in the area sensor.

[Brief description of the drawings]

FIG. 1 is a schematic circuit diagram of a first embodiment of the photoelectric conversion device according to the present invention, FIG. 2 (A) is a timing chart for explaining the operation of the present embodiment, and FIG. FIG. 3 is a schematic configuration diagram of a second embodiment of the present invention, FIG. 4 (A) is a schematic configuration diagram of a third embodiment of the present invention,
FIG. 4 (B) is a timing chart for explaining the operation, and FIG. 5 is a schematic configuration diagram showing a delay compensation method in a conventional photoelectric conversion device. 1 Vertical scanning unit 2 Horizontal scanning unit 3 Output electrode 4 Control electrode 5, 6 Output amplifier 402a, 402b Differential amplifier 403a, 403b Clamp circuit 404a, 404b Sample Hold circuit

Claims (1)

(57) [Claims] A plurality of photoelectric conversion elements arranged in a row and a column direction, and a sensor output of a photoelectric conversion element in a predetermined first row among the plurality of photoelectric conversion elements is supplied to a first horizontal block. A first row memory that reads and accumulates during the ranking period; and thereafter, refreshes the photoelectric conversion elements of the first row over one horizontal period, and then performs photoelectric conversion of the first row during a second horizontal blanking period. A second row memory that reads and accumulates sensor noise remaining in the element, a third row memory that accumulates a sensor output of a photoelectric conversion element in a second row during the second horizontal blanking period, Differential processing means for performing differential processing on the outputs of the first and second row memories in a second horizontal period after two horizontal blanking periods; and photoelectric conversion of the second row in the second horizontal period. Element 1
Refreshing is performed over a horizontal period, and sensor noise remaining in the photoelectric conversion elements of the second row is read out and stored in the second row memory during a subsequent third horizontal blanking period, and the third horizontal blanking is performed. Control means for controlling output of the second and third row memories to be subjected to difference processing by the difference processing means during a third horizontal period after the period.