JP2587526B2 - Common driver circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a common driver circuit for driving a heavy capacitive load such as a common electrode of a liquid crystal panel.

2. Description of the Related Art As shown in FIG. 6, a common driver circuit incorporated in a conventional liquid crystal display device includes a buffer amplifier (1) to which a common amplitude signal (frame pulse) (FP) is input and a variable resistor (2). And a common amplitude signal is adjusted by adjusting the bias. The DC component of the output of the buffer amplifier (1) is removed by a DC cut capacitor (C ₁ ), and a common bias is newly provided by a variable resistor (3). Thus, a common bias is applied to the common electrode of the liquid crystal panel by the common amplitude signal (FP) and the variable resistor (3).

SUMMARY OF THE INVENTION As described above, in the conventional example, a buffer amplifier (1) is used to obtain an amplitude signal to which a common bias is applied.
The DC component of the output from had to be cut by the capacitor (C ₁ ). Therefore, a large-capacity capacitor was required as the capacitor (C ₁ ) to switch the common for each field. In addition, a variable resistor (3)
Since the common bias depends on the power supply voltages Vcc and -VEE applied to the power supply, when these power supply voltages fluctuate, the common bias also fluctuates and adversely affects the liquid crystal panel.

As shown in FIG. 6, a method has been adopted in which the common output is conventionally cut by a capacitor (C ₁ ), then the DC component is cut off, and the bias is again applied by resistance division. Up to 8Vpp, and depending on the bias applied,
In some cases, -VEE connected to the bias adjustment (VR) in (3) cannot be adjusted at the same voltage as the source power supply voltage of the panel. Therefore, -VEE is a lower voltage (-21V)
Had to take from. Since this voltage fluctuates independently of the fluctuation of the source power supply voltage of the panel, there is a drawback that a direct current is applied to the panel when the power supply is not stable.
If the voltage determining this bias can be taken from the same power supply line as the source power supply voltage of the panel, even if the source power supply voltage fluctuates, the bias set in (3) also fluctuates in the same direction according to the fluctuation. DC is less likely to be applied to the panel. Further, in the panel specifications, it is necessary to suppress both the fluctuation of the center voltage of the video signal applied to the source driver and the fluctuation of the center voltage of the common even under conditions such as fluctuation of the signal content and power supply. The video signal has already been fed back and is stable, but the common signal has not always been kept to the specifications for the above-mentioned reasons.

The present invention has been made in view of such a point,
An object of the present invention is to provide a common driver circuit capable of supplying a common output to which a stable bias is given without causing a fluctuation of a common bias and eliminating the need for a large-capacity DC cut capacitor.

Means for Solving the Problems In order to achieve the above object, according to the present invention, in a common driver circuit for driving a liquid crystal panel, an output circuit comprising a buffer amplifier or a voltage follower capable of sufficiently driving a capacitive load, and the output circuit Means for supplying a common signal and a common bias, bias setting means for setting the common bias, and a common bias set by the bias setting means by detecting a DC level of the output circuit and using the detected output. And control means to be held.

According to such a configuration, the common bias from the bias setting means is given to the output circuit, and when the common bias fluctuates, the fluctuation is compensated by the control means, so that it is always kept constant. .

Embodiment FIG. 1 is a block diagram showing the entire configuration of a liquid crystal display device incorporating a common driver circuit, FIG. 2 is a block diagram of a common driver circuit shown as one embodiment of the present invention, and FIG. 2 is a circuit diagram showing a specific circuit configuration of each block, and FIG. 4 is a signal waveform diagram of a signal in each section of FIGS. 1 and 3.

In the liquid crystal display device shown in FIG.
The LCD panel (40) consisting of a film transistor array) has a gate driver (40a), a source driver (40b), and a common driver (39), and from the liquid crystal panel controller (38) to the gate driver (40a). A gate driver drive signal, a source driver drive signal to the source driver (40b), and a common signal generation signal to the common driver (39) are input.

The video signal is input to the sync separation circuit (31) and the Y / C separation circuit (33). The synchronization signal separated by the synchronization separation circuit (31) is input to the liquid crystal panel controller (38) and the clamp pulse generator (32). Y / C
The separation circuit (33) separates the video signal into a luminance signal and a chroma signal, and inputs the separated signals to a video chroma signal processing circuit (34). The R, G, B primary color signals are output from the video chroma signal processing circuit (34) and input to the brightness / contrast control / gamma correction circuit (35). The clamp pulse of the clamp pulse generator (32) is input to a video chroma signal processing circuit (34) and a brightness / contrast control / gamma correction circuit (35). The primary color signals R, G, B of the brightness / contrast control / gamma correction circuit (35) are processed by an inverter circuit (36) and input as a video signal output from a driver circuit (37) to a source driver circuit (40b). You.
The liquid crystal panel controller (38) receives the synchronization signal from the synchronization separation circuit (31) and, as shown in FIG.
Input a clock ck with a sine waveform of z or more, create and output a gate driver drive signal and a source driver drive signal as a panel control signal, and at the same time, as a frame pulse (FP) or frame pulse synchronized with the signal 0 to 5 at 15 KHz as shown in Fig. 4b
A common signal generation signal is output as a V horizontal period signal. The frame pulse output from the liquid crystal panel controller (38) is input to the inverter (36) and the common driver (39). 4 to 5 V as shown in FIG. 4b as an inversion pulse inputted to the common driver (39).
The 15 KHz horizontal periodic signal of the DC level is input from the terminal (10) shown in FIG. 2 to the buffer amplifier (11) as a common amplitude signal. This buffer amplifier (11) has a control section (12) for controlling bias and amplitude.
Is connected. The control unit (12) supplies the set value set by the variable amplitude regulator (13) to the buffer amplifier (11), and applies the bias set by the variable bias volume (14) to the DC level fed back from the output circuit to the comparator. And the bias is varied according to the comparison output and applied to the buffer amplifier (11). The operational amplifier (15) connected to the buffer amplifier (11) has its (+) input terminal receiving the output from the buffer amplifier (11) in FIG.
-1V to -7V with -4V as center bias as shown in
The pulse is supplied as a pulse signal having a DC level of, and the output of the operational amplifier (15) is connected to a buffer transistor (Q ₁ ) so as to sufficiently drive a heavy capacitive load.
(Q ₂ ) is connected as shown, and its output point (a)
To the (−) input terminal. As a result, the operational amplifier (15) and the buffer transistor (Q ₁ )
(Q ₂ ) constitutes a voltage follower. This voltage follower forms an output circuit (18), and the output point (a) is connected to the common electrode of the liquid crystal panel, and the output point (a) of FIG.
-1V to -7V with -4V as center bias as shown in
It is supplied as a pulse signal having a DC level of, but is also connected to a low-pass filter (16) composed of a resistor (R ₁ ) and a capacitor (C ₁ ). The output of the low-pass filter (16) is supplied to the control section (12) through a feedback circuit (17) as a -4 V signal as shown in FIG. 4e. The feedback circuit (17) is composed of an operational amplifier as shown in FIG. 3. The output of the low-pass filter (16) is applied to its positive input terminal, and the power supply voltage + Vcc is applied to its negative input terminal for 1/2. The compressed voltage Vcc / 2 is applied. The output of the feedback circuit (17) is converted into a signal of −4 V as shown in FIG.
0), coupled to one input terminal of the operational amplifier (21). The reference voltage generation circuit (20) and the operational amplifier (2
The other input terminal of 1) is a variable bias regulator (14)
Is applied. The output of the reference voltage generation circuit (20) is converted from the low-pass filter (16) into a feedback signal (FIG. 4g) as a pulse signal whose DC level and amplitude are varied by VRs (13) and (14). The bias applied to the buffer amplifier (11) is controlled so that the DC voltage applied through (17) matches the DC voltage from the bias variable regulator (14).

The block diagram of FIG. 2 is specifically constituted by the circuit diagram shown in FIG. Buffer amplifier (11) is configured operational amplifier (19) with a resistor _{R 1, R 2, R 3} , R 4. Output circuit (1
8) an operational amplifier (15) and a pair of buffer transistors (Q _1), composed of (Q _2). Feedback circuit (17) is composed of resistors R ₆ and comparator (22).

Low pass filter circuit (16) resistor R ₁ and capacitor C ₁
The DC component is input to the comparator (22) of the feedback circuit (17). Feedback circuit (17) is a comparator (22) and consists of resistor R _6, and inputs the output control section (12) of the operational amplifier (21). The control section (12) has a reference voltage generation circuit (2
0), the operational amplifier (21), resistors _{R 7, R 8, R 9} , composed of R ₁₀ and capacitor C _2. The variable amplification volume (13) connected to the operational amplifier (21) adjusts the amplitude of the output signal from the control unit (12), and the variable bias volume (14) connected to the reference voltage generation circuit (20) It adjusts the center bias of the output signal from the control section (12).

The frame pulse input from the terminal (10) is amplified (or reduced) by a control signal from the control blow of (12) in the buffer amplifier (11), and at the same time, the bias is also controlled. The bias control signal generated by the control unit (12) is generated by comparing the reference level set by the variable bias volume (14) with the signal level generated by the low-pass filter (16) by a feedback circuit (17). The buffer amplifier of (11) is controlled so that the output of the output circuit (18) is always constant. Capacitor C ₃ is intended for smoothing the resistance R _6.

The inverted pulse input to the common driver (39) is stabilized by the specific circuit shown in FIG. 3, the amplitude and bias are set, and the inverted pulse is applied to the liquid crystal panel LCD.

The common driver circuit according to the present invention comprises a block circuit as shown in FIG. 2. In addition to the specific circuit in FIG. 3, a modified example thereof may be configured as shown in a circuit diagram in FIG. In the circuit shown in FIG. 5, a frame pulse is inputted to the terminal (51) and inputted to the operational amplifier (52). The amplitude of the input frame pulse is adjusted by the amplitude variable volume (53). The output of the operational amplifier (52) is (54)
And is taken out as a common output. The common output resistor R _17, is taken out as DC output by the low-pass filter formed by capacitor C _12, is input to the comparator (56). The comparator (56) compares the level set by the reference voltage generator (57) and the variable bias regulator (58) with the output level of the low-pass filter,
Comparator output resistor R _18, via a low pass filter capacitor C _13, is added to the voltage follower (55). Resistor R ₁₇ in the DC output, the output of the low pass filter capacitor C ₁₂ is always biased variable volume (58)
Is added to (52) so that the level set in.
(When dealing with particularly high frequency) capacitor C ₁₁ of FIG. 5 is bypass the high frequency components. Capacitor C ₁₃ is by dropping (the output of the reference voltage generating circuit (57)) smoothing the comparator output (56), the reference voltage, hold the output bound. Capacitor C ₁₄ is intended for protection against noise.

Figure 5 is the common output resistor R _17, is input to the comparator of smoothed by the capacitor C ₁₂ (56). Also, (58)
The variable bias voltage of Vcc and -VEE are taken from the same power supply line as the source power supply voltage of the panel. The bias set by the bias variable regulator (58) sets the bias of the common output and also serves as the reference voltage of the DC feedback, so that it can follow the fluctuation of the source power supply voltage. When the source power supply voltage fluctuates, it moves according to the fluctuation of the reference voltage, so that the fluctuation of the voltage applied to the panel becomes small. Since all circuits are directly connected, no DC cut capacitor is required. Fifth
The modification shown in the drawing has the same effect as that of FIG. 3 as compared with that of FIG. 3, and is stable because the feedback resistor (53) is varied by the volume for adjusting the amplitude.

As described in detail in the above embodiments, the common driver circuit according to the present invention has a simple circuit configuration including voltage follower, low-pass filter, feedback, and control circuits. Fluctuation of the direct current component that has an adverse effect is suppressed, and the reliability is improved. Further, since the common bias is applied from a stage preceding the output circuit, there is no need to cut the direct current, so that a large-capacity direct current cut capacitor is not required.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the entire structure of a liquid crystal display device incorporating a common driver circuit of the present invention, FIG. 2 is a block diagram showing a schematic configuration of an embodiment of a common driver circuit according to the present invention, and FIG. FIG. 3 is a circuit diagram showing a specific configuration of a detailed circuit of the block diagram of FIG. 2, and FIG.
FIG. 5 is a waveform diagram of each signal generated in each part of FIG. 3, FIG. 5 is a circuit diagram showing a modification of the circuit diagram of FIG. 3, and FIG. 6 shows a conventional example of this type of common driver circuit. It is a circuit diagram. (11) buffer amplifier, (12) control section, (13) variable amplitude control, (14) variable bias control, (15) operational amplifier, (16) low-pass filter, (17) ... feedback circuit, (18) ... output circuit.

Claims (1)

(57) [Claims] 1. A common driver circuit for driving a liquid crystal panel, comprising: an output circuit comprising a buffer amplifier or a voltage follower capable of sufficiently driving a capacitive load; a means for supplying a common signal and a common bias to the output circuit; Bias setting means for setting a common bias, and control means for detecting a DC level of the output circuit and using the detected output to constantly maintain the common bias set by the bias setting means. A common driver circuit.