JP2589792B2 - Impurity introduction method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for introducing impurities used for manufacturing a thin film transistor or the like according to the present invention.

2. Description of the Related Art The conventional semiconductor device manufacturing process, particularly the method of forming an impurity layer on a substrate containing an amorphous silicon layer and a glass material such as a liquid crystal television, generally uses a plasma CVD method by heating the substrate to about 300 ° C. And impurities (for example, P and As)
The mainstream is a method of forming amorphous silicon containing porosity.

However, amorphous silicon is very sensitive to the bonding state of Si—H to heat. For example, when amorphous silicon is deposited at 500 ° C., many dangling bonds are generated in the film. , The device characteristics will be worse, conversely low temperature eg 20
Even if P-containing amorphous silicon (hereinafter referred to as n ⁺ Si) is deposited to form an ohmic contact on amorphous Si at 0 ° C. to 250 ° C., it is not sufficiently activated. Device characteristics cannot be expected. Also, when making a transistor at the gate part, it is necessary to partially process n ⁺ Si. Thus, the present invention provides a method for introducing impurities in which good device characteristics can be expected.

Means for Solving the Problems In order to achieve the above object, the impurity introduction method of the present invention,
Depositing an amorphous silicon film on the uppermost layer of the substrate under reduced pressure, forming a desired mask pattern using a photoresist on the amorphous silicon film, The formed substrate is exposed to a glow discharge of a gas containing arsenic or phosphorus at a low temperature lower than the substrate temperature at the time of depositing the amorphous silicon film on the uppermost layer of the substrate, thereby removing impurities in the amorphous silicon. The method is characterized by including a step of introducing and a step of irradiating the surface of the substrate with a laser having a wavelength in the far ultraviolet region after the substrate is exposed to the glow discharge.

Effect The present invention uses the above-described method to selectively form an impurity layer in one layer of amorphous Si.
Since a high-concentration activation impurity layer can be formed only in the vicinity of the surface, a process which is extremely simplified in process and has high device characteristic efficiency can be manufactured.

EXAMPLE An impurity introducing method according to an example of the present invention will be described below with reference to the drawings.

First on glass 1 (Pyrex Corning)
A Cr electrode 2 is formed (FIG. 1a). Next, a plasma nitride film 3 was deposited at 3000 ° C. under reduced pressure using a parallel plate apparatus (FIG. 2B). And the condition at that time is SiH ₄ = 10sccm, N
H ₃ = 10 sccm, N ₂ = 40 sccm, pressure = 0.3 Torr, RF power = 2
00W (13.56 MHz), substrate temperature is 300 ° C. Next, amorphous silicon 4 was deposited on the nitride film 3 at 1000 ° (FIG. 3C). The deposition conditions were SiH ₄ = 5 sccm, H ₂ = 40 sccm, pressure = 0.5 Torr, RF power = 200 W (13.56 MHz), and the substrate temperature was 25
0 ° C. Further, the positive resist 5 (OFPR-800 manufactured by Tokyo Ohka) was patterned, and the amorphous silicon 4 was doped with As using the mask as a mask (FIG. 4D). The doping conditions were as follows: using a parallel-plate apparatus, AsH ₄ : He = 1: 50, 40 sccm, pressure = 3 nTorr, RF power = 250 w (1356 MHz),
The substrate temperature was set to 20 ° C. KrF after removing positive resist
Excimer laser (wavelength 248 nm) is applied to the entire surface of the substrate at 1.0 J / cm ²
Irradiation was carried out at a power of 5 to activate As (FIG. 7E).

FIG. 2 shows the characteristics of the transistors in the array after the above process. Simultaneous transistor characteristics were obtained as shown by the curve a. The curve b shows the transistor characteristics when the laser was not irradiated, and resulted in almost no current flow. Curve c is YAG
This is the transistor characteristics when using a laser (wavelength 1064 nm). As a result, a slight change in current was observed due to a change in gate voltage, but no large difference was observed. This is KrF
The difference between the wavelengths of the laser and the YAG laser means that the depth of the light reaches the layer directly below the amorphous silicon, and it was found that the wavelength of the laser was better in the deep ultraviolet region this time.

In this example, the impurity was As, but the same result was obtained by using P. The laser wavelength is 249nm
However, similar results were obtained with a XeCl excimer laser (wavelength: 308 nm).

Effect of the Invention As described above, the present invention provides a good method by depositing amorphous silicon on the uppermost layer of a substrate containing glass, forming a desired mask, introducing impurities by plasma, and activating by laser. A thin film transistor could be manufactured.

[Brief description of the drawings]

FIG. 1 is a process chart showing a method of introducing impurities in one embodiment of the present invention, and FIG. 2 is a characteristic chart of a thin film transistor. 1 ... glass, 2 ... gate, 3 ... SiN film, 4 ... amorphous silicon film, 5 ... photoresist.

 ──────────────────────────────────────────────────の Continuing from the front page (72) Inventor Tetsuya Kawamura 1006 Kadoma Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. Inside the company (72) Inventor Bunji Mizuno 1006, Kazuma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-62-205664 (JP, A) JP-A-63-56963 (JP, A) JP-A-57-202726 (JP, A) JP-A-62-179160 (JP, A) JP-A-60-182132 (JP, A)

Claims (2)

(57) [Claims] A step of depositing an amorphous silicon film on the substrate under reduced pressure on the uppermost layer of the substrate; and a step of forming a desired mask pattern on the amorphous silicon film using a photoresist. Exposing the substrate after forming the mask pattern to a glow discharge of a gas containing arsenic or phosphorus at a temperature lower than the substrate temperature at the time of depositing the amorphous silicon film on the uppermost layer of the substrate; An impurity introducing method, comprising: introducing an impurity into silicon; and irradiating the surface of the substrate with a laser having a wavelength in the far ultraviolet region after exposing the substrate to the glow discharge. 2. The substrate according to claim 1, wherein the lowermost layer is a transparent glass.
The impurity introduction method described in the above.